AT27C1024 Features • Fast Read Access Time - 45 ns • Low Power CMOS Operation • • • • • • • • – 100 µA max. Standby – 30 mA max. Active at 5 MHz JEDEC Standard Packages – 40-Lead 600-mil PDIP – 44-Lead PLCC – 40-Lead TSOP (10 mm x 14 mm) Direct Upgrade from 512K (AT27C516) EPROM 5V ± 10% Power Supply High Reliability CMOS Technology – 2000V ESD Protection – 200 mA Latchup Immunity Rapid™ Programming Algorithm - 100 µs/word (typical) CMOS and TTL Compatible Inputs and Outputs Integrated Product Identification Code Commercial and Industrial Temperature Ranges AT27C1024 1-Megabit (64K x 16) OTP EPROM AT27C1024 Description The AT27C1024 is a low-power, high-performance 1,048,576 bit one-time programmable read only memory (OTP EPROM) organized 64K by 16 bits. It requires only one 5V power supply in normal read mode operation. Any word can be accessed in less than 45 ns, eliminating the need for speed reducing WAIT states. The by-16 organization make this part ideal for high-performance 16- and 32-bit microprocessor systems. (continued) Pin Configurations Pin Name Function A0 - A15 Addresses O0 - O15 Outputs CE Chip Enable OE Output Enable PGM Program Strobe NC No Connect Note: Both GND pins must be connected. PDIP Top View PLCC Top View TSOP Top View Type 1 0019I-A–7/97 1 AT27C1024 In read mode, the AT27C1024 typically consumes 15 mA. Standby mode supply current is typically less than 10 µA. The AT27C1024 is available in industry standard JEDECapproved one-time programmable (OTP) plastic PDIP, PLCC, and TSOP packages. The device features two-line control (CE, OE) to eliminate bus contention in high-speed systems. With high density 64K word storage capability, the AT27C1024 allows firmware to be stored reliably and to be accessed by the system without the delays of mass storage media. Atmel’s 27C1024 have additional features to ensure high quality and efficient production use. The Rapid™ Programming Algorithm reduces the time required to program the part and guarantees reliable programming. Programming time is typically only 100 µs/word. The Integrated Product Identification Code electronically identifies the device and manufacturer. This feature is used by industry standard programming equipment to select the proper programming algorithms and voltages. System Considerations Switching between active and standby conditions via the Chip Enable pin may produce transient voltage excursions. Unless accommodated by the system design, these transients may exceed data sheet limits, resulting in device non-conformance. At a minimum, a 0.1 µF high frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor should be connected between the VCC and Ground terminals of the device, as close to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again connected between the VCC and Ground terminals. This capacitor should be positioned as close as possible to the point where the power supply is connected to the array. 2 AT27C1024 Block Diagram Absolute Maximum Ratings* Temperature Under Bias ......................-55°C to +125°C *NOTICE: Storage Temperature............................-65°C to +150°C Voltage on Any Pin with Respect to Ground ..............................-2.0V to +7.0V (1) Voltage on A9 with Respect to Ground ...........................-2.0V to +14.0V (1) VPP Supply Voltage with Respect to Ground ............................-2.0V to +14.0V (1) Note: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Minimum voltage is -0.6V DC which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is VCC + 0.75V DC which may overshoot to +7.0V for pulses of less than 20 ns. Operating Modes Mode/Pin OE PGM Ai VPP Outputs VIL VIL X(1) Ai X DOUT X VIH X X X High Z Standby VIH X X X X(5) High Z Rapid Program(2) VIL VIH VIL Ai VPP DIN PGM Verify VIL VIL VIH Ai VPP DOUT PGM Inhibit VIH X X X VPP High Z Product Identification(4) VIL VIL X A9 = VH(3) A0 = VIH or VIL A1 - A15 = VIL VCC Identification Code Read Output Disable Notes: CE 1. X can be VIL or VIH. 2. Refer to Programming Characteristics. 3. VH = 12.0 ± 0.5V. 4. Two identifier words may be selected. All Ai inputs are held low (VIL), except A9 which is set to VH and A0 which is toggled low (VIL) to select the Manufacturer’s Identification word and high (VIH) to select the Device Code word. 5. Standby VCC current (ISB) is specified with VPP = VCC. VCC > VPP will cause a slight increase in ISB. 3 AT27C1024 DC and AC Operating Conditions for Read Operation AT27C1024 Operating Temperature (Case) -45 -55 -70 -90 -12 -15 0°C - 70°C 0°C - 70°C 0°C - 70°C 0°C - 70°C 0°C - 70°C 0°C - 70°C -40°C - 85°C -40°C - 85°C -40°C - 85°C -40°C - 85°C -40°C - 85°C -40°C - 85°C 5V ± 10% 5V ± 10% 5V ± 10% 5V ± 10% 5V ± 10% 5V ± 10% Com. Ind. VCC Power Supply DC and Operating Characteristics for Read Operation Symbol Parameter Condition ILI Input Load Current ILO Max Units VIN = 0V to VCC ±1 µA Output Leakage Current VOUT = 0V to VCC ±5 µA IPP1(2) VPP(1)) Read/Standby Current VPP = VCC 10 µA VCC(1) Standby Current ISB1 (CMOS), CE = VCC ± 0.3V 100 ISB µA ISB2 (TTL), CE = 2.0 to VCC + 0.5V 1 mA ICC VCC Active Current f = 5 MHz, IOUT = 0 mA, CE = VIL 30 mA VIL Input Low Voltage -0.6 0.8 V VIH Input High Voltage 2.0 VCC + 0.5 V VOL Output Low Voltage IOL = 2.1 mA 0.4 V VOH Output High Voltage IOH = -400 µA Note: Min 2.4 V 1. VCC must be applied simultaneously or before VPP, and removed simultaneously or after VPP. 2. VPP may be connected directly to VCC, except during programming. The supply current would then be the sum of ICC and IPP. AC Characteristics for Read Operation AT27C1024 -45 Symbol Parameter Condition -55 -70 -90 -12 -15 Min Max Min Max Min Max Min Max Min Max Min Max Units tACC(3) Address to Output Delay CE = OE = VIL 45 55 70 90 120 150 ns tCE(2) CE to Output Delay OE = VIL 45 55 70 90 120 150 ns tOE(2)(3) OE to Output Delay CE = VIL 20 25 25 30 35 50 ns tDF(4)(5) OE or CE High to Output Float, whichever occurred first 20 25 25 30 30 40 ns tOH Output Hold from Address, CE or OE, whichever occurred first Notes: 7 7 7 0 0 0 ns 2, 3, 4, 5. - see AC Waveforms for Read Operation. 4 AC Waveforms for Read Operation(1) Notes: 1. Timing measurement reference level is 1.5V for -45 and -55 devices. Input AC drive levels are VIL = 0.0V and VIH = 3.0V. Timing measurement reference levels for all other speed grades are VOL = 0.8V and VOH = 2.0V. Input AC drive levels are VIL = 0.45V and VIH = 2.4V. 2. OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE. 3. OE may be delayed up to tACC - tOE after the address is valid without impact on tACC. 4. This parameter is only sampled and is not 100% tested. 5. Output float is defined as the point when data is no longer driven. Pin Capacitance (f = 1 MHz T = 25°C)(1) Typ Max Units CIN 4 10 pF VIN = 0V COUT 8 12 pF VOUT = 0V Note: Conditions 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested. Input Test Waveforms and Measurement Levels Output Test Load For -45 and -55 Devices Only For -70 and slower Devices Only 5 AT27C1024 Note: CL = 100 pF including jig capacitance except -45 and -55 devices, where CL = 30 pF. AT27C1024 Programming Waveforms(1) Notes: 1. The Input Timing Reference is 0.8V for V IL and 2.0V for VIH. 2. tOE and tDFP are characteristics of the device but must be accommodated by the programmer. 3. When programming the AT27C1024 a 0.1 µF capacitor is reqired across VPP and ground to suppress sputious voltage transients. DC Programming Characteristics TA = 25 ± 5×C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V Limits Symbol Parameter Test Conditions ILI Input Load Current VIN = VIL, VIH VIL Input Low Level VIH Input High Level VOL Output Low Voltage IOL = 2.1 mA VOH Output High Voltage IOH = -400 µA ICC2 VCC Supply Current (Program and Verify) IPP2 VPP Supply Current VID A9 Product Identification Voltage Min Max Units ±10 µA -0.6 0.8 V 2.0 VCC + 0.1 V 0.4 V 2.4 CE = PGM = VIL 11.5 V 50 mA 30 mA 12.5 V 6 AT27C1024 AC Programming Characteristics TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V Limits Test Conditions(1) Min Max Units Symbol Parameter tAS Address Setup Time 2 µs tCES CE Setup Time 2 µs tOES OE Setup Time 2 µs tDS Data Setup Time 2 µs tAH Address Hold Time 0 µs tDH Data Hold Time 0.45V to 2.4V 2 µs tDFP OE High to Output Float Delay(2) 0 tVPS VPP Setup Time Input Timing Reference Level 0.8V to 2.0V tVCS VCC Setup Time tPW PGM Program Pulse Width(3) tOE Data Valid from OE tPRT VPP Pulse Rise Time During Programming Notes: Input Rise and Fall Times (10% to 90%) 20ns Input Pulse Levels Output Timing Reference Level 0.8V to 2.0V 130 2 µs 2 µs 95 105 µs 150 ns 50 1. VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP. 2. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven — see timing diagram. 3. Program Pulse width tolerance is 100 µsec ± 5%. ns ns Atmel’s 27C1024 Integrated Product Identification Code Pins A0 015-08 O7 O6 O5 O4 O3 O2 O1 O0 Hex Data Manufacturer 0 0 0 0 0 1 1 1 1 0 001E Device Type 1 0 1 1 1 1 0 0 0 1 00F1 Codes 7 Rapid Programming Algorithm A 100 µs PGM pulse width is used to program. The address is set to the first location. VCC is raised to 6.5V and VPP is raised to 13.0V. Each address is first programmed with one 100 µs PGM pulse without verification. Then a verification / reprogramming loop is executed for each address. In the event a word fails to pass verification, up to 10 successive 100 µs pulses are applied with a verification 8 AT27C1024 after each pulse. If the word fails to verify after 10 pulses have been applied, the part is considered failed. After the word verifies properly, the next address is selected until all have been checked. VPP is then lowered to 5.0V and VCC to 5.0V. All words are read again and compared with the original data to determine if the device passes or fails. AT27C1024 Ordering Information ICC (mA) tACC (ns) Active Standby Ordering Code Package Operation Range 45 30 0.1 AT27C1024-45JC AT27C1024-45PC AT27C1024-45VC 44J 40P6 40V Commercial (0°C to 70°C) 30 0.1 AT27C1024-45JI AT27C1024-45PI AT27C1024-45VI 44J 40P6 40V Industrial (-40°C to 85°C) 30 0.1 AT27C1024-55JC AT27C1024-55PC AT27C1024-55VC 44J 40P6 40V Commercial (0°C to 70°C) 30 0.1 AT27C1024-55JI AT27C1024-55PI AT27C1024-55VI 44J 40P6 40V Industrial (-40°C to 85°C) 30 0.1 AT27C1024-70JC AT27C1024-70PC AT27C1024-70VC 44J 40P6 40V Commercial (0°C to 70°C) 30 0.1 AT27C1024-70JI AT27C1024-70PI AT27C1024-70VI 44J 40P6 40V Industrial (-40°C to 85°C) 30 0.1 AT27C1024-90JC AT27C1024-90PC AT27C1024-90VC 44J 40P6 40V Commercial (0°C to 70°C) 30 0.1 AT27C1024-90JI AT27C1024-90PI AT27C1024-90VI 44J 40P6 40V Industrial (-40°C to 85°C) 30 0.1 AT27C1024-12JC AT27C1024-12PC AT27C1024-12VC 44J 40P6 40V Commercial (0°C to 70°C) 30 0.1 AT27C1024-12JI AT27C1024-12PI AT27C1024-12VI 44J 40P6 40V Industrial (-40°C to 85°C) 30 0.1 AT27C1024-15JC AT27C1024-15PC AT27C1024-15VC 44J 40P6 40V Commercial (0°C to 70°C) 30 0.1 AT27C1024-15JI AT27C1024-15PI AT27C1024-15VI 44J 40P6 40V Industrial (-40°C to 85°C) 55 70 90 120 150 Package Type 44J 44-Lead, Plastic J-Leaded Chip Carrier (PLCC) 40P6 40-Lead, 0.600" Wide, Plastic Dual Inline Package (PDIP) 40V 40-Lead, Plastic Thin Small Outline Package (TSOP) 10 x 14 mm 9