SN74AUP1G125 www.ti.com SCES595L – JULY 2004 – REVISED FEBRUARY 2013 LOW-POWER SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT Check for Samples: SN74AUP1G125 FEATURES 1 • 2 • • • • • • • • • • Available in the Texas Instruments NanoStar™ Package Low Static-Power Consumption (ICC = 0.9 μA Max) Low Dynamic-Power Consumption (Cpd = 4 pF Typ at 3.3 V) Low Input Capacitance (CI = 1.5 pF Typ) Low Noise – Overshoot and Undershoot <10% of VCC Input-Disable Feature Allows Floating Input Conditions Ioff Supports Partial-Power-Down Mode Operation Input Hysteresis Allows Slow Input Transition and Better Switching Noise Immunity at Input • • • • DBV PACKAGE (TOP VIEW) OE A 2 GND 3 DCK PACKAGE (TOP VIEW) 1 6 2 5 N.C. GND 3 4 Y A 2 GND 3 DSF PACKAGE (TOP VIEW) OE VCC A 1 VCC 5 OE 1 A 2 GND 3 5 VCC 4 Y Y 4 Y 4 DRY PACKAGE (TOP VIEW) OE OE DRL PACKAGE (TOP VIEW) VCC 5 1 Wide Operating VCC Range of 0.8 V to 3.6 V Optimized for 3.3-V Operation 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation tpd = 4.6 ns Max at 3.3 V Suitable for Point-to-Point Applications Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Performance Tested Per JESD 22 – 2000-V Human-Body Model (A114-B, Class II) – 1000-V Charged-Device Model (C101) 1 6 A 2 5 GND 3 4 VCC N.C. YFP PACKAGE (TOP VIEW) OE A GND A1 1 6 A2 VCC B1 2 5 B2 C1 3 4 DNU Y C2 YZP/YZT PACKAGE (TOP VIEW) OE A GND A1 1 B1 2 C1 3 5 A2 VCC 4 C2 Y Y N.C. – No internal connection. DNU – Do not use See mechancial drawings for dimensions. DESCRIPTION/ORDERING INFORMATION The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable applications. This family ensures a very low static and dynamic power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity (see Figure 1 and Figure 2). 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NanoStar is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2004–2013, Texas Instruments Incorporated SN74AUP1G125 SCES595L – JULY 2004 – REVISED FEBRUARY 2013 www.ti.com This bus buffer gate is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is high. This device has the input-disable feature, which allows floating input signals. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Static-Power Consumption Dynamic-Power Consumption (µA) (pF) Switching Characteristics at 25 MHz† 100% 100% 3.5 80% 80% 2.5 60% 60% 3.3-V Logic† 40% Voltage − V 3 3.3-V Logic LVC † 40% 20% AUP † Output 0.5 20% 0% Input 2 1.5 1 0 −0.5 AUP 0% Single, dual, and triple gates 0 † Figure 1. AUP – The Lowest-Power Family 5 10 15 20 25 30 Time − ns 35 40 45 AUP1G08 data at CL = 15 pF Figure 2. Excellent Signal Integrity NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. ORDERING INFORMATION (1) PACKAGE (2) TA –40°C to 85°C NanoStar™ – WCSP (DSBGA) 0.23-mm Large Bump – YFP (Pb-free) Reel of 3000 SN74AUP1G125YFPR _ _ _ HM _ NanoStar™ – WCSP (DSBGA) 0.23-mm Large Bump – YZP (Pb-free) Reel of 3000 SN74AUP1G125YZPR _ _ _ HM _ NanoStar™ – WCSP (DSBGA) 0.23-mm Large Bump – YZT (Pb-free) Reel of 3000 SN74AUP1G125YZTR _ _ _ HM _ QFN – DRY Reel of 5000 SN74AUP1G125DRYR HM uQFN – DSF Reel of 5000 SN74AUP1G125DSFR HM Reel of 3000 SN74AUP1G125DBVR Reel of 250 SN74AUP1G125DBVT Reel of 3000 SN74AUP1G125DCKR Reel of 250 SN74AUP1G125DCKT Reel of 4000 SN74AUP1G125DRLR SOT (SOT-23) – DBV SOT (SC-70) – DCK SOT (SOT-553) – DRL (1) (2) (3) TOP-SIDE MARKING (3) ORDERABLE PART NUMBER H25_ HM_ HM_ For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. DBV/DCK/DRL: The actual top-side marking has one additional character that designates the wafer fab/assembly site. YFP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following character to designate the wafer fab/assembly site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free). FUNCTION TABLE INPUTS (1) 2 OE A OUTPUT Y L H H L L L H (1) Z X Floating inputs allowed. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: SN74AUP1G125 SN74AUP1G125 www.ti.com SCES595L – JULY 2004 – REVISED FEBRUARY 2013 LOGIC DIAGRAM (POSITIVE LOGIC) OE A 1 2 4 Y ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) MIN MAX VCC Supply voltage range –0.5 4.6 V VI Input voltage range (2) –0.5 4.6 V –0.5 4.6 V –0.5 VCC + 0.5 (2) UNIT VO Voltage range applied to any output in the high-impedance or power-off state VO Output voltage range in the high or low state (2) IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output current ±20 mA Continuous current through VCC or GND ±50 mA θJA Package thermal impedance (3) DBV package 206 DCK package 252 DRL package 142 DSF package 300 DRY package 234 YFP/YZP package Tstg (1) (2) (3) Storage temperature range V °C/W 132 –65 150 °C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. The package thermal impedance is calculated in accordance with JESD 51-7. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: SN74AUP1G125 3 SN74AUP1G125 SCES595L – JULY 2004 – REVISED FEBRUARY 2013 www.ti.com RECOMMENDED OPERATING CONDITIONS (1) VCC Supply voltage VCC = 0.8 V VIH High-level input voltage VCC = 1.1 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3 V to 3.6 V MIN MAX 0.8 3.6 VCC 3.6 0.65 × VCC 3.6 1.6 3.6 2 3.6 VCC = 0.8 V VIL Low-level input voltage VO Output voltage IOH High-level output current Low-level output current VCC = 1.1 V to 1.95 V 0 0.35 × VCC VCC = 2.3 V to 2.7 V 0 0.7 VCC = 3 V to 3.6 V 0 0.9 Active state 0 VCC 3-state 0 3.6 VCC = 0.8 V –20 VCC = 1.1 V –1.1 VCC = 1.4 V –1.7 VCC = 1.65 V –1.9 VCC = 2.3 V –3.1 Input transition rise or fall rate TA Operating free-air temperature (1) 4 V V V μA mA –4 VCC = 0.8 V 20 VCC = 1.1 V 1.1 VCC = 1.4 V 1.7 VCC = 1.65 V 1.9 VCC = 2.3 V 3.1 VCC = 3 V Δt/Δv V 0 VCC = 3 V IOL UNIT μA mA 4 VCC = 0.8 V to 3.6 V –40 200 ns/V 85 °C All unused inputs of the device must be held at VCC or GND to ensure proper device operation. See the TI application report, Implications of Slow of Floating CMOS Inputs, literature number SCBA004. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: SN74AUP1G125 SN74AUP1G125 www.ti.com SCES595L – JULY 2004 – REVISED FEBRUARY 2013 ELECTRICAL CHARACTERISTICS over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VOL TEST CONDITIONS TYP MAX MIN 0.8 V to 3.6 V VCC – 0.1 VCC – 0.1 1.1 V 0.75 × VCC 0.7 × VCC IOH = –1.7 mA 1.4 V 1.11 1.03 IOH = –1.9 mA 1.65 V 1.32 1.3 2.05 1.97 1.9 1.85 2.72 2.67 IOH = –2.7 mA IOH = –4 mA 2.3 V 3V IOL = 20 μA 0.8 V to 3.6 V IOL = 1.1 mA IOL = 1.7 mA IOL = 1.9 mA IOL = 2.3 mA IOL = 3.1 mA IOL = 2.7 mA IOL = 4 mA A or OE input MIN TA = –40°C to 85°C IOH = –1.1 mA IOH = –3.1 mA II TA = 25°C IOH = –20 μA IOH = –2.3 mA VOL VCC VI = GND to 3.6 V 2.6 MAX UNIT V 2.55 0.1 0.1 1.1 V 0.3 × VCC 0.3 × VCC 1.4 V 0.31 0.37 1.65 V 0.31 0.35 0.31 0.33 0.44 0.45 0.31 0.33 0.44 0.45 0 V to 3.6 V 0.1 0.5 μA 2.3 V 3V V Ioff VI or VO = 0 V to 3.6 V 0V 0.2 0.6 μA ΔIoff VI or VO = 0 V to 3.6 V 0 V to 0.2 V 0.2 0.6 μA IOZ VO = VCC or GND 3.6 V 0.1 0.5 μA ICC VI = GND or (VCC to 3.6 V), OE = GND, IO = 0 0.8 V to 3.6 V 0.5 0.9 μA A input ΔICC OE input All inputs VI = VCC – 0.6 V (1), IO = 0 3.3 V VI = GND to 3.6 V, OE = VCC (2) 0.8 V to 3.6 V CI VI = VCC or GND Co VO = VCC or GND (1) (2) 0V 1.5 3.6 V 1.5 3.6 V 3 40 50 110 120 0 0 μA pF pF One input at VCC – 0.6 V, other input at VCC or GND To show ICC is very low when the input-disable feature is enabled Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: SN74AUP1G125 5 SN74AUP1G125 SCES595L – JULY 2004 – REVISED FEBRUARY 2013 www.ti.com SWITCHING CHARACTERISTICS over recommended operating free-air temperature range, CL = 5 pF (unless otherwise noted) (see Figure 3 and Figure 4) PARAMETER FROM (INPUT) TO (OUTPUT) MIN 0.8 V tpd A Y OE Y 6 OE Y UNIT MAX MIN MAX 2.7 15.3 18.1 4.3 7.4 12.6 1.5 V ± 0.1 V 3.3 5.2 8.5 1 10.2 1.8 V ± 0.15 V 2.6 4.1 6.8 1.3 8.3 2.5 V ± 0.2 V 2 2.9 4.7 1.1 5.8 3.3 V ± 0.3 V 1.7 2.4 3.8 1 4.6 ns 19.1 1.2 V ± 0.1 V 5.1 9.3 15.9 3.6 19.2 1.5 V ± 0.1 V 4.1 6.6 10.5 2.5 12.7 1.8 V ± 0.15 V 3.2 5.3 8.7 2.1 10.3 2.5 V ± 0.2 V 2.5 3.8 6 1.6 7.2 3.3 V ± 0.3 V 2.1 3.2 4.9 1.4 5.9 0.8 V tdis TYP 1.2 V ± 0.1 V 0.8 V ten TA = –40°C to 85°C TA = 25°C VCC ns 12.1 1.2 V ± 0.1 V 2.4 4.1 6.9 2.2 7.7 1.5 V ± 0.1 V 1.8 2.9 4.5 1.7 5.1 1.8 V ± 0.15 V 1 2.9 4.3 1.5 4.7 2.5 V ± 0.2 V 1 1.8 2.7 1 3.3 3.3 V ± 0.3 V 1.2 2.2 3.2 1.1 4 Submit Documentation Feedback ns Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: SN74AUP1G125 SN74AUP1G125 www.ti.com SCES595L – JULY 2004 – REVISED FEBRUARY 2013 SWITCHING CHARACTERISTICS over recommended operating free-air temperature range, CL = 10 pF (unless otherwise noted) (see Figure 3 and Figure 4) PARAMETER FROM (INPUT) TO (OUTPUT) MIN 0.8 V tpd A or B Y OE Y OE Y UNIT MAX MIN MAX 20.5 4.6 8.4 13.7 3.6 16.6 1.5 V ± 0.1 V 3.5 5.9 9.3 2.4 11.1 1.8 V ± 0.15 V 3.9 4.7 7.5 1.3 9.1 2.5 V ± 0.2 V 2.3 3.4 5.3 1.6 6.4 3.3 V ± 0.3 V 2.1 2.8 4.3 1.4 5.2 ns 21.8 1.2 V ± 0.1 V 4.9 10.2 16.8 4.4 20.2 1.5 V ± 0.1 V 3.9 7.3 11.2 3.3 13.5 1.8 V ± 0.15 V 3.4 5.8 9.2 2.7 11 2.5 V ± 0.2 V 2.5 4.3 6.4 2.1 7.8 3.3 V ± 0.3 V 2.1 3.7 5.4 1.9 6.4 1.2 V ± 0.1 V 3.8 6.6 11.7 1.2 14 1.5 V ± 0.1 V 2.2 4.7 7.9 1.3 9.3 1.8 V ± 0.15 V 2.4 4.4 6.4 2.2 7.5 2.5 V ± 0.2 V 1.3 3.1 4.9 1.2 5.4 3.3 V ± 0.3 V 1.9 3.4 5 1.9 5.6 0.8 V tdis TYP 1.2 V ± 0.1 V 0.8 V ten TA = –40°C to 85°C TA = 25°C VCC ns 13 ns SWITCHING CHARACTERISTICS over recommended operating free-air temperature range, CL = 15 pF (unless otherwise noted) (see Figure 3 and Figure 4) PARAMETER FROM (INPUT) TO (OUTPUT) MIN 0.8 V tpd A or B Y OE Y OE Y UNIT MAX MIN MAX 4.3 17.9 22.5 5.8 9.3 15.1 1.5 V ± 0.1 V 4.4 6.6 10.2 3 12.1 1.8 V ± 0.15 V 3.5 5.3 8.3 2.3 9.9 2.5 V ± 0.2 V 2.7 3.9 5.8 1.9 7 3.3 V ± 0.3 V 2.4 3.2 4.7 1.8 5.7 ns 25.2 1.2 V ± 0.1 V 7 11.3 18.1 5.4 21.4 1.5 V ± 0.1 V 5.5 8.1 12.2 4.1 14.5 1.8 V ± 0.15 V 4.3 6.5 10.1 3.3 12 2.5 V ± 0.2 V 3.4 4.8 7.1 2.6 8.4 3.3 V ± 0.3 V 2.9 4.1 5.9 2.3 6.9 1.2 V ± 0.1 V 3.7 5.8 8.2 3.3 11 1.5 V ± 0.1 V 5.5 3.9 5.9 2.1 8 1.8 V ± 0.15 V 3.3 4.5 6.6 2.9 7.4 2.5 V ± 0.2 V 2.3 3.2 4.3 1.8 5.1 3.3 V ± 0.3 V 2.4 4.8 6.2 3.1 6.7 0.8 V tdis TYP 1.2 V ± 0.1 V 0.8 V ten TA = –40°C to 85°C TA = 25°C VCC ns 14 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: SN74AUP1G125 ns 7 SN74AUP1G125 SCES595L – JULY 2004 – REVISED FEBRUARY 2013 www.ti.com SWITCHING CHARACTERISTICS over recommended operating free-air temperature range, CL = 30 pF (unless otherwise noted) (see Figure 3 and Figure 4) PARAMETER FROM (INPUT) TO (OUTPUT) MIN 0.8 V tpd A or B Y OE Y OE Y UNIT MAX MIN MAX 29 7.4 12 18.7 6.6 21.4 1.5 V ± 0.1 V 5.7 8.6 12.5 4.9 14.7 1.8 V ± 0.15 V 4.8 6.9 10.1 3.1 12 2.5 V ± 0.2 V 3.9 5.1 7.2 3.3 8.7 3.3 V ± 0.3 V 3.5 4.8 6 3 7 ns 33.4 1.2 V ± 0.1 V 8.8 14.1 21.8 7.4 25.5 1.5 V ± 0.1 V 6.9 10.1 14.6 5.6 17.4 1.8 V ± 0.15 V 5.6 8.1 12 4.7 14.1 2.5 V ± 0.2 V 4.3 6.1 8.5 3.8 10 3.3 V ± 0.3 V 3.7 5.2 7.1 3.4 8.3 0.8 V tdis TYP 1.2 V ± 0.1 V 0.8 V ten TA = –40°C to 85°C TA = 25°C VCC ns 17.7 1.2 V ± 0.1 V 5.8 10 16 3.7 16 1.5 V ± 0.1 V 5.7 7.7 10.9 1 10.7 1.8 V ± 0.15 V 4.5 7.7 9.8 4.4 12.5 2.5 V ± 0.2 V 3.9 5.6 7.4 3.2 9 3.3 V ± 0.3 V 3.3 8.4 10.7 6.6 10.8 ns OPERATING CHARACTERISTICS TA = 25°c PARAMETER TEST CONDITIONS Outputs enabled Cpd Power dissipation capacitance Outputs disabled 8 f = 10 MHz f = 10 MHz Submit Documentation Feedback VCC TYP 0.8 V 3.8 1.2 V ± 0.1 V 3.8 1.5 V ± 0.1 V 3.7 1.8 V ± 0.15 V 3.8 2.5 V ± 0.2 V 3.9 3.3 V ± 0.3 V 4 0.8 V 0 1.2 V ± 0.1 V 0 1.5 V ± 0.1 V 0 1.8 V ± 0.15 V 0 2.5 V ± 0.2 V 0 3.3 V ± 0.3 V 0 UNIT pF Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: SN74AUP1G125 SN74AUP1G125 www.ti.com SCES595L – JULY 2004 – REVISED FEBRUARY 2013 PARAMETER MEASUREMENT INFORMATION (Propagation Delays, Setup and Hold Times, and Pulse Duration) From Output Under Test CL (see Note A) 1 MΩ LOAD CIRCUIT CL VM VI VCC = 0.8 V VCC = 1.2 V ± 0.1 V VCC = 1.5 V ± 0.1 V VCC = 1.8 V ± 0.15 V VCC = 2.5 V ± 0.2 V VCC = 3.3 V ± 0.3 V 5, 10, 15, 30 pF VCC/2 VCC 5, 10, 15, 30 pF VCC/2 VCC 5, 10, 15, 30 pF VCC/2 VCC 5, 10, 15, 30 pF VCC/2 VCC 5, 10, 15, 30 pF VCC/2 VCC 5, 10, 15, 30 pF VCC/2 VCC tw VCC Input VCC/2 VCC/2 VI VM Input 0V VM VOLTAGE WAVEFORMS PULSE DURATION 0V tPHL tPLH VOH VM Output VM VOL tPHL VCC Timing Input VCC/2 0V tPLH tsu VOH VM Output VCC VM VOL Data Input VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS NOTES: A. B. C. D. E. th VCC/2 VCC/2 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES CL includes probe and jig capacitance. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr/tf = 3 ns. The outputs are measured one at a time, with one transition per measurement. tPLH and tPHL are the same as tpd. All parameters and waveforms are not applicable to all devices. Figure 3. Load Circuit and Voltage Waveforms Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: SN74AUP1G125 9 SN74AUP1G125 SCES595L – JULY 2004 – REVISED FEBRUARY 2013 www.ti.com PARAMETER MEASUREMENT INFORMATION (Enable and Disable Times) 2 × VCC S1 5 kΩ From Output Under Test GND CL (see Note A) 5 kΩ TEST S1 tPLZ/tPZL tPHZ/tPZH 2 × VCC GND LOAD CIRCUIT CL VM VI V∆ VCC = 0.8 V VCC = 1.2 V ± 0.1 V VCC = 1.5 V ± 0.1 V VCC = 1.8 V ± 0.15 V VCC = 2.5 V ± 0.2 V VCC = 3.3 V ± 0.3 V 5, 10, 15, 30 pF VCC/2 VCC 0.1 V 5, 10, 15, 30 pF VCC/2 VCC 0.1 V 5, 10, 15, 30 pF VCC/2 VCC 0.1 V 5, 10, 15, 30 pF VCC/2 VCC 0.15 V 5, 10, 15, 30 pF VCC/2 VCC 0.15 V 5, 10, 15, 30 pF VCC/2 VCC 0.3 V VCC Output Control Output Waveform 1 S1 at 2 × VCC (see Note B) VCC/2 0V tPLZ tPZL VCC VCC/2 VOL + V∆ VOL tPHZ tPZH Output Waveform 2 S1 at GND (see Note B) VCC/2 VCC/2 VOH − V∆ VOH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr/tf = 3 ns. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. All parameters and waveforms are not applicable to all devices. Figure 4. Load Circuit and Voltage Waveforms 10 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: SN74AUP1G125 SN74AUP1G125 www.ti.com SCES595L – JULY 2004 – REVISED FEBRUARY 2013 REVISION HISTORY Changes from Revision K (November 2012) to Revision L • Page Changed Y to Y for pin 4 in DSF Package pin out ............................................................................................................... 1 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: SN74AUP1G125 11 PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) 74AUP1G125DBVRE4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 H25R 74AUP1G125DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 H25R 74AUP1G125DBVTE4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 H25R 74AUP1G125DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 H25R 74AUP1G125DCKRE4 ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (HM5 ~ HMF ~ HMK ~ HMR) 74AUP1G125DCKRG4 ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (HM5 ~ HMF ~ HMK ~ HMR) 74AUP1G125DCKTE4 ACTIVE SC70 DCK 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (HM5 ~ HMR) 74AUP1G125DCKTG4 ACTIVE SC70 DCK 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (HM5 ~ HMR) 74AUP1G125DRLRG4 ACTIVE SOT DRL 5 4000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (HM7 ~ HMR) SN74AUP1G125DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 H25R SN74AUP1G125DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 H25R SN74AUP1G125DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (HM5 ~ HMF ~ HMK ~ HMR) SN74AUP1G125DCKT ACTIVE SC70 DCK 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (HM5 ~ HMR) SN74AUP1G125DRLR ACTIVE SOT DRL 5 4000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (HM7 ~ HMR) SN74AUP1G125DRYR ACTIVE SON DRY 6 5000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HM SN74AUP1G125DSFR ACTIVE SON DSF 6 5000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HM SN74AUP1G125YFPR ACTIVE DSBGA YFP 6 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM Addendum-Page 1 (HM2 ~ HM7 ~ HMN) Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 11-Apr-2013 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) SN74AUP1G125YZPR ACTIVE DSBGA YZP 5 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 (HM7 ~ HMN) SN74AUP1G125YZTR ACTIVE DSBGA YZT 5 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 (HM ~ HM2 ~ HM7) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. 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Addendum-Page 2 Samples PACKAGE MATERIALS INFORMATION www.ti.com 7-Jun-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ SN74AUP1G125DBVR SOT-23 3000 180.0 8.4 DBV 5 Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 3.23 3.17 1.37 4.0 8.0 Q3 SN74AUP1G125DBVT SOT-23 DBV 5 250 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 SN74AUP1G125DCKR SC70 DCK 5 3000 178.0 9.2 2.4 2.4 1.22 4.0 8.0 Q3 SN74AUP1G125DCKR SC70 DCK 5 3000 180.0 9.2 2.3 2.55 1.2 4.0 8.0 Q3 SN74AUP1G125DCKT SC70 DCK 5 250 178.0 9.2 2.4 2.4 1.22 4.0 8.0 Q3 SN74AUP1G125DRLR SOT DRL 5 4000 180.0 9.5 1.78 1.78 0.69 4.0 8.0 Q3 SN74AUP1G125DRLR SOT DRL 5 4000 180.0 8.4 1.98 1.78 0.69 4.0 8.0 Q3 SN74AUP1G125DRYR SON DRY 6 5000 180.0 9.5 1.15 1.6 0.75 4.0 8.0 Q1 SN74AUP1G125DSFR SON DSF 6 5000 180.0 9.5 1.16 1.16 0.5 4.0 8.0 Q2 SN74AUP1G125YFPR DSBGA YFP 6 3000 178.0 9.2 0.89 1.29 0.62 4.0 8.0 Q1 SN74AUP1G125YZPR DSBGA YZP 5 3000 178.0 9.2 1.02 1.52 0.63 4.0 8.0 Q1 SN74AUP1G125YZTR DSBGA YZT 5 3000 180.0 8.4 1.02 1.52 0.75 4.0 8.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 7-Jun-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74AUP1G125DBVR SOT-23 DBV 5 3000 202.0 201.0 28.0 SN74AUP1G125DBVT SOT-23 DBV 5 250 202.0 201.0 28.0 SN74AUP1G125DCKR SC70 DCK 5 3000 180.0 180.0 18.0 SN74AUP1G125DCKR SC70 DCK 5 3000 205.0 200.0 33.0 SN74AUP1G125DCKT SC70 DCK 5 250 180.0 180.0 18.0 SN74AUP1G125DRLR SOT DRL 5 4000 180.0 180.0 30.0 SN74AUP1G125DRLR SOT DRL 5 4000 202.0 201.0 28.0 SN74AUP1G125DRYR SON DRY 6 5000 180.0 180.0 30.0 SN74AUP1G125DSFR SON DSF 6 5000 180.0 180.0 30.0 SN74AUP1G125YFPR DSBGA YFP 6 3000 220.0 220.0 35.0 SN74AUP1G125YZPR DSBGA YZP 5 3000 220.0 220.0 35.0 SN74AUP1G125YZTR DSBGA YZT 5 3000 210.0 185.0 35.0 Pack Materials-Page 2 D: Max = 1.418 mm, Min =1.358 mm E: Max = 0.918 mm, Min =0.858 mm D: Max = 1.418 mm, Min =1.358 mm E: Max = 0.918 mm, Min =0.858 mm D: Max = 1.19 mm, Min = 1.13 mm E: Max = 0.79 mm, Min = 0.73 mm IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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