SSC SS431GGB

SS431/G
Adjustable Precision Shunt Regulator
FEATURES
DESCRIPTION
Low voltage operation (2.5V)
The SS431 is a low-voltage three-terminal adjustable shunt
Adjustable output voltage from VO = V REF to 18V
regulator with a guaranteed thermal stability over the applicable
Wide operating current range from 0.4mA to 100mA
temperature range. The output voltage can be set to any value
Low dynamic output impedance 0.5Ω max.
between VREF (approximately 2.5V) to 18V with two external
ESD rating is 5.5kV (per MIL-STD 883D)
resistors (see application circuit). This device has a typical output
Pb-free lead finish available.
impedance of 0.2 ohms. Active output circuitry provides very sharp
APPLICATIONS
turn-on
Linear Regulators
characteristics,
making
this
device
an
excellent
replacement for Zener diodes in many applications.
Adjustable Supplies
The SS431 is characterized for operation from 0°C to 105°C,
Switching Power Supplies
and three package options (SOT-23, SOT-89, and TO-92) allow
Battery Operated Computers
the designer the opportunity to select the proper package for his
Instrumentation
application. The SS431 is available with a Pb-free lead finish
- order as SS431Gxx.
Computer Disk Drives
PIN CONFIGURATION
BLOCK DIAGRAM
SOT-23 (Top view)
Anode
2
Cathode
1
Reference
Cathode
Ref
+
3
Vref
SOT-89 (Top view)
Anode
3
Cathode
2
Anode
1
Reference
TO-92 (Top view)
SYMBOL
Cathode
3 Cathode
2 Anode
1
Reference
Ref.
Anode
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SS431/G
ABSOLUTE MAXIMUM RATINGS over ambient temp. range.
Parameter
Symbol
Maximum
Units
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ELECTRICAL CHARACTERISTICS
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SS431/G
TYPICAL PERFORMANCE CHARACTERISTICS
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SS431/G
TEST CIRCUITS
APPLICATION INFORMATION
Where:
T2−T1=full temperature change.
αVREF can be positive or negative depending on
whether the slope is positive or negative.
Example: VDEV= 7.0mV, VREF= 2495mV,
T2−T1= 105°C, slope is negative.
VMAX
VDEV = VMAX-VMIN
VMIN
 7.0mV  106
 2495mV 
αVREF = 
= −27ppm/°C
105 °C
T1
TEMPERATURE
T2
Deviation of reference input voltage, V DEV, is defined as
the maximum variation of the reference input voltage
over the full temperature range.
The average temperature coefficient of the reference input voltage, αVREF is defined as:
ppm
∆VREF
=
°C
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
 6
 VMAX - VMIN  6
VDEV
±
±
10
10
REF
REF
V
(at
25
C)
V
(at
25
°
C)
°




=
T2 − T1
T2 − T1
Note 4. The dynamic output impedance, Rz, is defined as:
RZ =
∆VZ
∆IZ
When the device is programmed with two external resistors, R1 and R2, (see Fig. 2), the dynamic output
impedance of the overall circuit, is defined as:
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rz =
[ ]
∆V
≅ Rz 1+ R1
R2
∆I
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SS431/G
APPLICATION EXAMPLES
VIN
R1
RCL IOUT
VIN
SS431
RS
SS431
R1
IOUT=VREF/ RCL
IOUT=VREF /RS
Current Limiter or Current Source
VIN
RIN
Constant-Current Sink
VIN
VOUT
R3
FUSE
R3
VOUT
R1
R1
SS431
R2
SS431
R2
VOUT ≅ (1+R1/R2) x VREF
VLIMIT ≅ (1+R1/R2) x VREF
Higher-Current Shunt Regulator
Crow Bar
VIN
R1A
R3
R1B
C1
SS431
Output turns ON when
Low Limit <VIN < High Limit
+
SS431
R2A
R2B
R4
R5
VBE
Low Limit≅ VREF ( 1+ R1B/ R2B )+ VBE
High Limit ≅ VREF ( 1+ R1A/ R2A )
Over-Voltage/Under-Voltage Protection Circuit
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SS431/G
PHYSICAL DIMENSIONS
SOT-23
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SOT-89
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SS431/G
PHYSICAL DIMENSIONS TO-92
ORDERING INFORMATION
SS431(G)xBxx
TR: Tape and Reel Packing
Bandgap tolerance
B = 1%
Example: SS431GNBTR
Package type
N = SOT-23-3
T = TO-92
G = SOT-89
Lead finish option: G for Pb-free lead finish
SS431 with 1% tolerance in SOT-23-3 with pb-free lead
finish shipped on tape and reel
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no
guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no
responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its
use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including
without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to
the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of
Silicon Standard Corporation or any third parties.
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