SPE1211 Single-Line ESD Protection Array DESCRIPTION The SPE1211 are designed by TVS device that is to protect sensitive electronics from damage or latch-up due to ESD. They are designed for use in applications where board space is at a premium. SPE1211 will protect single line, and may be used on line where the signal polarities swing above and below ground. SPE1211 offer desirable characteristics for board level protection including fast response time, low operating and clamping voltage, and no device degradation. SPE1211 may be used to meet the immunity requirements of IEC 61000-4-2, level 4. The small SOD-523 package makes them ideal for use in portable electronics such as cell phones, PDA’s, notebook computers, and digital cameras. APPLICATIONS Cellular Handsets and Accessories Cordless Phone PDA Notebooks and Handhelds Portable Instrumentation Digital Cameras MP3 Player FEATURES Transient protection for data lines to IEC 61000-4-2 (ESD) ±15kV (air), ±8kV (contact) IEC 61000-4-4 (EFT) 40A (5/50ns) Protects single I/O lines Working voltage: 12V Low leakage current Low operating and clamping voltages PIN CONFIGURATION ( SOD-523 ) PART MARKING 2009/02/20 Ver.2 Page 1 SPE1211 Single-Line ESD Protection Array ORDERING INFORMATION Part Number Package SPE1211D52RG ※ SPE1211D52RG : Tape Reel ; Pb – Free Part SOD-523 Marking A ABSOULTE MAXIMUM RATINGS (TA=25℃ Unless otherwise noted) Parameter Symbol Typical Unit Peak Pulse Power ( tp = 8/20 μs ) Ppk 300 W Maximum Peak Pulse Current ( tp = 8/20 μs ) Ipp 15 A ESD per ICE 61000 – 4 – 2 (Air ) Vpp ±15 KV ESD per ICE 61000 – 4 – 2 (Contact ) Vpp ±8 KV TJ -55 ~ 150 ℃ Storage Temperature Range TSTG -55 ~ 150 ℃ Lead Soldering Temperature TL 260 ( 10sec ) ℃ Operating Junction Temperature ELECTRICAL CHARACTERISTICS (TA=25℃ Unless otherwise noted) Parameter Reverse Stand – Off Voltage Reverse Breakdown Voltage Symbol Conditions Min. VRWM VBR It = 1mA Typ Max. Unit 12 V 13.3 V Reverse Leakage Current IR VRWM = 12V , T=25℃ 1 μA Clamping Voltage VC Ipp = 5A , tp = 8/20 μs 19 V Clamping Voltage VC 25 V Junction Capacitance Cj Ipp =15A , tp = 8/20 μs Between I/O Pin and GND VR = 0V , f = 1MHz 100 pF 2009/02/20 Ver.2 Page 2 SPE1211 Single-Line ESD Protection Array TYPICAL CHARACTERISTICS Fig 1 : Junction Capacitance V.S Reverse Voltage Applied Fig 3 : Clamp Voltage V.S Peak Pulse Current 2009/02/20 Ver.2 Fig 2 : Peak Plus Power V.S Exponential Plus Duration Fig 4 : Forward Voltage Drop V.S Peak Forward Page 3 SPE1211 Single-Line ESD Protection Array APPLICATION NOTE Device Connection Options Circuit Diagram These TVS diodes are designed to protect one data, I/O, or power supply line. The device is unidirectional and may be used on lines where the signal polarity is above ground. The cathode band should be placed towards the line that is to be protected. Circuit Board Layout Recommendations for Suppression of ESD. Good circuit board layout is critical for the suppression of ESD induced transients. The following guidelines are recommended: ★ Place the TVS near the input terminals or connectors to restrict transient coupling. ★ Minimize the path length between the TVS and the protected line. ★ Minimize all conductive loops including power and ground loops. ★ The ESD transient return path to ground should be kept as short as possible. ★ Never run critical signals near board edges. ★ Use ground planes whenever possible. Matte Tin Lead Finish Matte tin has become the industry standard lead-free replacement for SnPb lead finishes. A matte tin finish is composed of 100% tin solder with large grains. Since the solder volume on the leads is small compared to the solder paste volume that is placed on the land pattern of the PCB, the reflow profile will be determined by the requirements of the solder paste. Therefore, these devices are compatible with both lead-free and SnPb assembly techniques. In addition, unlike other lead-free compositions, matte tin does not have any added alloys that can cause degradation of the solder joint. 2009/02/20 Ver.2 Page 4 SPE1211 Single-Line ESD Protection Array SOD-523 PACKAGE OUTLINE 2009/02/20 Ver.2 Page 5 SPE1211 Single-Line ESD Protection Array Information provided is alleged to be exact and consistent. SYNC Power Corporation presumes no responsibility for the penalties of use of such information or for any violation of patents or other rights of third parties which may result from its use. No license is granted by allegation or otherwise under any patent or patent rights of SYNC Power Corporation. Conditions mentioned in this publication are subject to change without notice. This publication surpasses and replaces all information previously supplied. SYNC Power Corporation products are not authorized for use as critical components in life support devices or systems without express written approval of SYNC Power Corporation. ©The SYNC Power logo is a registered trademark of SYNC Power Corporation ©2004 SYNC Power Corporation – Printed in Taiwan – All Rights Reserved SYNC Power Corporation 7F-2, No.3-1, Park Street NanKang District (NKSP), Taipei, Taiwan, 115, R.O.C Phone: 886-2-2655-8178 Fax: 886-2-2655-8468 ©http://www.syncpower.com 2009/02/20 Ver.2 Page 6