UM5051DA - Union Semiconductor

UM5051DA
Single Line ESD Protection Diode Array
UM5051DA DFN2 0.6×0.3
General Description
The UM5051DA ESD protection diode is designed to replace multilayer varistors (MLVs) in
portable applications such as cell phones, notebook computers, and PDA’s. They feature large
cross-sectional area junctions for conducting high transient currents, offer desirable electrical
characteristics for board level protection, such as fast response time, lower operating voltage,
lower clamping voltage and no device degradation when compared to MLVs. The UM5051DA
ESD protection diode protects sensitive semiconductor components from damage or upset due to
electrostatic discharge (ESD) and other voltage induced transient events. The UM5051DA is
available in DFN2 0.6mm×0.3mm package with working voltage of 5 volt. It gives designer the
flexibility to protect one unidirectional line in applications where arrays are not practical.
Additionally, it may be “sprinkled” around the board in applications where board space is at a
premium. It may be used to meet the ESD immunity requirements of IEC 61000-4-2, ±30kV air,
±25kV contact discharge.
Applications
Features









Cell Phone Handsets and Accessories
Personal Digital Assistants (PDA’s)
Notebooks, Desktops and Servers
Portable Instrumentation
Cordless Phones
Digital Cameras
Peripherals
MP3 Players
Pin Configurations
-







Transient Protection for Data Lines to IEC
61000-4-2 (ESD) ±30kV (Air), ±25kV
(Contact)
Small Package for Use in Portable Electronics
Suitable Replacement for MLV’s in ESD
Protection Applications
Protect One I/O or Power Line
Low Clamping Voltage
Stand-off Voltages: 5V
Low Leakage Current
Solid-State Silicon-Avalanche Technology
Top View
+
-
E
+
UM5051DA
DFN2 0.6×0.3
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UM5051DA
Ordering Information
Part
Number
Working
Voltage
Packaging Type
Channel
Marking
Code
Shipping Qty
UM5051DA
5.0V
DFN2 0.6×0.3
1
E
10000pcs/7 Inch
Tape & Reel
Absolute Maximum Ratings
RATING
SYMBOL
VALUE
UNITS
Peak Pulse Power (tp = 8/20μs)
PPK
60
Watts
Maximum Peak Pulse Current (t=8/20μs)
IPP
5
Amps
TL
TJ
TSTG
260 (10 sec.)
-55 to +125
-55 to +150
°C
°C
°C
Lead Soldering Temperature
Operating Temperature
Storage Temperature
Symbol Definition
PARAMETER
Maximum Reverse Peak Pulse Current
Clamping Voltage @ Ipp
Working Peak Reverse Voltage
Maximum Reverse Leakage Current @ VRWM
Breakdown Voltage @ It
Test Current
Forward Current
Forward Voltage @ IF
Peak Power Dissipation
Max. Capacitance @ VR = 0V, f = 1MHz
SYMBOL
IPP
VC
VRWM
IR
VBR
It
IF
VF
PPK
C
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UM5051DA
Electrical Characteristics
(T=25°C, Device for 5.0V Reverse Stand-off Voltage)
PARAMETER
SYMBOL
CONDITIONS
Reverse Stand-Off
VRWM
Voltage
Reverse Breakdown
VBR
It = 1mA
Voltage
Reverse Leakage
IR
VRWM = 5V, T=25°C
Current
Clamping Voltage
VC
IPP = 5A, tp = 8/20μs
Forward Voltage
VF
Junction Capacitance
Junction Capacitance
CJ
CJ
IF = 1mA
VR = 0V, f = 1MHz
MIN
TYP
6
VR = 2.5V, f = 1MHz
7.2
MAX
UNIT
5
V
7.8
V
1
μA
12
V
0.8
19
11
V
26
16
pF
pF
Applications Information
Device Connection Options
UM5051DA ESD protection diode is designed to protect one data, I/O, or power supply line. The
device is unidirectional and may be used on lines where the signal polarity is above ground. The
cathode dot should be placed towards the line that is to be protected.
Circuit Board Layout Recommendations for Suppression of ESD
Good circuit board layout is critical for the suppression of ESD induced transients. The following
guidelines are recommended:
1) Place the TVS near the input terminals or connectors to restrict transient coupling.
2) Minimize the path length between the TVS and the protected line.
3) Minimize all conductive loops including power and ground loops.
4) The ESD transient return path to ground should be kept as short as possible.
5) Never run critical signals near board edges.
6) Use ground planes whenever possible. For multilayer printed-circuit boards, use ground
vias.
7) Keep parallel signal paths to a minimum.
8) Avoid running protection conductors in parallel with unprotected conductor.
9) Minimize all printed-circuit board conductive loops including power and ground loops.
10) Avoid using shared transient return paths to a common ground point.
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UM5051DA
Package Information
UM5051DA DFN2 0.6×0.3
Outline Drawing
A
DIMENSIONS
MILLIMETERS
Min
Typ
Max
A
0.595
0.620
0.645
B
0.295
0.320
0.345
C
0.245
0.275
0.305
D
0.145
0.150
0.155
E
0.245
0.250
0.255
F
0.245
0.250
0.255
G
0.005
0.010
0.015
F
B
Symbol
E
D
G
C
D
Land Pattern
0.19
0.30
0.28
0.75
NOTES:
1. Compound dimension: 0.6×0.3;
2. Unit: mm;
3. General tolerance±0.025mm unless otherwise
specified;
4. The layout is just for reference.
Tape and Reel Orientation
E
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UM5051DA
IMPORTANT NOTICE
The information in this document has been carefully reviewed and is believed to be
accurate. Nonetheless, this document is subject to change without notice. Union assumes
no responsibility for any inaccuracies that may be contained in this document, and makes
no commitment to update or to keep current the contained information, or to notify a
person or organization of any update. Union reserves the right to make changes, at any
time, in order to improve reliability, function or design and to attempt to supply the best
product possible.
Union Semiconductor, Inc
Add: Unit 606, No.570 Shengxia Road, Shanghai 201210
Tel: 021-51093966
Fax: 021-51026018
Website: www.union-ic.com
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