Winbond Bus Termination Regulator W83310DS-A/W83310DG-A W83310DS-A/W83310DG-A W83310DS-A/W83310DG-A Datasheet Revision History PAGES 1 DATES VERSION 1/17/2006 0.5 VERSION ON WEB N.A. MAIN CONTENTS First released 2 3 4 5 6 7 8 Please note that all data and specifications are subject to change without notice. All the trademarks of products and companies mentioned in this datasheet belong to their respective owners. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Winbond customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Winbond for any damages resulting from such improper use or sales. -I- Publication Date: January 17, 2006 Revision 0.5 W83310DS-A/W83310DG-A Table of Contents1. GENERAL DESCRIPTION ......................................................................................................... 1 2. FEATURES ................................................................................................................................. 1 3. APPLICATIONS .......................................................................................................................... 1 4. PIN CONFIGURATION AND DESCRIPTION ............................................................................ 2 5. APPLICATION CIRCUIT............................................................................................................. 3 6. INTERNAL BLOCK DIAGRAM ................................................................................................... 4 7. ELECTRICAL CHARACTERISTICS........................................................................................... 5 7.1 AC CHARACTERISTICS................................................................................................ 5 8. 8. TYPICAL OPERATING WAVEFORM..................................................................................... 6 9. PACKAGE DIMENSION ........................................................................................................... 10 10. THERMAL PERFORMANCE.................................................................................................... 11 11. ORDERING INFORMATION .................................................................................................... 11 12. HOW TO READ THE TOP MARKING...................................................................................... 11 - II - Publication Date: January 17, 2006 Revision 0.5 W83310DS-A/W83310DG-A 1. GENERAL DESCRIPTION The W83310DS-A/W83310DG-A is a linear regulator provides a power achieves continuous 2.0Amp bi-directional sinking and driving capability for a high speed bus terminator application. The chip simply implements a stable power supply which tracks half of input power dynamically for bus terminator with a single chip. The W83310DS-A/W83310DG-A is promoted with small footprint 8-SOP 150mil power package. With W83310DS-A/W83310DG-A design, a high integration, high performance, and cost-effective solution are promoted. 2. FEATURES y Regulates a bi-directional power with driving and sinking capability y Provides achieve continuous 2.0Amp driving and sinking current y Power MOSFET integrated y Low external component count y Low output voltage offset y VCNTL Operates with +3.3V & 2.5 V power y 8-SOP 90mil small power package y Low cost and easy to use 3. APPLICATIONS y DDR/DDRII Bus Termination Regulator y Active Termination Bus y Intel® Springdale GMCH-VTT Support y SSTL-2 y SSTL-3 -1- Publication Date: January 17, 2006 Revision 0.5 W83310DS-A/W83310DG-A 4. PIN CONFIGURATION AND DESCRIPTION - W83310DS-A/W83310DG-A 8 NC VIN 1 GND 2 inbond VREF 3 VOUT 4 W83310DS-A/ W83310DG-A 7 NC 6 VCNTL 5 NC SYMBOL PIN FUNCTION VIN 1 Main power input pin. GND 2 Power ground. VREF 3 Reference voltage on the pin will be referred with the value of pin VOUT 4 Voltage output pin. NC 5 VCNTL 6 NC 7 NC 8 Internal reference voltage source. Power for internal control logic use -2- Publication Date: January 17, 2006 Revision 0.5 W83310DS-A/W83310DG-A 5. APPLICATION CIRCUIT - W83310DS-A/W83310DG-A for DDR SDRAM Application 2.5VREF R1 1K VRAM U1 C1 1 1000u 2 3 R2 1K DDRVTT 4 VIN GND NC 8 NC 7 VREF VCTRL VOUT NC 6 5 C2 10u W83310DS-A C3 C4 1u 1500u 3VDUAL -3- C5 0.1U Publication Date: January 17, 2006 Revision 0.5 W83310DS-A/W83310DG-A 6. INTERNAL BLOCK DIAGRAM VCTRL VIN Control Logic Circuit VREF VOUT GND -4- Publication Date: January 17, 2006 Revision 0.5 W83310DS-A/W83310DG-A 7. ELECTRICAL CHARACTERISTICS 7.1 AC CHARACTERISTICS Cout=1000uF, TA = 0°C to +70°C PARAMETER SYMBOL MIN TYP MAX UNITS Output Offset Voltage Vos -5 0 +5 mV 0.8 Load Regulation Input Voltage Range 1.62 Iout=0A Loading: 0AÆ2.0A % 0.8 VIN TEST CONDITIONS 3.63 VCNTL 3.3 3.63 Operating Current of VCNTL ICNTL 0.5 1 Short Current Limit ILMT 4.0 Loading: 2.0A 0AÆ- V mA No Load(Iout=0A) A Note: Load regulation is tested by using a 1ms current pulse and VOUT measuring. -5- Publication Date: January 17, 2006 Revision 0.5 W83310DS-A/W83310DG-A 8. TYPICAL OPERATING WAVEFORM Load regulation with test condition - VCTRL=3.3V; VIN=2.5V; VOUT=1.225V; 2.0Amp pulse driving current. Load regulation with test condition - VCTRL=3.3V; VIN=2.5V; VOUT=1.225V; 2.0Amp pulse sinking current. -6- Publication Date: January 17, 2006 Revision 0.5 W83310DS-A/W83310DG-A Load regulation with test condition - VCTRL=3.3V; VIN=2.5V; VOUT=1.45V; 2.0Amp pulse driving current. Load regulation with test condition - VCTRL=3.3V; VIN=2.5V; VOUT=1.45V; 2.0Amp pulse sinking current. -7- Publication Date: January 17, 2006 Revision 0.5 W83310DS-A/W83310DG-A Load regulation with test condition - VCTRL=3.3V; VIN=2.5V; VOUT=1.25V; 2.0Amp pulse driving current. Load regulation with test condition - VCTRL=3.3V; VIN=2.5V; VOUT=1.25V; 2.0Amp pulse sinking current. -8- Publication Date: January 17, 2006 Revision 0.5 W83310DS-A/W83310DG-A Short Current Limit - VCTRL = 3.3V - VCTRL = 3.6V -9- Publication Date: January 17, 2006 Revision 0.5 W83310DS-A/W83310DG-A 9. PACKAGE DIMENSION 8L Power SOP 150mil - 10 - Publication Date: January 17, 2006 Revision 0.5 W83310DS-A/W83310DG-A 10. THERMAL PERFORMANCE TEST ON FOUR-LAYER (2S2P) JEDEC TEST BOARD COMPONENT TEMP. (OC) Θ JC PACKAGE POWER (W) PACKAGE DIE DOWNSET LEAD AMBIENT ( C /W) PSOP-8 3.05 100 145 79 78 25 14.7 O An area of 190mil*150mil on the top layer is use as a thermal pad for W83310DS and this is connected to the bottom layer by vias. The Θja of the W83310DS mounted on this demo board is about 39 oC /W.Assuming the TA=25 oC and TJ=160 oC,the maximum power dissipation is calculated as: PD(max)=(160-25)/39=3.46W 11. ORDERING INFORMATION PART NUMBER PACKAGE TYPE W83310DS-A Power SOP-8 W83310DG-A Power SOP-8 PRODUCTION FLOW 12. HOW TO READ THE TOP MARKING W83 310DG-A 249GA W83 310DS-A 249GA Left line: Winbond logo 1st & 2nd line: W83310DS-A/W83310DG-A – the part number 3rd line: Tracking code 318 G A 318: packages assembled in Year 03’, week 18 G: assembly house ID; O means OSE, G means GR, etc. A: the IC version - 11 - Publication Date: January 17, 2006 Revision 0.5 W83310DS-A/W83310DG-A Important Notice Winbond products are not designed, intended, authorized or warranted for use as components in systems or equipment intended for surgical implantation, atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, or for other applications intended to support or sustain life. Further more, Winbond products are not intended for applications wherein failure of Winbond products could result or lead to a situation wherein personal injury, death or severe property or environmental damage could occur. Winbond customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Winbond for any damages resulting from such improper use or sales. - 12 - Publication Date: January 17, 2006 Revision 0.5