AMI AMIS39101AGA

AMIS-39101: Octal High-Side Driver with Protection
Data Sheet
1.0 General Description
The AMIS-39101 is a robust high-side driver IC featuring eight independent high current output drive channels along with a number of
integrated fault-protection circuits. This highly integrated product is designed for controlled delivery of power to a large variety of loads
in industrial applications including motors, relays and LED arrays, among others. With all driver output channels in the conducting state,
each channel can source up to 350mA of continuous current (resistive load). In cases where all output drivers are not active, higher
output current per channel can be achieved provided that the thermal limits of the device are not exceeded. Furthermore, in order to
minimize system cost each output driver has built-in fly-back diodes. The device withstands short-circuits to ground and supply,
respectively. It is designed with an array of integrated protection features including over-temperature and over-current detection and
shut down. The integrated charge pump requires only one external capacitor and provides for operation of the critical fault-protection
circuitry even in case of low supply voltages. The device can be interfaced to a variety of microcontrollers via the serial peripheral
interface (SPI) link, in turn allowing for monitoring and controlling the state of each of the output drivers individually. In this case, at the
onset of a potential hazardous situation the drivers are switched off and the diagnostic state of the drivers can be extracted via the SPI
interface. The device also features a power down mode for reduced power consumption and has high built-in electrostatic discharge
(ESD) protection capability for robust operation.
2.0 Key Features
•
•
•
•
•
•
•
•
•
•
•
•
Eight high-side output drivers
Up to 830mA continuous current per driver pair (resistive load)
Charge pump with one external capacitor
SPI
Short-circuit protection
Diagnostic features
Power-down mode
Internal thermal shutdown
3.3V and 5V microcontroller compliant
Excellent system ESD
Automotive compliant
SO28 package with low Rthja
3.0 Typical Applications
•
•
•
•
•
Actuator control
LED drivers
Relays and solenoids
Industrial process control
Automotive load management
4.0 Ordering Information
Product Name
AMIS39101AGA
Package
PSOP 300-28 (JEDEC MS-013)
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Temperature Range
-40°C…85°C
1
AMIS-39101: Octal High-Side Driver with Protection
5.0 Block Diagram
Figure 1: Block Diagram
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Data Sheet
AMIS-39101: Octal High-Side Driver with Protection
Data Sheet
6.0 Typical Application Diagram
Figure 2: Typical Application Diagram
6.1 External Components
It is important to properly decouple the power supplies of the chip with external capacitors that have good high frequency properties.
The VS1, VS2, VS3, and VS4 pins are shorted on the PCB level. Also GND1, GND2, GND3, GND4, GND5, GND6, TEST, TEST1, and
TEST2 are shorted on the PCB level.
Table 1: External Components
Component
Function
Min.
CVS
100
Decoupling capacitor; X7R
Ccharge_pump
(1)
Charge pump capacitor
Value
0.47
EMC connector on connector
1
Cout
(2)
Decoupling capacitors; 50V
22
CVDD
Decoupling capacitors; 50V
22
RLoad
Load resistance
65
LLoad
Load inductance at maximum current
300
Notes:
(1)
(2)
The capacitor must be placed close to the AMIS-39101 pins on the PCB.
Both capacitors are optional and depend on the final application and board layout.
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Tol. [%]
Units
± 20
nF
47
(2)
Cout
Max.
nF
nF
± 20
nF
± 20
nF
± 10
350
Ω
mH
AMIS-39101: Octal High-Side Driver with Protection
7.0 Pin Description
Figure 3: Pin Description of the AMIS-39101
Table 2: Pin Out
Pin
Name
1
TEST1
2
CLK
3
WR
4
OUT1
5
VS1
6
OUT2
7
GND1
8
GND2
9
OUT3
10
VS2
11
OUT4
12
DIN
13
DOUT
14
TEST2
15
GND3
16
TEST
17
CAPA1
18
OUT5
19
VS3
20
OUT6
21
GND4
22
GND5
23
OUT7
24
VS4
25
OUT8
26
PDB
27
VDDN
28
GND6
Description
Connect to GND
Schmitt trigger SPI CLK input
Schmitt trigger SPI write enable input
HS driver output
VS power supply
HS driver output
Power ground and thermal dissipation path junction-to-PCB
Power ground and thermal dissipation path junction-to-PCB
S driver output
VS power supply
HS driver output
SPI input pin (Schmitt trigger or CMOS inverter)
Digital three state output for SPI
Connect to GND
Power ground and thermal dissipation path junction-to-PCB
Connect to GND
Charge pump capacitor pin
HS driver output
VS power supply
HS driver output
Power ground and thermal dissipation path junction-to-PCB
Power ground and thermal dissipation path junction-to-PCB
HS driver output
VS power supply
HS driver output
Schmitt trigger power-down input
Digital supply
Power ground and thermal dissipation path junction-to-PCB
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Data Sheet
AMIS-39101: Octal High-Side Driver with Protection
Data Sheet
8.0 Electrical and Environmental Ratings
8.1 Absolute Maximum Ratings
Stress levels above those listed in this paragraph may cause immediate and permanent device failure. It is not recommended that
more than one of these conditions be applied simultaneously.
Table 3: Absolute Maximum Ratings
Symbol
Description
VDDN
Power supply voltage
VS power supply on pins VS1 to VS4, load dump,
VS
Pulse 5b 400ms
(1)
Maximum output current OUTx pins
Iout_ON
The HS driver is switched on
(1)
Maximum output current OUTx pins
Iout_OFF
The HS driver is switched off
I_OUT_VS
Maximum output current VS1, 2, 3, 4 pins
Vcapa1
DC voltage on pin CAPA1
Vdig_in
Voltage on digital inputs CLK, PDB, WR, DIN
(2)
Pins that connect the application (pins VS1..4 and Out1..8)
VESD
(2)
All other pins
(3)
VESD
ESD according charged device model
Tj
Junction temperature (T<100 hours)
Tmr
Ambient temperature under bias
Notes:
(1)
(2)
(3)
Min.
GND - 0.3
Max.
6
Unit
V
GND - 0.3
35
V
-3000
350
mA
-350
350
mA
-700
0
-0.3
-4
-2
-750
-40
-40
3750
VS+16.5
VDDN+0.3
+4
+2
+750
175
85
mA
V
V
kV
kV
V
°C
°C
The power dissipation of the chip must be limited not to exceed the maximum junction temperature Tj.
According to HBM standard MIL-STD-883 method 3015.7.
According to norm EOS/ESD-STM5.3.1-1999 robotic mode.
8.2 Thermal Characteristics
Table 4: Thermal Characteristics of the Package
Symbol
Description
Rth(vj-a)
Thermal resistance from junction to ambient in power-SO28 package
Conditions
In free air
Table 5: Thermal Characteristics of the AMIS-39101 on a PCB
PCB Design
Conductivity Top and Bottom Layer
Two layer (35um)
Copper planes according to Figure 4 + 25% copper for the remaining areas
Two layer (35um)
Copper planes according to Figure 4 + 0% copper for the remaining areas
Four layer JEDEC: 25% copper coverage
EIA/JESD51-7
One layer JEDEC: 25% copper coverage
EIA/JESD51-3
Note:
(1)
These values are for general information purposes only, and will change based on each specific PCB design.
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Value
145
Unit
K/W
(1)
Unit
K/W
K/W
K/W
Rthja
24
53
25
46
K/W
AMIS-39101: Octal High-Side Driver with Protection
7.5
17.9
Top PCB view
5 mm
5 mm
5 mm
114.3
5 mm
GND copper
76.2
Bottom PCB view
114.3
Ground plane GND copper
25 % filled by GND copper
76.2
Figure 4: Layout Recommendation for Thermal Characteristics
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Data Sheet
AMIS-39101: Octal High-Side Driver with Protection
Data Sheet
8.3 Electrical Parameters
Operation outside the operating ranges for extended periods may affect device reliability. Total cumulative dwell time above the
maximum operating rating for the power supply or temperature must be less than 100 hours.
The parameters below are independent from load type (see Section 8.4).
8.3.1. Operating Ranges
Table 6: Operating Ranges
Symbol
Description
Min.
Max.
Unit
VDDN
Digital power supply voltage
3.1
5.5
V
Vdig_in
Voltage on digital inputs CLK, PDB, WR, DIN
-0.3
VDDN
V
VS power supply on Pins VS1 to VS4
3.5
28
V
Ambient temperature
-40
85
°C
Min.
Max.
Unit
3.5
mA
25
µA
40
µA
10
µA
1.6
mA
1
3
2
Ω
Ω
A
VS
(1)
Tamb
Note:
(1)
The power dissipation of the chip must be limited not to exceed maximum junction temperature Tj of 130°C.
8.3.2. Electrical Characteristics
Table 7: Electrical Characteristics
Symbol
Description
Consumption on VS without load currents
(1)
I_VS_norm
In normal mode of operation PDB = high
Sum of VS and VDDN consumption in power-down mode of operation
(1)(2)
I_PDB_3.3
PDB = low, VDDN 3.3V, VS = 24V, 23°C ambient
CLK and WR are at VDDN voltage
Sum of VS and VDDN consumption in power-down mode of operation
(1)(2)
I_PDB_5
PDB = low, VDDN 5V, VS = 24V, 23°C ambient
CLK and WR are at VDDN voltage
I_PDB_MAX_VS
VS consumption in power-down mode of operation PDB = low, VS = 28V
Consumption on VDDN
(1)
In normal mode of operation PDB = high
I_VDDN_norm
CLK is 500kHz, VDDN = 5.5V, VS = 28V
On resistance of the output drivers 1 through 8
t VS= 24V (nominal VS power supply condition)
R_on_1..8
t VS = 4.6V (worst case VS power supply condition)
(1)
I_OUT_lim_x
Internal over-current limitation of HS driver outputs
The time from short of HS driver OUTx pin to GND and the driver
deactivation; driver is Off
T_shortGND_HSdoff
Detection works from VS minimum of 7V
VDDN minimum is 3V
(1)
TSD_H
High TSD threshold for junction temperature (temperature rising)
TSD_HYST
TSD hysteresis for junction temperature
Notes:
(1)
(2)
The power dissipation of the chip must be limited not to exceed maximum junction temperature Tj.
The cumulative operation time mentioned above may cause permanent device failure.
8.4 Load Specific Parameters
High-side driver parameters for specific loads are specified in following categories:
A. Parameters for inductive loads up to 350mH and Tambient up to 85°C
B. Parameters for inductive loads up to 300mH and Tambient up to 85°C
C. Parameters for resistive loads and Tambient up to 85°C
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0.65
5,4
130
9
µs
170
18
°C
°C
AMIS-39101: Octal High-Side Driver with Protection
Table 8: Load Specific Characteristics
A. Inductive Load up to 350mH and Tambient up to 85°C
Symbol
Description
Maximum output per HS driver, all eight drivers might be active
I_OUT_ON_max.
simultaneously
B. Inductive Load up to 300mH and Tambient up to 85°C
Maximum output per HS driver, all eight drivers might be active
I_OUT_ON_max.
simultaneously
C. Resistive Load and Tambient up to 85°C
Maximum output per HS driver, all eight drivers might be active
I_OUT_ON_max.
simultaneously
Maximum output per one HS driver, only one can be active
Maximum output per HS driver, only two HS drivers from a different pair can
be active simultaneously
Maximum output per one HS driver pair
Min.
Data Sheet
Max.
Unit
240
mA
275
mA
350
mA
650
mA
500
mA
830
mA
Note: The parameters above are not tested in production but are guaranteed by design. The overall current capability limitations need to be respected at all times.
The maximum current specified in Table 8 cannot always be obtained. The practically obtainable maximum drive current heavily
depends on the thermal design of the application PCB (see Section 8.2).
The available power in the package is: (TSD_H - T_ambient) / Rthja
With TSD_H = 130°C and Rthja according to Table 5.
8.5 Charge Pump
The high-side drivers use floating NDMOS transistors as power devices. To provide the gate voltages for the NDMOS of the high-side
drivers, a charge pump is integrated. The storage capacitor is an external one. The charge pump oscillator has typical frequency of
4MHz.
8.6 Diagnostics
8.6.1. Short Circuit Diagnostics
The diagnostic circuit in the AMIS-39101 monitors the actual output status at the pins of the device and stores the result in the
diagnostic register which is then latched in the output register at the rising edge of the WR-pin. Each driver has its corresponding
diagnostic bit DIAG_x. By comparing the actual output status (DIAG_x) with the requested driver status (CMD_x) you can diagnose the
correct operation of the application according to Table 9.
8.6.2. Thermal Shutdown (TSD) Diagnostic
In case of TSD activation, all bits DIAG 1 to DIAG 8 in the SPI output register are set into the fault state and all drivers will be switched
off (see Table 9).
The TSD error condition is active until it is reset by the next correct communication on SPI interface (i.e. number of clock pulses during
WR=0 is divisible by 8), provided that the device has cooled down under the TSD trip point.
Table 9: OUT Diagnostics
Requested Driver Status
On
On
CMD_x
1
1
Actual Output Status
High
Low
DIAG_x
1
0
Off
0
High
1
Off
0
Low
0
Notes:
(1)
(2)
Diagnosis
Normal state
(2)
Short to ground or TSD
(1)
Short to VS or missing load or
(2)
TSD
(1)
Normal state
The correct diagnostic information is available after T_diagnostic_OFF time.
All 8 diagnostic bits DIAG_x must be in the fault condition to conclude a TSD diagnostic.
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AMIS-39101: Octal High-Side Driver with Protection
Data Sheet
8.6.3. Ground Loss
Due to its design, the AMIS-39101 is protected for withstanding module ground loss and driver output shorted to ground at the same
time.
8.6.4. Power Loss
Table 10: Power Loss
VDDN
VS
0
0
0
1
1
0
1
1
Possible Case
System stopped
Start case or sleeping mode with missing VDDN
Missing VS supply
VDDN normally present
System functional
Action
Nothing
Eight switches in the off-state
Power down consumption on VS
Eight switches in the off-state
Normal consumption on VDDN
Nominal functionality
8.7 SPI interface
The serial peripheral interface (SPI) is used to allow an external microcontroller (MCU) to communicate with the device. The
AMIS-39101 acts always as a slave and it can’t initiate any transmission.
8.7.1. SPI Transfer Format and Pin Signals
The SPI block diagram and timing characteristics are shown in Figure 6 and Figure 7.
During an SPI transfer, data is simultaneously sent to and received from the device. A serial clock line (CLK) synchronizes shifting and
sampling of the information on the two serial data lines (DIN and DOUT). DOUT signal is the output from the AMIS-39101 to the
external MCU and DIN signal is the input from the MCU to the AMIS-39101. The WR-pin selects the AMIS-39101 for communication
and can also be used as a chip select (CS) in a multiple-slave system. The WR-pin is active low. If AMIS-39101 is not selected, DOUT
is in high impedance state and it does not interfere with SPI bus activities. Since AMIS-39101 always shifts data out on the rising edge
and samples the input data also on the rising edge of the CLK signal, the MCU SPI port must be configured to match this operation.
SPI clock idles high between the transferred bytes.
The diagram in Figure 7 represents the SPI timing diagram for 8-bit communication.
Communication starts with a falling edge on the WR-pin which latches the status of the diagnostic register into the SPI output register.
Subsequently, the CMD_x bits – representing the newly requested driver status – are shifted into the input register and simultaneously,
the DIAG_x bits – representing the actual output status – are shifted out. The bits are shifted with x=1 first and ending with x=8. At the
rising edge of the WR-pin, the data in the input register is latched into the command register and all drivers are simultaneously
switching to the newly requested status. SPI communication is ended.
In case the SPI master does only support 16-bit communication, then the master must first send 8 clock pulses with dummy DIN data
and ignoring the DOUT data. For the next 8 clock pulses the above description can be applied.
The required timing for serial to peripheral interface is shown in Table 11.
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AMIS-39101: Octal High-Side Driver with Protection
Table 11: Digital Characteristics
Symbol
Description
T_CLK
Maximum applied clock frequency on CLK input
T_DATA_ready
Time between falling edge on WR and first bit of data ready on
DOUT output
(driver going from HZ state to output of first diagnostic bit)
T_CLK_first
First clock edge from falling edge on WR
(1)
T_setup
Setup time on DIN
(1)
T_hold
Hold time on DIN
T_DATA_next
Time between rising edge on CLK and next bit ready on DOUT (capa
on DOUT is 30pF max.)
T_SPI_END
Time between last CLK edge and WR rising edge
T_risefall
Rise and fall time of all applied signals
(maximum loading capacitance is 30pF)
T_WR
Time between two rising edge on WR
(repetition of the same command)
Min.
Data Sheet
Max.
500
2
Unit
kHz
µs
100
µs
ns
ns
ns
20
µs
ns
3
20
20
1
5
300
µs
Note:
(1)
Guaranteed by design
Normal mode verification:
• The command is the set of eight bits loaded via SPI, which drives the eight HS drivers on or off.
• The command is activated with rising edge on WR pin.
Table 12: Digital Characteristics
Symbol
T_command_L_max.
T_command_R
(1)
(1)
T_PDB_recov
Description
Min.
Minimum time between two opposite commands for inductive
loads and maximum HS driver current of 275mA
Minimum time between two opposite commands for resistive
loads and maximum HS driver current of 350mA
The time between the rising edge on the PDB input and 90
percent of VS-1V on all HS driver outputs. (all drivers are
activated, pure resistive load 35mA on all outputs)
Note:
(1)
Guaranteed by design
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Max.
Unit
1
s
2
ms
1
ms
AMIS-39101: Octal High-Side Driver with Protection
Data Sheet
Figure 5: Timing for Power-down Recovery
DOUT
OUTPUT REGISTER
INPUT REGISTER
DIN
CMD8
CMD DRIVER
COMMAND
CMD8
DIAG
CMD1
8
DIAGNOSTIC
REGISTER
DIAG
CMD1
MEMOCMD
8
CMDx
DIAGx
High Side
Driver
OUTx
Figure 6: SPI Block Diagram
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STATE DIAG
11
DIAG
1
REGISTER
MEMO DIAG
DIAG
1
AMIS-39101: Octal High-Side Driver with Protection
Data Sheet
Transfer from input registers to
the com m and registers
(Rising edge on W R)
Transfer data from diagnostic registers
to the output registers
Falling edge on W R
WR
CLK
1
2
3
4
5
6
7
8
CM D CM D CMD CM D CMD CMD CMD CM D
5
6
7
3
4
1
2
8
DIN
O UT
DIN : DRIVER COMM AND
DOUT
DIAG DIAG DIAGDIAG DIAG DIAG DIAG DIAG
5
6
7
2
3
4
8
1
High Z
IN
DO UT: O UTPU Ts THE STATE O F DIAG NO STICs
O UT1 to 8
Figure 7: Timing Diagram
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High Z
AMIS-39101: Octal High-Side Driver with Protection
9.0 Assembly and Delivery
Figure 8: Package Outline Drawing
For detailed mechanical data, please refer to the AMIS Packaging Handbook;
(http://www.amis.com/tech_resources/packaging/index.html), specification number 16505.
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Data Sheet
AMIS-39101: Octal High-Side Driver with Protection
Data Sheet
10.0 Quality and Reliability
A quality system with certification against TS16949 is maintained.
An AEC-Q100 compatible product qualification is performed. Monitoring of production is performed according to the dedicated AMIS
specifications for assembly and wafer fabrication.
All products are tested using a production test program. Lot conformance to specification in volume production is guaranteed by means
of following quality conformance tests:
Table 13: Qualification
QC Test
Electrical functional and
parametric
External visual
(mechanical)
External visual
(cosmetic)
Conditions
To product data sheet
Physical damage to body or leads (e.g. bent leads)
Dimensions affecting PCB manufacturability
(e.g. coplanarity)
Correctness of marking
All other cosmetic defects
Each production lot will be accompanied with a Certificate of Conformance.
11.0 Revision History
Table 14: Revision History
Revision
Date
0.1
Various
Description
Initial document
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AQL Level
0.04
Inspection Level
II
0.15
II
0.65
II
AMIS-39101: Octal High-Side Driver with Protection
Data Sheet
12.0 Company or Product Inquiries
For more information about AMI Semiconductor’s products or services visit our Web site at http://www.amis.com.
Devices sold by AMIS are covered by the warranty and patent indemnification provisions appearing in its Terms of Sale only. AMIS makes no warranty, express,
statutory, implied or by description, regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. AMIS
makes no warranty of merchantability or fitness for any purposes. AMIS reserves the right to discontinue production and change specifications and prices at any
time and without notice. AMI Semiconductor's products are intended for use in commercial applications. Applications requiring extended temperature range,
unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment, are specifically not
recommended without additional processing by AMIS for such applications. Copyright ©2006 AMI Semiconductor, Inc.
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