AWT1921 Integrated High Power Amp 1610 MHz PRELIMINARY DATA SHEET - Rev 1.0 FEATURES High Output Intercept Point High Linearity True Surface Mount Package Internal Bias Circuit Requiring Nominal Input Voltages + 10% Low Cost Off Chip Output Matching Circuit Allows Application Optimization PRODUCT DESCRIPTION The AWT1921 is a four stage monolithic amplifier for use in communication systems that require high gain and output intercept point. The device has been specifically designed for fixed satellite access equipment and handset booster amplifier applications. S11 SSOP-28 28 Pin Wide Body w/ Heat Slug Table 1: Pin Description PIN N AME D ESC R IPTION 1,14,15,28, slug GND 2 VGS1 & RFIN Fi rst Stage Gate termi nal & RF Input 27 V DD Posi ti ve Supply of Bi as C i rcui t(+5V) 4 V D2 Second Stage drai n supply (+9V 3 V D1 Fi rst Stage drai n supply (+9V) 5,6,7,8 GND 9,10 V D3 Thi rd Stage drai n supply (+9V) 11 VGS2 Second Stage Gate Termi nal 26 VREF Bi as control Pi n (+5V) 12 V SS Negati ve Supply for Bi as C i rcui t (-5V) 13 VGS3 Thi rd Stage Gate termi nal 16,17 VGS4 Fourth Stage Gate termi nal 18-25 V D4 AC and RF Ground Fi rst and Second Stage Source ground Fourth Stage drai n supply (+9V) & RF out 08/2001 Pin 28 Pin 1 GND VGS1/RFIN VD1 VD2 GND GND GND GND VD3 VD3 VGS2 VSS VGS3 GND Pin 14 GND VDD VREF VD4 VD4 VD4 VD4 VD4 VD4 VD4 VD4 VGS4 VGS4 GND Pin 15 Figure 1: Pin Layout AWT1921 ELECTRICAL CHARACTERISTICS Table 2: Electrical Specifications (1) (Pin with CDMA modulation, fo = 1610 1626.5 MHz, VDS1 = VDS2 = VDS3 = VDS4 = 9.0V,VSS = -5V,VREF=+5V,VDD=+5V, Tc=25C, 50 W System(2)) PAR AMETER MIN Frequency 1610 TYP MAX 1626.5 U N IT MHz Power Output 35 36 dB m Power Added Effi ci ency - 25 % 27 30 dB - 25 -28 - -45 -52 -45 Stabi li ty: - 60 dBc all spuri ous outputs relati ve to desi red si gnal - - Bi as Supply C urrents ISS IREF IDD - 15 5 15 Gai n(3) AC PR(3) 0.730 MHz 1.23 MHz Harmoni cs 2nd 3rd 4th 100 dB c dB c 3:1 VSWR load, all phase angles mA Qui escent C urrents IDQ1 IDQ2 IDQ3 IDQ4 - Input Return Loss - 11 - dB Gai n Flatness(3) @ POUT = +35 dBm - 0.8 - dB Thermal Resi stance - 4.5 - C /W (4) 60 90 150 200 - mA Notes: 1. As measured in ANADIGICS test fixture, see application section. 2. 50W Measurement system after off chip matching circuit, input terminated in 50W. 3. Measured at POUT= +35 dBm 4. Thermal Resistance for junction to bottom of slug Θjc 2 Tj − Tc (ID1 + ID 2 + ID 3 + ID 4)VSUP − POUT PRELIMINARY DATA SHEET - Rev 1.0 08/2001 AWT1921 Table 3: Absolute Max Ratings PIN N AME MAX R ATIN G PIN N AME MAX R ATIN G 2 VDD +7VD C 11 VREF +7 VD C 3 RFIN +20 dBm 12 V SS -7 VD C 18,19,20,21,22,23,24,25 V D3 +10 VD C 4,5 V D1 +10 VD C 8,9 VD2 +10 VD C Stresses in excess of the absolute ratings may cause permanent damage. Functional operation is not implied under these conditions. Exposure to absolute ratings for extended periods of time may adversely affect reliability. Operating Temperature: - 30 to + 85 °C Storage Temperature: - 55 to +100 °C PRELIMINARY DATA SHEET - Rev 1.0 08/2001 3 AWT1921 PERFORMANCE DATA Figure 2: ACPR @ POUT = 35 dBm Figure 3: ACPR @ POUT = 35 dBm Figure 4: POUT & Eff vs Pin Figure 5: POUT vs Supply Voltage 40 40 90 39 80 35 70 38 60 30 50 40 25 30 Pout Eff 37 Pout 36 20 20 35 10 15 0 -15 -10 -5 0 5 10 15 34 5 5.5 6 Pin (dBm) 7 7.5 8 8.5 9 9.5 Vsup(v) * POUT with CDMA Modulation 4 6.5 PIN = 10 dBm, with CDMA Modulation PRELIMINARY DATA SHEET - Rev 1.0 08/2001 AWT1921 Figure 7: S11 Forward Reflection Impedance Figure 6: S11 Forward Reflection Impedance Impedance as seen by VDS1 IMPEDANCE 1 .5 CH 1 - S11 REFERENCE PLANE 6.3507 cm 2 3 2 5 .2 1 1 .5 2 MARKER TO MAX MARKER TO MIN 1 0.100000000 GHz 45.066 -10.839 j 3.225500000 GHz 3 7.790 112.368 j 5 4 -5 -.2 -.5 4 4.800000000 GHz 164.733 -244.870 j -2 1 4 .2 5 1 .2 .5 .2 5 1 0 .2 .5 1 2 5 -5 -.2 -.5 1 2 5 -5 -.2 3 -2 -1 MARKER TO MAX MARKER TO MIN 1 0.100000000 GHz 46.485 8.658 j 3 3.225500000 GHz 13.359 -31.442 j 4 4.800000000 GHz 6.663 16.669 j MARKER READOUT FUNCTIONS Figure 9: S11 Forward Reflection Impedance Impedance as seen by VDS4 CH 1 - S11 REFERENCE PLANE 6.3507 cm MARKER 2 1.615750000 GHz 423.067 m 4.971 j 2 2 0 MARKER 2 1.615750000 GHz 4.443 86.992 j 4 0.100000000 - 4.800000000 GHz 4.800000000 GHz Impedance as seen by VDS3 .5 2 -.5 Figure 8: S11 Forward Reflection Impedance 3 CH 1- S11 REFERENCE PLANE 6.3507 cm 2 MARKER READOUT FUNCTIONS -1 0.100000000 - 1 .5 MARKER 2 1.615750000 GHz 542.467 m 34.621 j .2 0 Impedance as seen by VDS2 MARKER TO MAX MARKER TO MIN 1 0.100000000 GHz 46.696 -381.126 jm 3 3.225500000 GHz 2.436 18.889 j 4 4.800000000 GHz 2.544 31.529 j -2 -1 MARKER READOUT FUNCTIONS GHz 0.100000000 4.800000000 - PRELIMINARY DATA SHEET - Rev 1.0 08/2001 5 AWT1921 F3 C1 C4 F2 C7 C3 AWT1921S11 F1 C10 C5 RFIN 10 9 VD3 4 V D2 3 V D1 2 RFIN /VGS1 5 6 GND 7 8 C11 L5 R5 C23 R4 C12 VD2 C13 R3 GND RFOUT 23 22 21 20 C14 C19 C18 19 18 VGS2 VSS 11 12 VGS4 16 17 C15 C16 C17 R2 C20 F5 C21 F4 SLUG VD1 VD4 1 14 15 28 VD3 26 VREF 27 VDD 13 VG3 25 24 VDD/VREF VG4 C22 VSS VD4 Figure 10: 1610 - 1626.5 MHz Test Circuit Schematic GND Table 4: Pin Designations 6 D ESIGN ATION VALU E C 1,C 3,C 5,C 22 2.2 F C 2,C 7,C 9,C 24 Not Used C4 15 pF C 6, C 10 10 pF C 11,C 19 27 pF C 12,C 13,C 20,C 21 33 pF C 14,C 16,C 17,C 23 0.01 uF C 15 22 pF C 18 4.7 pF F1,F2,F3,F4,F5 Feri tte L1,L3 Shi m L2 2.7 nH L4 8 nH L5 47 nH R2, R5 5600 R3 1500 R4 2200 Procedure for Amplifier Operation and Test 1) Slug must be thermally and electrically connected to obtain rated performance. 2) The VSS voltage should be applied first to the amplifier prior to VD1, VD2, VD3, or VD4 voltages. 3) VGS1, VGS2, VGS3, VGS4 may be used as monitor points to verify that the bias circuit is working properly. These pins should measure as negative voltage potential, after VSS is applied. 4) The Bias Pins VDD and VREF may be applied with no VSS voltage present. 5) Always follow ESD precautions when handling these devices. PRELIMINARY DATA SHEET - Rev 1.0 08/2001 AWT1921 Notes: 1. 2. 3. 4. Material 6 layer FR4 1 oz. copper 14 mil layers Gerber files available Figure 11: 1610 - 1626.5 MHz Test Circuit Layout Table 5: Parts List Table D ESIGN ATION VALU E MAN U FAC TU R E MAN U FAC TU R E PAR T # W E B AD D R E S S C 1,C 3,C 5,C 22 2.2 m F Panasoni c EC S-H1AY225R www.panasoni c.com C 2,C 7,C 9,C 24 Not Used C4 15 pF Murata GRM36C OG150J50 www.murata.com C 6,C 10 10 pF Murata GRM36C OG100J50 C 11,C 19 27 pF Murata GRM36C OG270J50 www.murata.com C 12,C 13,C 20,C 21 33 pF Murata GRM36C OG330J50 www.murata.com C 14,C 16,C 17, C 23 0.01 uF Murata GRM36X7R103K16 www.murata.com C 15 22 pF Murata GRM36C OG220J50 www.murata.com C 18 4.7 pF Ameri can Techni cal C erami cs ATC 100A4R7C W150X www.atc-cap.com F1,F2,F3,F4,F5 Ferri te 47W @ 100 Tai yo Yuden MHz, 1A Rati ng BK2125HS470 www.t-yuden.com L1, L3 Shi m L2 2.7 nH Toko LL2012-F2N7S www.tokoam.com L4 8 nH C oi lcraft A 03T www.coi lcraft.com L5 47 nH C oi lcraft 0805C S470XMBC www.coi lcraft.com R2,R5 5600 W Panasoni c ERJ-36SYJ562V www.panasoni c.com R3 1500 W Panasoni c ERJ-36SYJ302V www.panasoni c.com R4 2200 W Panasoni c ERJ-36SYJ512V www.panasoni c.com PRELIMINARY DATA SHEET - Rev 1.0 08/2001 7 AWT1921 D C T L LE HEAT SINK SLUG S E h a A2 A A1 e Notes: 1. Controlling dimensions : inches 2. Dimension "d" does not include mold flash, protrusions or gate burrs. Mold flash, rotrusions and gate burrs shall not exceed 0.006 (0.16mm) 3. Dimension "e" does not include inter-lead or protrusions. Inter-lead flash and protrusions shall not exceed 4. 0.010 (0.25mm) per side. 5. Maximum lead twist/skew to be 0.002 (0.05mm) 6. Mold flash shall not extend more than 0.010 (0.25mm) on any edge of heat slug Figure 12: Package Outline Drawing IN C H ES 8 MILLIMETER S SYMB OL MIN MAX MIN MAX N OTE A 0.087 0.093 2.21 2.36 A1 0.000 0.004 0.00 0.10 A2 0.087 0.089 2.21 2.25 B 0.008 0.012 0.36 0.46 C 0.007 0.009 0.18 0.25 D 0.400 0.408 10.16 10.36 2 E 0.292 0.296 7.42 7.52 2 e 0.025 BSC 0.64 BSC 4 H 0.410 0.418 10.41 40.62 h 0.018 0.024 0.48 0.61 L 0.034 0.038 0.86 0.97 LE 0.84 a 0 8 0 8 S 0.139 0.141 3.54 3.55 5 T 0.349 0.351 8.86 8.92 5 1.37 PRELIMINARY DATA SHEET - Rev 1.0 08/2001 AWT1921 NOTES PRELIMINARY DATA SHEET - Rev 1.0 08/2001 9 AWT1921 NOTES 10 PRELIMINARY DATA SHEET - Rev 1.0 08/2001 AWT1921 NOTES PRELIMINARY DATA SHEET - Rev 1.0 08/2001 11 AWT1921 ORDERING INFORMATION OR D ER N U MB ER PAC K AGE D ESC R IPTION AWT1921S11 S11 C OMPON EN T PAC K AGIN G 28 Pi n Body wi th Heat Slug ANADIGICS, Inc. 141 Mount Bethel Road Warren, New Jersey 07059, U.S.A. Tel: +1 (908) 668-5000 Fax: +1 (908) 668-5132 URL: http://www.anadigics.com E-mail: [email protected] IMPORTANT NOTICE ANADIGICS, Inc. reserves the right to make changes to its products or to discontinue any product at any time without notice. The product specifications contained in Advanced Product Information sheets and Preliminary Data Sheets are subject to change prior to a products formal introduction. Information in Data Sheets have been carefully checked and are assumed to be reliable; however, ANADIGICS assumes no responsibilities for inaccuracies. ANADIGICS strongly urges customers to verify that the information they are using is current before placing orders. WARNING ANADIGICS products are not intended for use in life support appliances, devices or systems. Use of an ANADIGICS product in any such application without written consent is prohibited. 12 PRELIMINARY DATA SHEET - Rev 1.0 08/2001