AZ DISPLAYS, INC. COMPLETE LCD SOLUTIONS SPECIFICATIONS FOR LIQUID CRYSTAL DISPLAY PART NUMBER: REVISED: ACM1002A Series MARCH 14, 2006 General Specification Table 1 Item Standard Value □Dot-Graphic Character Format ■Character □ Unit □Digits ■with ICON Dots Module Dimension 38.0(W) *25.5(H) *1.8(T) mm Viewing Area 34.0(W) * 14.0(H) mm Dot Size 0.5(W) *0.75(H) mm Dot Pitch 0.55(W) * 0.8(H) mm Character Size 2.7(W) * 5.55(H) Character Pitch 3.2(W) * 6.25(H) Driving 1/18duty, 1/5bias View Direction Polarizer Type 6H ■ 12H □ Other: □ □TN, Positive □HTN, Positive □STN, Yellow-Green □FSTN, Positive □Color STN □TN, Negative □HTN, Negative ■STN, Gray □STN, Blue □FSTN, Negative □FM LCD □Transmissive Display Mode □Anti-Glare Driver IC Interface DC/DC Converter □Reflective ■Transflective PCF2119_RU/2（PHILIPS） 6800 □ Internal ■ 8080□ Ｉ2Ｃ■ External □ Operation Temperature -20℃— +70℃ Storage Temperature -30℃— +80℃ Page 1 ELECTRICAL CHARACTERISTICS Absolute Maxium Ratings No ITEM Symbol Min. Typ. Max. Unit 1 OPERATING TEMPERATURE T OP -20 - 70 ℃ 2 STORAGE TEMPERATURE T ST -30 - 80 ℃ 3 SUPPLY VOLTAGE FOR LOGIC VDD VSS - 6.5 V 4 S U P P LY VOLTAGE FOR LCD VLCD VSS - 7.5 V 5 INPUT VOLTAGE VIN VSS - VDD +0.5 V 6 STATIC ELECTRICITY Be sure that you are grounded when handing LCM Electrical Characteristics (Ta=25℃, VDD =5.0V) Table 4 No Item Symbol Condition Min. Typ. Max. Unit 1 Supply Voltage For Logic VDD -VSS / / 5.0 / V 2 Supply Voltage For LCD Driver VDD -Vo (VLCD) / / 5.0 / V 3 Input High Voltage VIH H level 0.7VDD / VDD V 4 Input Low Voltage VIL L level VSS / 0.3VDD V 5 Supply Current For Logic IDD / / / 1 mA Interface Pin Function NO SYMBOL LEVEL FUNCTION 1 SCL I I2C-bus serial clock input 2 SDA I I2C-bus serial data input 3 VDD Power Supply Logic supply voltage. 4 VSS Power Supply Ground 5 VLCD 6 RESET VO I This input is used for the generation of the LCD bias levels. The external reset is active HIGH Page 2 Timing Characteristics 1. I2C-bus timing diagram. Timing characteristics: I2C-bus interface: note 2 fSCL SCL clock frequency 400 kHz tLOW SCL clock low period 1.3 ms tHIGH SCL clock high period 0.6 ms tSU;DAT data set-up time 100 ns tHD;DAT data hold time 0 ns tr SCL, SDA rise time notes 1 and 3 15 + 0.1CB 300 ns tf SCL, SDA fall time notes 1 and 3 15 + 0.1CB 300 ns CB capacitive bus line load 400 pF set-up time for a repeated tSU;STA 0.6 ms START condition tHD;STA START condition hold time 0.6 ms tSU;STO set-up time for STO condition 0.6 ms tSW tolerable spike width on bus 50 ns bus free time between STOP tBUF 1.3 ms and START condition Notes： 1. Tested on a sample basis. 2. All timing values are valid within the operating supply voltage and ambient temperature range and are referenced toVIL and VIH with an input voltage swing of VSS to VDD . 3. CB = total capacitance of one bus line in pF. Page 3 Electro-optical Characteristics No 1 Item Contrast Symbol Ratio Condition CR Min Typ Max Unit 4.0 5.0 - - - 160 200 ms - 130 180 ms Drive T a=23±3 ℃ Rise 2 Response time Down ６Ｈ φ＝２７０ １２Ｈ Viewing 3 φ＝９０ Tf θ１＝θ２＝ θ３＝θ４＝０ Vop=5.0V θ１ 70 θ２ 30 1/18Duty 1/5 Bias f=100HZ T a=23±3 ℃ Angle Deg ３Ｈ Range φ＝０ ９Ｈ φ＝１８０ 4 Tr LCD Driving Voltage θ３ Cr=2 60 θ４ VOP 60 T a=23±3 ℃ - 5.0 - V Page 4 Commands The display control instructions control the internal state of the PCF2119_RU/2（PHILIPS） Instruction is received from MPU to PCF2119_RU/2（PHILIPS）for the splay control. The following table shows various instructions. X: Don’ t care Table 6 D D D D D D D D R R Instruction B B B B B B B B Description S W 7 6 5 4 3 2 1 0 H = 0 or 1 sets interface Data Length (DL) and D S number of display lines (M); single Function set 0 0 0 0 1 0 M H L L line/MUX 1 : 9 (SL), extended instruction set control (H) reads the Busy Flag (BF) indicating Read busy flag B internal and address 0 1 AC F operating is being performed and reads counter address counter contents Read data 1 1 read data reads data from CGRAM or DDRAM Write data 1 0 write data writes data from CGRAM or DDRAM H=0 clears entire display and sets DDRAM Clear display 0 0 0 0 0 0 0 0 0 1 address 0 in address counter sets DDRAM address 0 in address counter; also returns shifted display to Return home 0 0 0 0 0 0 0 0 1 0 original position; DDRAM contents remain unchanged I sets cursor move direction and specifies Entry mode set 0 0 0 0 0 0 0 1 / S shift of display; these operations are D performed during data write and read Display control 0 0 0 0 0 0 1 D C B sets entire display on/off (D), cursor Page 5 on/off (C) and blink of cursor position character (B); D = 0 (display off) puts chip into the power-down mode S R moves cursor and shifts display without / / 0 0 changing DDRAM contents C L sets CGRAM address; bit 6 is to be set by the ACG command ‘ set DDRAM address’ ; look at the description of the commands Cursor/display shift 0 0 0 0 0 1 Set CGRAM address 0 0 0 1 Set DDRAM address 0 0 1 Reserved Screen configuration Display configuration 0 H=1 0 0 0 0 0 0 0 0 1 do not use 0 0 0 0 0 0 0 0 1 L set screen configuration 0 0 0 0 0 0 0 1 P Q set display configuration Icon control 0 0 0 0 0 0 1 Temperature control 0 Set HVgen stages Set VLCD Table7 0 0 ADD sets DDRAM address I I M B T 0 0 0 0 1 0 0 C 1 S 0 0 1 0 0 0 0 1 0 1 V voltage D M T C 2 S 0 section mode (IM), icon blink (IB), direct mode(DM) set temperature coefficient (TCx) set internal HVgen stages (S1,S0 = 11 not allowed) store VLCD in register VA or VB (V) Explanations of symbols used in Table 6 BIT I/D S D C B S/C R/L DL H L (no impact, if M = 1 or SL = 1) P Q STATE LOGIC 0 decrement display freeze display off cursor off cursor character blink off: character at cursor position does not blink cursor move left shift 4 bits use basic instruction set left/right screen: standard connection (as in PCF2114) 1st 16 characters of 32: columns are from 1 to 80 2nd 16 characters of 32: columns are from 1 to 80 r column data: left to right (as in PCF2116); column data is displayed from 1 to 80 row data: top to bottom (as in PCF2116); row data is displayed from 1 to 16 and icon row data is in 17 and 18 in single line mode (SL = 1) LOGIC 1 increment display shift display on cursor on cursor character blink on: character at cursor position blinks display shift right shift 8 bits use extended instruction set left/right screen: mirrored connection (as in PCF2116) 1st 16 characters of 32: columns are from 1 to 80 2nd 16 characters of 32: columns are from 80 to 1 column data: right to left; column data is displayed from 80 to 1 row data: bottom to top; row data is displayed from 16 to 1 and icon row data is in 18 and 17 in single line mode (SL = 1) Page 6 row data is displayed from 1 to 8 and icon row data in 17 IM IB DM V M (no impact, if SL = 1) SL C0 character mode; full display icon blink disabled direct mode disabled set VA 1-line by 32 display MUX 1 : 18 (1X32 or 2X? 16 character display) last control byte; see Table 5 row data is displayed from 8 to 1 and icon row data in 17 icon mode; only icons displayed icon blink enabled direct mode enabled set VB 2-line by 16 display MUX 1 : 9 (1X16 character display) another control byte follows after data/command Table 8 Explanation of TC1 and TC2 used in Table 6 TC1 TC2 DESCRIPTION 0 0 VLCD temperature coefficient 0 1 0 VLCD temperature coefficient 1 0 1 VLCD temperature coefficient 2 1 1 VLCD temperature coefficient 3; for ranges for TC see Chapter 14 Table 9 Explanation of S1 and S2 used in Table 6 S1 S2 DESCRIPTION 0 0 set internal HVgen stages to 1 (2 * voltage multiplier) 0 1 set internal HVgen stages to 2 (3 * voltage multiplier) 1 0 set internal HVgen stages to 3 (4 * voltage multiplier) 1 1 do not use Page 7 ½º AZ Displays, Inc. ACM1002A SERIES AZ Displays, Inc. ACM1002A SERIES COM8 COM2 SEG50 SEG1 COM10 COM16 RESET ›Ê’c VSS VDD SDA SCL AZ Displays, Inc. ACM1002A SERIES