ADS1100 AD0 SBAS239B – MAY 2002 – REVISED NOVEMBER 2003 Self-Calibrating, 16-Bit ANALOG-TO-DIGITAL CONVERTER FEATURES DESCRIPTION ● COMPLETE DATA ACQUISITION SYSTEM IN A TINY SOT23-6 PACKAGE The ADS1100 is a precision, continuously self-calibrating Analog-to-Digital (A/D) converter with differential inputs and up to 16 bits of resolution in a small SOT23-6 package. Conversions are performed ratiometrically, using the power supply as the reference voltage. The ADS1100 uses an I2C-compatible serial interface and operates from a single power supply ranging from 2.7V to 5.5V. ● 16-BITS NO MISSING CODES ● INL: 0.0125% of FSR MAX ● CONTINUOUS SELF-CALIBRATION ● SINGLE-CYCLE CONVERSION ● PROGRAMMABLE GAIN AMPLIFIER GAIN = 1, 2, 4, OR 8 ● LOW NOISE: 4µVp-p ● PROGRAMMABLE DATA RATE: 8SPS to 128SPS ● INTERNAL SYSTEM CLOCK ● I2CTM INTERFACE ● POWER SUPPLY: 2.7V to 5.5V ● LOW CURRENT CONSUMPTION: 90µA ● AVAILABLE IN EIGHT DIFFERENT ADDRESSES The ADS1100 can perform conversions at rates of 8, 16, 32, or 128 samples per second. The onboard Programmable Gain Amplifier (PGA), which offers gains of up to 8, allows smaller signals to be measured with high resolution. In single-conversion mode, the ADS1100 automatically powers down after a conversion, greatly reducing current consumption during idle periods. The ADS1100 is designed for applications requiring highresolution measurement, where space and power consumption are major considerations. Typical applications include portable instrumentation, industrial process control, and smart transmitters. APPLICATIONS ● PORTABLE INSTRUMENTATION ● INDUSTRIAL PROCESS CONTROL ● SMART TRANSMITTERS A = 1, 2, 4, or 8 VIN+ PGA VIN– ∆Σ A/D Converter I2 C Interface SCL SDA VDD ● CONSUMER GOODS ● FACTORY AUTOMATION Clock Oscillator ● TEMPERATURE MEASUREMENT GND I2C is a registered trademark of Philips Incorporated. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. Copyright © 2002-2003, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. www.ti.com ELECTROSTATIC DISCHARGE SENSITIVITY ABSOLUTE MAXIMUM RATINGS VDD to GND ........................................................................... –0.3V to +6V Input Current ............................................................... 100mA, Momentary Input Current ................................................................. 10mA, Continuous Voltage to GND, VIN+, VIN– .......................................................... –0.3V to VDD + 0.3V Voltage to GND, SDA, SCL ..................................................... –0.5V to 6V Maximum Junction Temperature ................................................... +150°C Operating Temperature .................................................. –40°C to +125°C Storage Temperature ...................................................... –60°C to +150°C Lead Temperature (soldering, 10s) ............................................... +300°C NOTE: (1) Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. Exposure to absolute maximum conditions for extended periods may affect device reliability. This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PACKAGE/ORDERING INFORMATION SPECIFIED TEMPERATURE RANGE PACKAGE MARKING ORDERING NUMBER TRANSPORT MEDIA, QUANTITY ADS1100A0IDBVT ADS1100A0IDBVR Tape and Reel, 250 Tape and Reel, 3000 ADS1100A1IDBVT ADS1100A1IDBVR Tape and Reel, 250 Tape and Reel, 3000 ADS1100A2IDBVT ADS1100A2IDBVR Tape and Reel, 250 Tape and Reel, 3000 ADS1100A3IDBVT ADS1100A3IDBVR Tape and Reel, 250 Tape and Reel, 3000 ADS1100A4IDBVT ADS1100A4IDBVR Tape and Reel, 250 Tape and Reel, 3000 ADS1100A5IDBVT ADS1100A5IDBVR Tape and Reel, 250 Tape and Reel, 3000 ADS1100A6IDBVT ADS1100A6IDBVR Tape and Reel, 250 Tape and Reel, 3000 ADS1100A7IDBVT ADS1100A7IDBVR Tape and Reel, 250 Tape and Reel, 3000 PRODUCT I2C ADDRESS PACKAGE-LEAD PACKAGE DESIGNATOR(1) ADS1100 1001 000 SOT23-6 DBV –40°C to +85°C AD0 " " " " " " ADS1100 1001 001 SOT23-6 DBV –40°C to +85°C AD1 " " " " " " ADS1100 1001 010 SOT23-6 DBV –40°C to +85°C AD2 " " " " " " ADS1100 1001 011 SOT23-6 DBV –40°C to +85°C AD3 " " " " " " ADS1100 1001 100 SOT23-6 DBV –40°C to +85°C AD4 " " " " " " ADS1100 1001 101 SOT23-6 DBV –40°C to +85°C AD5 " " " " " " ADS1100 1001 110 SOT23-6 DBV –40°C to +85°C AD6 " " " " " " ADS1100 1001 111 SOT23-6 DBV –40°C to +85°C AD7 " " " " " " NOTE: (1) For the most current specifications and package information, refer to our web site at www.ti.com. PIN CONFIGURATION Top View SOT23 VIN– VDD SDA 6 5 4 AD0 1 2 3 VIN+ GND SCL NOTE: Marking text direction indicates pin 1. Marking text depends on I2C address; see ordering table. Marking for I2C address 1001000 shown. 2 ADS1100 www.ti.com SBAS239B ELECTRICAL CHARACTERISTICS All specifications at –40°C to +85°C, VDD = 5V, GND = 0V, and all PGAs, unless otherwise noted. ADS1100 PARAMETER ANALOG INPUT Full-Scale Input Voltage Analog Input Voltage Differential Input Impedance Common-Mode Input Impedance SYSTEM PERFORMANCE Resolution and No Missing Codes Conversion Rate Output Noise Integral Nonlinearity Offset Error Offset Drift Gain Error Gain Error Drift Common-Mode Rejection DIGITAL INPUT/OUTPUT Logic Level VIH VIL VOL Input Leakage IIH IIL POWER-SUPPLY REQUIREMENTS Power-Supply Voltage Supply Current CONDITIONS MIN (VIN+) – (VIN–) VIN+, VIN– to GND GND – 0.2 TYP MAX ±VDD/PGA VDD + 0.2 2.4/PGA 8 DR DR DR DR DR DR DR DR = = = = = = = = 00 01 10 11 00 01 10 11 12 14 15 16 104 26 13 6.5 See Typical Characteristic Curves DR = 11, PGA = 1, End Point Fit(1) PGA PGA PGA PGA = = = = 1 2 4 8 At DC, PGA = 8 At DC, PGA = 1 94 IOL = 3mA 0.7 • VDD GND – 0.5 GND VIH = 5.5V VIL = GND –10 VDD Power Down Active Mode 128 32 16 8 ±0.003 ±2.5/PGA 1.5 1.0 0.7 0.6 0.01 2 100 85 2.7 0.05 90 UNITS V V MΩ MΩ 12 14 15 16 184 46 23 11.5 Bits Bits Bits Bits SPS SPS SPS SPS ±0.0125 ±5/PGA 8 4 2 2 0.1 % of FSR(2) mV µV/°C µV/°C µV/°C µV/°C % ppm/°C dB dB 6 0.3 • VDD 0.4 V V V 10 µA µA 5.5 2 150 V µA µA 750 µW µW Power Dissipation VDD = 5.0V VDD = 3.0V 450 210 NOTES: (1) 99% of full-scale. (2) FSR = Full-Scale Range = 2 • VDD/PGA. ADS1100 SBAS239B www.ti.com 3 TYPICAL CHARACTERISTICS At TA = 25°C and VDD = 5V, unless otherwise noted. SUPPLY CURRENT vs I2C BUS FREQUENCY SUPPLY CURRENT vs TEMPERATURE 250 120 225 VDD = 5V 200 IVDD (µA) IVDD (µA) 100 80 25°C 175 125°C 150 125 100 60 VDD = 2.7V –40°C 75 50 40 –60 –40 –20 0 20 40 60 80 100 120 10 140 100 OFFSET ERROR vs TEMPERATURE 2.0 VDD = 2.7V VDD = 5V 1.0 PGA = 8 PGA = 4 PGA = 2 Offset Error (mV) Offset Error (mV) 1.0 PGA = 1 0.0 –1.0 PGA = 8 PGA = 4 PGA = 2 PGA = 1 0 40 80 0.0 –1.0 –2.0 –2.0 –60 –40 –20 0 20 40 60 80 100 120 140 –60 –40 –20 Temperature (°C) 20 60 100 120 140 Temperature (°C) GAIN ERROR vs TEMPERATURE GAIN ERROR vs TEMPERATURE 0.010 0.04 VDD = 5V VDD = 2.7V 0.03 0.005 PGA = 4 PGA = 1 0.01 0.00 –0.01 Gain Error (%) PGA = 8 0.02 PGA = 4 PGA = 8 0.000 –0.005 PGA = 1 –0.010 PGA = 2 –0.02 PGA = 2 –0.015 –0.03 –0.020 –0.04 –60 –40 –20 0 20 40 60 80 –60 –40 –20 100 120 140 0 20 40 60 80 100 120 140 Temperature (°C) Temperature (°C) 4 10k OFFSET ERROR vs TEMPERATURE 2.0 Gain Error (%) 1k I2C Bus Frequency (kHz) Temperature (°C) ADS1100 www.ti.com SBAS239B TYPICAL CHARACTERISTICS (Cont.) At TA = 25°C and VDD = 5V, unless otherwise noted. TOTAL ERROR vs INPUT SIGNAL INTEGRAL NONLINEARITY vs SUPPLY VOLTAGE 0.016 0.0 –0.5 Total Error (mV) PGA = 4 –1.0 PGA = 2 –1.5 –2.0 –2.5 –100 0.012 0.010 0.008 0.006 0.004 0.002 Data Rate = 8SPS PGA = 1 PGA = 8 PGA = 4 PGA = 2 PGA = 1 0.014 Integral Nonlinearity (% of FSR) PGA = 8 0.000 –75 –50 –25 0 25 50 75 2.5 100 3.0 3.5 4.0 5.0 5.5 NOISE vs INPUT SIGNAL INTEGRAL NONLINEARITY vs TEMPERATURE 0.05 20 PGA =1 Data Rate = 8SPS PGA = 8 0.04 0.03 Noise (p-p, % of LSB) Integral Nonlinearity (% of FSR) 4.5 VDD (V) Input Signal (% of Full-Scale) VDD = 2.7V 0.02 VDD = 3.5V VDD = 5V 15 PGA = 4 PGA = 2 10 PGA = 1 5 0.01 0 0.00 –60 –40 –20 0 20 40 60 80 100 120 0 140 20 60 80 100 NOISE vs TEMPERATURE NOISE vs SUPPLY VOLTAGE 25 30 Data Rate = 8SPS PGA = 8 PGA = 8 20 PGA = 4 15 PGA = 2 10 Noise (p-p, % of LSB) 25 Noise (p-p, % of LSB) 40 Input Signal (% of Full-Scale) Temperature (°C) 20 15 10 5 PGA = 1 Data Rate = 8SPS 5 0 2.5 3.0 3.5 4.0 4.5 5.0 –60 5.5 ADS1100 SBAS239B –40 –20 0 20 40 60 80 100 120 140 Temperature (°C) VDD (V) www.ti.com 5 TYPICAL CHARACTERISTICS (Cont.) At TA = 25°C and VDD = 5V, unless otherwise noted. DATA RATE vs TEMPERATURE FREQUENCY RESPONSE 0 10 Data Rate = 8SPS VDD = 2.7V –20 Gain (dB) Data Rate (SPS) 9 8 VDD = 5V –40 –60 7 –80 Data Rate = 8SPS 6 –60 –100 –40 –20 0 20 40 60 80 100 120 0.1 140 1 Temperature (°C) THEORY OF OPERATION The ADS1100 is a fully differential, 16-bit, self-calibrating, delta-sigma A/D converter. Extremely easy to design with and configure, the ADS1100 allows you to obtain precise measurements with a minimum of effort. The ADS1100 consists of a delta-sigma A/D converter core with adjustable gain, a clock generator, and an I2C interface. Each of these blocks are described in detail in the sections that follow. ANALOG-TO-DIGITAL CONVERTER The ADS1100 A/D converter core consists of a differential switched-capacitor delta-sigma modulator followed by a digital filter. The modulator measures the voltage difference between the positive and negative analog inputs and compares it to a reference voltage, which, in the ADS1100, is the power supply. The digital filter receives a high-speed bitstream from the modulator and outputs a code, which is a number proportional to the input voltage. OUTPUT CODE CALCULATION The output code is a scalar value that is (except for clipping) proportional to the voltage difference between the two analog inputs. The output code is confined to a finite range of numbers; this range depends on the number of bits needed to represent the code. The number of bits needed to represent the output code for the ADS1100 depends on the data rate, as shown in Table I. DATA RATE NUMBER OF BITS 8SPS 16SPS 32SPS 128SPS 16 15 14 12 MINIMUM CODE MAXIMUM CODE –32,768 –16,384 –8192 –2048 TABLE I. Minimum and Maximum Codes. 6 32,767 16,383 8191 2047 10 Input Frequency (Hz) 100 1k For a minimum output code of Min Code, gain setting of PGA, positive and negative input voltages of VIN+ and VIN–, and power supply of VDD, the output code is given by the expression: Output Code = –1• Min Code • PGA • (V ) – (V ) IN+ IN – VDD In the previous expression, it is important to note that the negated minimum output code is used. The ADS1100 outputs codes in binary two’s complement format, so the absolute values of the minima and maxima are not the same; the maximum n-bit code is 2n-1 – 1, while the minimum n-bit code is –1 • 2n-1. For example, the ideal expression for output codes with a data rate of 16SPS and PGA = 2 is: Output Code = 16384 • 2 • (V ) – (V ) IN+ IN – VDD The ADS1100 outputs all codes right-justified and signextended. This makes it possible to perform averaging on the higher data rate codes using only a 16-bit accumulator. See Table II for output codes for various input levels. SELF-CALIBRATION The previous expressions for the ADS1100’s output code do not account for the gain and offset errors in the modulator. To compensate for these, the ADS1100 incorporates self-calibration circuitry. The self-calibration system operates continuously, and requires no user intervention. No adjustments can be made to the self-calibration system, and none need to be made. The self-calibration system cannot be deactivated. The offset and gain error figures shown in the Electrical Characteristics include the effects of calibration. ADS1100 www.ti.com SBAS239B INPUT SIGNAL DATA RATE NEGATIVE FULL-SCALE –1LSB ZERO +1LSB POSITIVE FULL-SCALE 8SPS 16SPS 32SPS 128SPS 8000H C000H E000H F800H FFFFH FFFFH FFFFH FFFFH 0000H 0000H 0000H 0000H 0001H 0001H 0001H 0001H 7FFFH 3FFFH 1FFFH 07FFH TABLE II. Output Codes for Different Input Signals. CLOCK GENERATOR The ADS1100 features an onboard clock generator, which drives the operation of the modulator and digital filter. The Typical Characteristics show varieties in data rate over supply voltage and temperature. It is not possible to operate the ADS1100 with an external modulator clock. When designing an input filter circuit, remember to take into account the interaction between the filter network and the input impedance of the ADS1100. USING THE ADS1100 OPERATING MODES The ADS1100 operates in one of two modes: continuous conversion and single conversion. INPUT IMPEDANCE The ADS1100 uses a switched-capacitor input stage. To external circuitry, it looks roughly like a resistance. The resistance value depends on the capacitor values and the rate at which they are switched. The switching frequency is the same as the modulator frequency; the capacitor values depend on the PGA setting. The switching clock is generated by the onboard clock generator, so its frequency, nominally 275kHz, is dependent on supply voltage and temperature. The common-mode and differential input impedances are different. For a gain setting of PGA, the differential input impedance is typically: 2.4MΩ/PGA The common-mode impedance is typically 8MΩ. The typical value of the input impedance often cannot be neglected. Unless the input source has a low impedance, the ADS1100’s input impedance may affect the measurement accuracy. For sources with high output impedance, buffering may be necessary. Bear in mind, however, that active buffers introduce noise, and also introduce offset and gain errors. All of these factors should be considered in high-accuracy applications. Because the clock generator frequency drifts slightly with temperature, the input impedances will also drift. For many applications, this input impedance drift can be neglected, and the typical impedance values above can be used. ALIASING In continuous conversion mode, the ADS1100 continuously performs conversions. Once a conversion has been completed, the ADS1100 places the result in the output register, and immediately begins another conversion. When the ADS1100 is in continuous conversion mode, the ST/BSY bit in the configuration register always reads 1. In single conversion mode, the ADS1100 waits until the ST/BSY bit in the conversion register is set to 1. When this happens, the ADS1100 powers up and performs a single conversion. After the conversion completes, the ADS1100 places the result in the output register, resets the ST/BSY bit to 0 and powers down. Writing a 1 to ST/BSY while a conversion is in progress has no effect. When switching from continuous conversion mode to single conversion mode, the ADS1100 will complete the current conversion, reset the ST/BSY bit to 0 and power down. RESET AND POWER-UP When the ADS1100 powers up, it automatically performs a reset. As part of the reset, the ADS1100 sets all of the bits in the configuration register to their default setting. The ADS1100 responds to the I2C General Call Reset command. When the ADS1100 receives a General Call Reset, it performs an internal reset, exactly as though it had just been powered on. I2C INTERFACE If frequencies are input to the ADS1100 that exceed half the data rate, aliasing will occur. To prevent aliasing, the input signal must be bandlimited. Some signals are inherently bandlimited. For example, a thermocouple’s output, which has a limited rate of change, may nevertheless contain noise and interference components. These can fold back into the sampling band just as any other signal can. The ADS1100’s digital filter provides some attenuation of high-frequency noise, but the filter’s sinc1 frequency response cannot completely replace an anti-aliasing filter; some external filtering may still be needed. For many applications, a simple RC filter will suffice. The ADS1100 communicates through an I2C (Inter-Integrated Circuit) interface. The I2C interface is a 2-wire opendrain interface supporting multiple devices and masters on a single bus. Devices on the I2C bus only drive the bus lines LOW, by connecting them to ground; they never drive the bus lines HIGH. Instead, the bus wires are pulled HIGH by pull-up resistors, so the bus wires are HIGH when no device is driving them LOW. This way, two devices cannot conflict; if two devices drive the bus simultaneously, there is no driver contention. ADS1100 SBAS239B www.ti.com 7 Communication on the I2C bus always takes place between two devices, one acting as the master and the other acting as the slave. Both masters and slaves can read and write, but slaves can only do so under the direction of the master. Some I2C devices can act as masters or slaves, but the ADS1100 can only act as a slave device. An I2C bus consists of two lines, SDA and SCL. SDA carries data; SCL provides the clock. All data is transmitted across the I2C bus in groups of eight bits. To send a bit on the I2C bus, the SDA line is driven to the bit’s level while SCL is LOW (a LOW on SDA indicates the bit is zero; a HIGH indicates the bit is one). Once the SDA line has settled, the SCL line is brought HIGH, then LOW. This pulse on SCL clocks the SDA bit into the receiver’s shift register. The I2C bus is bidirectional: the SDA line is used both for transmitting and receiving data. When a master reads from a slave, the slave drives the data line; when a master sends to a slave, the master drives the data line. The master always drives the clock line. The ADS1100 never drives SCL, because it cannot act as a master. On the ADS1100, SCL is an input only. Most of the time the bus is idle, no communication is taking place, and both lines are HIGH. When communication is taking place, the bus is active. Only master devices can start a communication. They do this by causing a start condition on the bus. Normally, the data line is only allowed to change state while the clock line is LOW. If the data line changes state while the clock line is HIGH, it is either a start condition or its counterpart, a stop condition. A start condition is when the clock line is HIGH and the data line goes from HIGH to LOW. A stop condition is when the clock line is HIGH and the data line goes from LOW to HIGH. After the master issues a start condition, it sends a byte that indicates which slave device it wants to communicate with. This byte is called the address byte. Each device on an I2C bus has a unique 7-bit address to which it responds. (Slaves can also have 10-bit addresses; see the I2C specification for details.) The master sends an address in the address byte, together with a bit that indicates whether it wishes to read from or write to the slave device. t(LOW) Every byte transmitted on the I2C bus, whether it be address or data, is acknowledged with an acknowledge bit. When a master has finished sending a byte, eight data bits, to a slave, it stops driving SDA and waits for the slave to acknowledge the byte. The slave acknowledges the byte by pulling SDA LOW. The master then sends a clock pulse to clock the acknowledge bit. Similarly, when a master has finished reading a byte, it pulls SDA LOW to acknowledge this to the slave. It then sends a clock pulse to clock the bit. (Remember that the master always drives the clock line.) A not-acknowledge is performed by simply leaving SDA HIGH during an acknowledge cycle. If a device is not present on the bus, and the master attempts to address it, it will receive a not-acknowledge because no device is present at that address to pull the line LOW. When a master has finished communicating with a slave, it may issue a stop condition. When a stop condition is issued, the bus becomes idle again. A master may also issue another start condition. When a start condition is issued while the bus is active, it is called a repeated start condition. A timing diagram for an ADS1100 I2C transaction is shown in Figure 1. Table III gives the parameters for this diagram. ADS1100 I2C ADDRESSES The ADS1100 I2C address is 1001aaa, where “aaa” are bits set at the factory. The ADS1100 is available in eight different verisons, each having a different I2C address. For example, the ADS1100A0 has address 1001000, and the ADS1100A3 has address 1001011. See the Package/Ordering Information table for a complete listing. The I2C address is the only difference between the eight variants. In all other repsects, they operate identically. Each variant of the ADS1100 is marked with “ADx,” where x identifies the address variant. For example, the ADS1100A0 is marked “AD0”, and the ADS1100A3 is marked “AD3”. See the Package/Ordering Information table for a complete listing. When the ADS1100 was first introduced, it was shipped with only one address, 1001000, and was marked “BAAI.” That device is identical to the currently shipping ADS1100A0 variant marked “AD0”. tF tR t(HDSTA) SCL t(HDSTA) t(HIGH) t(HDDAT) t(SUSTO) t(SUSTA) t(SUDAT) SDA t(BUF) P S S P FIGURE 1. I2C Timing Diagram. 8 ADS1100 www.ti.com SBAS239B FAST MODE PARAMETER MIN SCLK Operating Frequency HIGH-SPEED MODE MAX f(SCLK) Bus Free Time Between STOP and START Condition MIN 0.4 MAX UNITS 3.4 MHz t(BUF) 600 160 ns t(HDSTA) 600 160 ns Repeated START Condition Setup Time t(SUSTA) 600 160 ns STOP Condition Setup Time t(SUSTO) 600 160 ns Data Hold Time t (HDDAT) 0 0 ns Data Setup Time t(SUDAT) 100 10 ns SCLK Clock LOW Period t(LOW) 1300 160 ns SCLK Clock HIGH Period t(HIGH) 600 Hold Time After Repeated START Condition. After this period, the first clock is generated. 60 ns Clock/Data Fall Time tF 300 160 ns Clock/Data Rise Time tR 300 160 ns TABLE III. Timing Diagram Definitions. I2C GENERAL CALL REGISTERS The ADS1100 responds to General Call Reset, which is an address byte of 00H followed by a data byte of 06H. The ADS1100 acknowledges both bytes. The ADS1100 has two registers that are accessible via its I2C port. The output register contains the result of the last conversion; the configuration register allows you to change the ADS1100’s operating mode and query the status of the device. On receiving a General Call Reset, the ADS1100 performs a full internal reset, just as though it had been powered off and then on. If a conversion is in process, it is interrupted; the output register is set to zero, and the configuration register is set to its default setting. OUTPUT REGISTER The 16-bit output register contains the result of the last conversion in binary two’s complement format. Following reset or power-up, the output register is cleared to zero; it remains zero until the first conversion is completed. Therefore, if you read the ADS1100 just after reset or power-up, you will read zero from the output register. The ADS1100 always acknowledges the General Call address byte of 00H, but it does not acknowledge any General Call data bytes other than 04H or 06H. I2C DATA RATES The output register’s format is shown in Table IV. The I2C bus operates in one of three speed modes: Standard, which allows a clock frequency of up to 100kHz; Fast, which allows a clock frequency of up to 400kHz; and Highspeed mode (also called Hs mode), which allows a clock frequency of up to 3.4MHz. The ADS1100 is fully compatible with all three modes. CONFIGURATION REGISTER You can use the 8-bit configuration register to control the ADS1100’s operating mode, data rate, and PGA settings. The configuration register’s format is shown in Table V. The default setting is 8CH. No special action needs to be taken to use the ADS1100 in Standard or Fast modes, but High-speed mode must be activated. To activate High-speed mode, send a special address byte of 00001XXX following the start condition, where the XXX bits are unique to the Hs-capable master. This byte is called the Hs master code. (Note that this is different from normal address bytes: the low bit does not indicate read/write status.) The ADS1100 will not acknowledge this byte; the I2C specification prohibits acknowledgment of the Hs master code. On receiving a master code, the ADS1100 will switch on its High-speed mode filters, and will communicate at up to 3.4MHz. The ADS1100 switches out of Hs mode with the next stop condition. BIT 7 6 5 4 3 NAME ST/BSY 0 0 SC 2 DR1 DR0 1 0 PGA1 PGA0 TABLE V. Configuration Register. Bit 7: ST/BSY The meaning of the ST/BSY bit depends on whether it is being written to or read from. In single conversion mode, writing a 1 to the ST/BSY bit causes a conversion to start, and writing a 0 has no effect. In continuous conversion mode, the ADS1100 ignores the value written to ST/BSY. For more information on High-speed mode, consult the I2C specification. BIT 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 NAME D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 TABLE IV. Output Register. ADS1100 SBAS239B www.ti.com 9 When read in single conversion mode, ST/BSY indicates whether the A/D converter is busy taking a conversion. If ST/BSY is read as 1, the A/D converter is busy, and a conversion is taking place; if 0, no conversion is taking place, and the result of the last conversion is available in the output register. In continuous mode, ST/BSY is always read as 1. READING FROM THE ADS1100 You can read the output register and the contents of the configuration register from the ADS1100. To do this, address the ADS1100 for reading, and read three bytes from the device. The first two bytes are the output register’s contents; the third byte is the configuration register’s contents. You do not always have to read three bytes from the ADS1100. If you want only the contents of the output register, read only two bytes. Bits 6-5: Reserved Bits 6 and 5 must be set to zero. Bit 4: SC SC controls whether the ADS1100 is in continuous conversion or single conversion mode. When SC is 1, the ADS1100 is in single conversion mode; when SC is 0, the ADS1100 is in continuous conversion mode. The default setting is 0. Reading more than three bytes from the ADS1100 has no effect. All of the bytes beginning with the fourth will be FFH. See Figure 2 for a timing diagram of an ADS1100 read operation. Bits 3-2: DR Bits 3 and 2 control the ADS1100’s data rate, as shown in Table VI. DR1 DR0 DATA RATE 0 0 0 1 1 0 1(1) 1(1) NOTE: (1) Default Setting. 128SPS 32SPS 16SPS 8SPS(1) WRITING TO THE ADS1100 You can write new contents into the configuration register (you cannot change the contents of the output register). To do this, address the ADS1100 for writing, and write one byte to it. This byte is written into the configuration register. Writing more than one byte to the ADS1100 has no effect. The ADS1100 will ignore any bytes sent to it after the first one, and it will only acknowledge the first byte. See Figure 3 for a timing diagram of an ADS1100 write operation. TABLE VI. DR Bits. Bits 1-0: PGA Bits 1 and 0 control the ADS1100’s gain setting, as shown in Table VII. PGA1 PGA0 GAIN 0(1) 0(1) 1(1) 2 4 8 0 1 1 NOTE: (1) Default Setting. 1 0 1 TABLE VII. PGA Bits. 10 ADS1100 www.ti.com SBAS239B 1 9 1 9 … SCL SDA 1 0 0 1 A2 A1 A0 D15 R/W Start By Master D14 D13 ACK By ADS1100 SDA (Continued) … 9 D7 D6 D5 D4 D3 D2 D9 … D8 ACK By Master Frame 2: Output Register Upper Byte 1 … D10 From ADS1100 Frame 1: I2C Slave Address Byte SCL (Continued) D12 D11 D1 1 ST/ BSY D0 From ADS1100 9 0 0 SC ACK By Master DR1 DR0 PGA1 PGA0 ACK By Master From ADS1100 Frame 3: Output Register Lower Byte Stop By Master Frame 4: Configuration Register (Optional) FIGURE 2. Timing Diagram for Reading From the ADS1100. 1 9 1 9 SCL SDA 1 0 0 1 A2 A1 A0 R/W Start By Master ST/ BSY 0 0 SC DR1 DR0 PGA1 PGA0 ACK By ADS1100 Frame 1: I2C Slave Address Byte ACK By ADS1100 Stop By Master Frame 2: Configuration Register FIGURE 3. Timing Diagram for Writing to the ADS1100. ADS1100 SBAS239B www.ti.com 11 APPLICATIONS INFORMATION non-multiiple-master I2C peripherals, will work with the ADS1100. The ADS1100 does not perform clock-stretching (i.e., it never pulls the clock line low), so it is not necessary to provide for this unless other devices are on the same I2C bus. The sections that follow give example circuits and tips for using the ADS1100 in various situations. An evaluation board, the ADS1100EVM, is available. This small, simple board connects to an RS-232 serial port on almost any PC. The supplied software simulates a digital voltmeter, and also displays raw output codes in hex and decimal. All features of the ADS1100 can be controlled from the main window. For more information, contact TI or your local TI representative, or visit the Texas Instruments website at http://www.ti.com/. Pull-up resistors are necessary on both the SDA and SCL lines because I2C bus drivers are open-drain. The size of these resistors depends on the bus operating speed and capacitance of the bus lines. Higher-value resistors consume less power, but increase the transition times on the bus, limiting the bus speed. Lower-value resistors allow higher speed at the expense of higher power consumption. Long bus lines have higher capacitance and require smaller pullup resistors to compensate. The resistors should not be too small; if they are, the bus drivers may not be able to pull the bus lines low. BASIC CONNECTIONS For many applications, connecting the ADS1100 is extremely simple. A basic connection diagram for the ADS1100 is shown in Figure 4. CONNECTING MULTIPLE DEVICES The fully differential voltage input of the ADS1100 is ideal for connection to differential sources with moderately low source impedance, such as bridge sensors and thermistors. Although the ADS1100 can read bipolar differential signals, it cannot accept negative voltages on either input. It may be helpful to think of the ADS1100 positive voltage input as noninverting, and of the negative input as inverting. Connecting multiple ADS1100s to a single bus is almost trivial. The ADS1100 is available in eight different versions, each of which has a different I2C address. An example showing three ADS1100s connected on a single bus is shown in Figure 5. Up to eight ADS1100s (provided their addresses are different) can be connected to a single bus. When the ADS1100 is converting, it draws current in short spikes. The 0.1µF bypass capacitor supplies the momentary bursts of extra current needed from the supply. Note that only one set of pull-up resistors is needed per bus. You might find that you need to lower the pull-up resistor values slightly to compensate for the additional bus capacitance presented by multiple devices and increased line length. The ADS1100 interfaces directly to standard mode, fast mode, and high-speed mode I 2 C controllers. Any microcontroller’s I2C peripheral, including master-only and Positive Input (0V to 5V) I2C Pull-Up Resistors 1kΩ to 10kΩ (typ.) Negative Input (0V to 5V) VDD ADS1100 Microcontroller or Microprocessor with I2C Port SCL VDD 1 VIN+ VIN– 6 2 GND VDD 5 3 SCL SDA 4 4.7µF (typ.) SDA FIGURE 4. Typical Connections of the ADS1100. 12 ADS1100 www.ti.com SBAS239B I2C Pull-Up Resistors 1kΩ to 10kΩ (typ.) Note that no pull-up resistor is shown on the SCL line. In this simple case, the resistor is not needed; the microcontroller can simply leave the line on output, and set it to one or zero as appropriate. It can do this because the ADS1100 never drives its clock line low. This technique can also be used with multiple devices, and has the advantage of lower current consumption due to the absence of a resistive pull-up. VDD ADS1100A0 Microcontroller or Microprocessor with I2C Port SCL 1 VIN+ VIN– 6 2 GND VDD 5 3 SCL SDA 4 If there are any devices on the bus that may drive their clock lines low, the above method should not be used; the SCL line should be high-Z or zero and a pull-up resistor provided as usual. Note also that this cannot be done on the SDA line in any case, because the ADS1100 does drive the SDA line low from time to time, as all I2C devices do. SDA ADS1100A1 1 VIN+ VIN– 6 2 GND VDD 5 3 SCL SDA 4 Some microcontrollers have selectable strong pull-up circuits built in to their GPIO ports. In some cases, these can be switched on and used in place of an external pull-up resistor. Weak pull-ups are also provided on some microcontrollers, but usually these are too weak for I2C communication. If there is any doubt about the matter, test the circuit before committing it to production. ADS1100A2 NOTE: ADS1100 power and input connections omitted for clarity. 1 VIN+ VIN– 6 2 GND VDD 5 3 SCL SDA 4 SINGLE-ENDED INPUTS FIGURE 5. Connecting Multiple ADS1100s. USING GPIO PORTS FOR I2C Most microcontrollers have programmable input/output pins that can be set in software to act as inputs or outputs. If an I2C controller is not available, the ADS1100 can be connected to GPIO pins, and the I2C bus protocol simulated, or bit-banged, in software. An example of this for a single ADS1100 is shown in Figure 6. Although the ADS1100 has a fully differential input, it can easily measure single-ended signals. A simple single-ended connection scheme is shown in Figure 7. The ADS1100 is configured for single-ended measurement by grounding either of its input pins, usually VIN–, and applying the input signal to VIN+. The single-ended signal can range from –0.2V to VDD + 0.3V. The ADS1100 loses no linearity anywhere in its input range. Negative voltages cannot be applied to this circuit because the ADS1100 inputs can only accept positive voltages. VDD ADS1100 Microcontroller or Microprocessor with I2C Port SCL 1 VIN+ VIN– 6 2 GND VDD 5 3 SCL SDA 4 VDD 0V - VDD Single-Ended SDA Filter Capacitor 33pF to 100pF (typ.) NOTE: ADS1100 power and input connections omitted for clarity. ADS1100 1 VIN+ VIN– 6 2 GND VDD 5 3 SCL SDA 4 Output Codes 0-32767 FIGURE 6. Using GPIO with a Single ADS1100. FIGURE 7. Measuring Single-Ended Inputs. Bit-banging I2C with GPIO pins can be done by setting the GPIO line to zero and toggling it between input and output modes to apply the proper bus states. To drive the line low, the pin is set to output a zero; to let the line go high, the pin is set to input. When the pin is set to input, the state of the pin can be read; if another device is pulling the line low, this will read as a zero in the port’s input register. The ADS1100 input range is bipolar differential with respect to the reference, i.e. ±VDD. The single-ended circuit shown in Figure 7 covers only half the ADS1100 input scale because it does not produce differentially negative inputs; therefore, one bit of resolution is lost. The Burr-Brown DRV134 balanced line driver from Texas Instruments can be employed to regain this bit for single-ended signals. ADS1100 SBAS239B www.ti.com 13 Negative input voltages must be level-shifted. A good candidate for this function is the Texas Instruments THS4130 differential amplifier, which can output fully differential signals. This device can also help recover the lost bit noted previously for single-ended positive signals. Level shifting can also be performed using the DRV134. WHEATSTONE BRIDGE SENSOR The ADS1100 has a fully differential high-impedance input stage and internal gain circuitry, which makes it a good candidate for bridge-sensor measurement. An example is shown in Figure 9. LOW-SIDE CURRENT MONITOR VDD Figure 8 shows a circuit for a low-side shunt-type current monitor. The circuit reads the voltage across a shunt resistor, which is sized as small as possible while still giving a readable output voltage. This voltage is amplified by an OPA335 lowdrift op-amp, and the result is read by the ADS1100. Bridge Sensor E+ V– V+ E– 11.5kΩ 5V V ADS1100 5V FS = 0.63V Load OPA335 R3(1) 49.9kΩ RS(2) ADS1100 I2C 1 VIN+ VIN– 6 2 GND VDD 5 3 SCL SDA 4 VDD 4.7µF 1kΩ G = 12.5 –5V (PGA Gain = 8) 5V FS NOTE: (1) Pull-down resistor to allow accurate swing to 0V. (2) RS is sized for a 50mV drop at full-scale current. I2C I/O FIGURE 9. Measuring a Wheatstone Bridge Sensor. FIGURE 8. Low-Side Current Measurement. It is suggested that the ADS1100 be operated at a gain of 8. The gain of the OPA335 can then be set lower. For a gain of 8, the op amp should be set up to give a maximum output voltage of no greater than 0.75V. If the shunt resistor is sized to provide a maximum voltage drop of 50mV at full-scale current, the full-scale input to the ADS1100 is 0.63V. 14 The Wheatstone bridge sensor is connected directly to the ADS1100 without intervening instrumentation amplifiers; a single, small input capacitor provides rejection of high-frequency interference. The excitation voltage of the bridge is the power supply, which is also the ADS1100 reference voltage. The measurement is, therefore, ratiometric. In this circuit, the ADS1100 would typically be operated at a gain of 8. The input range in this case is ±0.75 volts. ADS1100 www.ti.com SBAS239B Many resistive bridge sensors, such as strain gauges, have very small full-scale output ranges. For these sensors, the measurement resolution obtainable without additional amplification can be low. For example, if the bridge sensor output is ±20mV, the ADS1100 outputs codes from approximately –873 to +873, resulting in a best-case resolution of around 11 bits. If higher resolution is required, it is best to supply an external instrumentation amplifier to bring the signal to full scale. If the ADS1100 is driven by an op amp with high voltage supplies, such as ±12V, protection should be provided, even if the op amp is configured so that it will not output out-ofrange voltages. Many op amps seek to one of the supply rails immediately when power is applied, usually before the input has stabilized; this momentary spike can damage the ADS1100. Sometimes this damage is incremental and results in slow, long-term failure—which can be distastrous for permanently installed, low-maintenance systems. ADVICE If you use an op amp or other front-end circuitry with the ADS1100, be sure to take the performance characteristics of this circuitry into account. A chain is only as strong as its weakest link. The ADS1100 is fabricated in a small-geometry low-voltage process. The analog inputs feature protection diodes to the supply rails. However, the current-handling ability of these diodes is limited, and the ADS1100 can be permanently damaged by analog input voltages that remain more than approximately 300mV beyond the rails for extended periods. One way to protect against overvoltage is to place currentlimiting resistors on the input lines. The ADS1100 analog inputs can withstand momentary currents of as large as 10mA. The previous paragraph does not apply to the I2C ports, which can both be driven to 6V regardless of the supply. LAYOUT TIPS PCB layout for the ADS1100 is relatively undemanding. 16-bit performance is not difficult to achieve. Any data converter is only as good as its reference. For the ADS1100, the reference is the power supply, and the power supply must be clean enough to achieve the desired performance. If a power-supply filter capacitor is used, it should be placed close to the VDD pin, with no vias placed between the capacitor and the pin. The trace leading to the pin should be as wide as possible, even if it must be necked down at the device. ADS1100 SBAS239B www.ti.com 15 PACKAGE OPTION ADDENDUM www.ti.com 18-Feb-2005 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty ADS1100A0IDBVR ACTIVE SOT-23 DBV 6 3000 None CU NIPDAU Level-1-240C-UNLIM ADS1100A0IDBVT ACTIVE SOT-23 DBV 6 250 None CU NIPDAU Level-1-240C-UNLIM ADS1100A1IDBVR ACTIVE SOT-23 DBV 6 3000 None CU NIPDAU Level-1-240C-UNLIM ADS1100A1IDBVT ACTIVE SOT-23 DBV 6 250 None CU NIPDAU Level-1-240C-UNLIM ADS1100A1IDBVTG4 ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM ADS1100A2IDBVR ACTIVE SOT-23 DBV 6 3000 None CU NIPDAU Level-1-240C-UNLIM ADS1100A2IDBVT ACTIVE SOT-23 DBV 6 250 None CU NIPDAU Level-1-240C-UNLIM ADS1100A3IDBVR ACTIVE SOT-23 DBV 6 3000 None CU NIPDAU Level-1-240C-UNLIM ADS1100A3IDBVT ACTIVE SOT-23 DBV 6 250 None CU NIPDAU Level-1-240C-UNLIM ADS1100A4IDBVR ACTIVE SOT-23 DBV 6 3000 None CU NIPDAU Level-1-240C-UNLIM Lead/Ball Finish MSL Peak Temp (3) ADS1100A4IDBVT ACTIVE SOT-23 DBV 6 250 None CU NIPDAU Level-1-240C-UNLIM ADS1100A5IDBVR ACTIVE SOT-23 DBV 6 3000 None CU NIPDAU Level-1-240C-UNLIM ADS1100A5IDBVT ACTIVE SOT-23 DBV 6 250 None CU NIPDAU Level-1-240C-UNLIM ADS1100A6IDBVR ACTIVE SOT-23 DBV 6 3000 None CU NIPDAU Level-1-240C-UNLIM ADS1100A6IDBVT ACTIVE SOT-23 DBV 6 250 None CU NIPDAU Level-1-240C-UNLIM ADS1100A7IDBVR ACTIVE SOT-23 DBV 6 3000 None CU NIPDAU Level-1-240C-UNLIM ADS1100A7IDBVT ACTIVE SOT-23 DBV 6 250 None CU NIPDAU Level-1-240C-UNLIM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. None: Not yet available Lead (Pb-Free). Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens, including bromine (Br) or antimony (Sb) above 0.1% of total product weight. (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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