CALMIRCO CM4072

PRELIMINARY
CM4072
Low Noise Charge Pump/Linear Regulator LED Driver
Features
Product Description
•
The CM4072 Low-noise Charge Pump / LDO Regulator is
designed to power white backlight LEDs used in main displays or camera flash LEDs in wireless handsets. The 5V
output provides up to 100mA continuous current for input
voltages from 3.0V to 5.5V, and up to 200mA for a narrower range. This is accomplished with an integrated
charge pump that boosts the input voltage before feeding
it to an internal LDO linear regulator. The CM4072 operates with excellent power supply ripple rejection while
maintaining good power efficiency. The device utilizes two
external capacitors and operates at 250kHz. Separate
analog and digital ground pins are provided for the charge
pump and the rest of the circuitry to eliminate ground
noise feed-through from the charge pump to the regulated
output.
•
•
•
•
•
•
•
•
•
Low noise regulator with integrated charge pump
voltage-booster
5V output with input voltage as low as 2.8V
Charge pump can also power an external LDO
Low noise in 20Hz to 20kHz audio band
Up to 200mA continuous output current
Low operating and shutdown currents
Stable with low-ESR ceramic or tantalum capacitors
Over-current and over-temperature protection
10-lead TDFN package, 3mm x 3mm
Lead-free versions available
Applications
•
•
•
•
White backlight LEDs for main display in wireless
handsets and LCD modules
Power flash LEDs for camera phones
3.3V to 5V conversion in PCMCIA cards, PCI
Express Cards, other applications needing 5V
5V analog supply for audio codec in notebook
computers, PDAs, MP3 players, etc
The CM4072 provides both overcurrent and thermal overload protection. Two enable inputs provide flexibility in
powering down the device. To maximize power saving in
shutdown mode, both enable inputs should be at a logic
low level. For applications that require the 5V output to be
re-established with minimum delay after shutdown, the
charge pump can be left enabled while the regulator is
disabled. The CMOS LDO regulator features low quiescent current even at full load, making it very suitable for
power sensitive applications.
A bypass pin is provided to further minimize noise by connecting an external capacitor between this pin and
ground.
The CM4072 is available in a 10-lead TDFN package,
with optional lead-free finishing, and is ideal for space critical applications.
Typical Application
Simplified Block Diagram
DGND
1
VIN
10
2
3
CS +
2.2μF
CBYP
+
9
CM4072
TDFN-10
VIN
CP
+ 1μF
7
5
6
CHARGE PUMP
10
2
CS
EN_CP
EN_LDO
CPCP
9
CP+
3
VCP
8
4
1
ENABLE CHARGE
PUMP
CONTROL
CIRCUIT
7
6
CS
ENABLE LDO
0.1μF*
VREF
*Optional
PWM
0-200kHz
8
LDO
5
VOUT
4
BYP
GND
Fax: 408.263.7846
●
© 2005 California Micro Devices Corp. All rights reserved.
11/08/05
490 N. McCarthy Blvd., Milpitas, CA 95035-5112
●
Tel: 408.263.3214
●
www.cmd.com
1
PRELIMINARY
CM4072
PACKAGE / PINOUT DIAGRAM
TOP VIEW
(Pins Down View)
Pin 1
Marking
BOTTOM VIEW
(Pins Up View)
10 9 8 7 6
1 2 3 4 5
CM407
250xx
GND
PAD
1 2 3 4 5
10 9 8 7 6
CM4072-50DF/DE
10 Lead TDFN Package
Note: This drawing is not to scale.
PIN DESCRIPTIONS
LEAD(S)
NAME
DESCRIPTION
1
DGND
Ground for the charge pump circuit. This should be connected to the system (noisy) ground.
2
VIN
Input power source for the device. Since the charge pump draws current in pulses at the
250kHz internal clock frequency, a low-ESR input decoupling capacitor is usually required close
to this pin to ensure low noise operation.
3
VCP
Charge pump output which is connected to the external reservoir capacitor CS. This should be a
low-ESR capacitor. When the voltage on this pin reaches about 5.8V then the charge pump
pauses until the voltage on this pin drops to about 5.7V. This gives rise to at least 100mV of 'ripple' (the frequency and amplitude of this ripple depends upon values of CP and CS and also the
ESR of CS).
4
GND
Ground reference for all internal circuits except the charge pump. This pin should be connected
to a "clean" low-noise analog ground
5
BYP
Bypass input connected to the internal voltage reference of the LDO regulator. An external
bypass capacitor CBYP of 0.1uF is recommended to minimize internal voltage reference noise
and maximize power supply ripple rejection.
6, 7
EN_LDO,
EN_CP
EN_LDO (pin 6) and EN_CP (pin 7) are active-high TTL-level logic inputs to enable the linear
regulator and charge pump according to the following truth table:
EN_CP
(Pin 7)
1
1
0
0
EN_LDO
(Pin 6)
1
0
1
0
CHARGE PUMP
Enabled
Enabled
Disabled
Disabled
REGULATOR
Enabled
Disabled
Disabled
Disabled
8
VOUT
The regulated output. An output capacitor may be added to improve noise and load-transient
response. When the LDO regulator is disabled, an internal pull-down with a nominal resistance
of 50 ohms is activated to discharge the VOUT rail to GND
9, 10
CP+, CP-
CP+ (pin 9) and CP- (pin 10) are used to connect the external "flying" capacitor CP to the charge
pump. The charge stored in CP is transferred to the reservoir capacitor CS at the 250kHz internal clock rate.
© 2005 California Micro Devices Corp. All rights reserved.
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490 N. McCarthy Blvd., Milpitas, CA 95035-5112
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11/08/05
PRELIMINARY
CM4072
Ordering Information
PART NUMBERING INFORMATION
Standard Finish
Lead-free Finish
Leads
Package
Ordering Part
Number1
Part Marking
Ordering Part
Number1
Part Marking
10
TDFN-10
CM4072-50DF
CM407 250DF
CM4072-50DE
CM407 250DE
Note 1: Parts are shipped in Tape & Reel form unless otherwise specified.
Specifications
ABSOLUTE MAXIMUM RATINGS
PARAMETER
RATING
UNITS
±2000
V
VEN Logic Input Voltage
(VIN + 0.5) to (GND - 0.5)
V
VIN, VOUT Pin Voltages
+5.5 to (GND - 0.5)
V
Storage Temperature Range
-65 to +150
°C
Operating Temperature Range
Ambient
Junction
-40 to +85
-40 to +150
°C
°C
ESD Protection (HBM)
STANDARD OPERATING CONDITIONS
VALUE
UNITS
Input Voltage Range (VIN)
PARAMETER
2.8 to 5.5
V
Ambient Operating Temperature
-40 to +85
°C
200 (approx.)
°C/W
0 to 200
mA
CBYP
0.1
μF
COUT
0 to 100
μF
θJA of TDFN package on PCB
Output Load Current (IOUT)
RECOMMENDED EXTERNAL COMPONENTS
DEVICE
VALUE
UNITS
CS
2.2
μF
CP
1.0
μF
© 2005 California Micro Devices Corp. All rights reserved.
11/08/05
490 N. McCarthy Blvd., Milpitas, CA 95035-5112
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Tel: 408.263.3214
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3
PRELIMINARY
CM4072
Specifications (cont’d)
ELECTRICAL OPERATING CHARACTERISTICS (SEE NOTE 1)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VCP
Charge Pump Output Voltage
VOUT = 5V, 1mA < IOUT < 100mA
5.5
5.8
7
V
VOUT
Regulator Output Voltage
VIN = 4.0V, 1mA < IOUT < 100mA
4.85
5.15
V
VR LOAD
Load Regulation
IOUT = 1mA to 100mA
0.2
%
VR LINE
Line Regulation
Vary VIN from 3.0V to 5.0V
0.02
%
RDISCHG
VOUT Discharge Resistance
LDO regulator disabled, EN_LDO
grounded, VIN = 5V
500
Ω
LDO Regulator Ground Current via
the GND pin
Shutdown (EN_LDO grounded)
1
Regulator Enabled, IOUT = 0mA
180
μA
Regulator Enabled, IOUT = 100mA
180
μA
IGND
μA
10
μA
IDGND
Charge Pump Shutdown Current
via DGND pin
EN_CP grounded, VIN = 5V
1
PSRR
Power Supply Ripple Rejection
IOUT = 100mA, CBYP =0.1μF, Note 2
f = 100Hz
f = 10kHz
42
42
dB
dB
BW=22Hz-22kHz, COUT = 10μF,
CBYP = 0.1μF, IOUT = 100mA, Note 2
35
μVrms
BW=22Hz-22kHz, CP = 1μF, CS =3μF,
COUT = CBYP = 0.1μF, IOUT = 100mA,
Note 2
38
μVrms
eNO
Output Voltage Noise
VIH
EN_CP, EN_LDO Input High
Threshold
VIN = 5.0V
VIL
EN_CP, EN_LDO Input Low
Threshold
VIN = 5.0V
ILIM
Overload Current Limit
LDO Only, Note 2
ISC
Output Short Circuit Current
LDO Only, Note 2
TJSD
THYS
10
2.0
V
0.5
200
V
300
mA
50
mA
Thermal Shutdown Junction
Temperature
170
°C
Thermal Shutdown Hysteresis
25
°C
Note 1: Unless otherwise noted, electrical operating characteristics are specified with TA = 0 to 70°C, VIN = 5.0V, IOUT =100mA,
COUT=10μF, CP = 1μF, CS = 10μF.
Note 2: These parameters are guaranteed by design and characterization.
© 2005 California Micro Devices Corp. All rights reserved.
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490 N. McCarthy Blvd., Milpitas, CA 95035-5112
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11/08/05
PRELIMINARY
CM4072
Performance Information
p
1.00E-03
Voltage [V]
1.00E-04
noise floor
Cs=1.5uF
1.00E-05
1.00E-06
1.00E-07
1.00E-08
10
100
1000
10000
100000
Frequency [Hz]
Note: Noise peaks may appear for different values of CP, CS & IOUT, and are due to the ripple frequency of the charge pump (see later).
Figure 1. CM4072 Noise Spectrum ( TA = 25°C, CP=0.47μF, CS = 1.5μF,
COUT = 10μF, CBYP = 0.1μF, IOUT =100mA )
70.0
60.0
PSRR [dB]
50.0
40.0
30.0
20.0
10.0
0.0
10
100
1000
10000
100000
Frequency [Hz]
Measured by forcing VIN voltage to 3.3V & 5.0V dc, then sweeping 100mV ac on VIN. COUT = 10μF, CBYP = 0.1μF.
Figure 2. CM4072 PSRR (upper curve with VIN = 3.3V, lower curve
with VIN = 5V, IOUT = 100mA both cases)
© 2005 California Micro Devices Corp. All rights reserved.
11/08/05
490 N. McCarthy Blvd., Milpitas, CA 95035-5112
●
Tel: 408.263.3214
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Fax: 408.263.7846
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5
PRELIMINARY
CM4072
Performance Information (cont’d)
Typical DC Characteristics (TA=25°C, CP=1.0μF, CS=10μF, CBYP=0.1μF, COUT=10μF unless otherwise noted)
5.1
2
5.08
1.9
5.06
1.8
1.7
5.02
VEN [V]
VOUT [V]
5.04
5
4.98
4.96
1.6
1.5
1.4
1.3
4.94
1.2
4.92
1.1
4.9
0
20
40
60
80
1
100
3
3.5
4
IOUT [mA]
5
5.5
Figure 7. VEN Threshold vs. VIN
Figure 3. VOUT vs. IOUT (VIN = 5V)
300
5.1
IOUT = 0mA
5.08
250
IOUT = 100mA
5.06
5.04
200
5.02
IIN [μA]
VOUT [V]
4.5
VIN [V]
5
4.98
4.96
4.94
150
100
50
4.92
4.9
3
3.5
4
4.5
5
0
5.5
3
3.5
4
VIN [V]
4.5
5
5.5
VIN [V]
Figure 4. VOUT vs. VIN
Figure 8. IIN vs. VIN
7
250
6.75
200
6.25
IIN [mA]
VCP [V]
6.5
6
5.75
150
100
5.5
5
3
3.5
4
4.5
5
V_IN=5V
0
5.5
0
VIN [V]
20
40
60
80
100
IOUT [mA]
Figure 5. CS Pin vs. VIN
Figure 9. IIN vs. IOUT
at T=150'C, T=85'C and T=25'C
6
400
5
300
0°C
4
15
T A=
200
VOUT [V]
VDO [mV]
V_IN=3.1V
50
5.25
°C
25
T A=
3
2
100
1
TA=85°C
0
0
10
20
30
40
50
60
70
80
90
0
100
0
IOUT [mA]
0.1
0.2
0.3
0.4
0.5
IOUT [A]
Figure 6. Dropout Voltage (LDO Only)
Figure 10. Overcurrent Characteristic (LDO only)
© 2005 California Micro Devices Corp. All rights reserved.
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490 N. McCarthy Blvd., Milpitas, CA 95035-5112
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Tel: 408.263.3214
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11/08/05
PRELIMINARY
CM4072
Performance Information (cont’d)
Transient Characteristics (TA=25°C, CP=1.0μF, CS=10μF, CBYP=0.1μF, COUT=10μF unless otherwise noted)
Figure 11. Load Regulation (0mA to 100mA)
Figure 14. Cold Start / Power-Up
Figure 12. Load Regulation (2mA to 100mA)
Figure 15. LDO Power-Up
Figure 13. Line Regulation
Figure 16. LDO Power-Down
© 2005 California Micro Devices Corp. All rights reserved.
11/08/05
490 N. McCarthy Blvd., Milpitas, CA 95035-5112
●
Tel: 408.263.3214
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Fax: 408.263.7846
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www.cmd.com
7
PRELIMINARY
CM4072
Performance Information (cont’d)
Transient Characteristics (TA=25°C, VIN=5V, CP=1.0μF, CS=10μF, CBYP=0.1μF, COUT=10μF unless otherwise noted)
5.10
5.05
VOUT [V]
I_OUT=0
I_OUT=30mA
I_OUT=75mA
5.00
I_OUT=100mA
I_OUT=150mA
4.95
4.90
-50
-25
0
25
50
75
100
125
150
Temperature [°C]
Figure 17. VOUT with VIN = 5V
5
5.1
4.5
4
5.05
3.5
Current [μA]
VOUT [V]
5
4.95
4.9
3
2.5
2
1.5
4.85
1
4.8
-50
0.5
-25
0
25
50
75
100
0
125
-50
Temperature [°C]
-25
0
25
50
75
100
125
150
Temperature [°C]
Figure 18. VOUT with VIN=3.0V, IOUT=100mA
Figure 20. IIN Leakage Current (Pins 6,7=0V)
1.65
3
1.645
1.64
2.5
V_IN Voltage [V]
VBYP [V]
1.635
1.63
1.625
1.62
1.615
1.61
2
1.5
1
0.5
1.605
0
1.6
-50
-25
0
25
50
75
100
125
-50
150
-25
0
25
50
75
100
125
150
Temperature ['C]
Temperature [°C]
Figure 19. Bypass Pin Voltage
Figure 21. Undervoltage Lockout
© 2005 California Micro Devices Corp. All rights reserved.
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11/08/05
PRELIMINARY
CM4072
Application Information
Ripple Frequency
CP = 0.47μF
The charge pump internal oscillation frequency is
about 250kHz. However, this is the continuous, freerunning frequency, which is usually only seen while the
charge pump is powering up. Such a sawtooth 'ripple'
waveform on CS can have a much lower frequency
than 250kHz. This mode of operation is necessary to
conserve power. If it were not done this way, then a
much larger package with heatsink would be required.
VIN
IOUT
CS Frequency
3.14
3.60
4.50
5.50
15mA
15mA
70mA
70mA
46kHz
35kHz
76kHz
56kHz
CP = 1.0μF
VIN
3.14
3.60
4.50
5.50
The frequency of this 'ripple' is affected by VIN, IOUT,
CS capacitor value and CP capacitor value.
IOUT
100mA
100mA
100mA
100mA
CS Frequency
250kHz
110kHz
67kHz
49kHz
Guidelines for External Capacitors
(1) To find CP: specify value of VIN, and highest value
of IOUT:
If VIN= 3.3V +/- 5%, then minimum value
of CP (µF) = IOUT (mA) / 85.
(5) CBYP, the optional bypass capacitor helps reduce
noise in the LDO; 0.1µF is recommended.
If VIN= 5.0V +/- 10%, then minimum value
of CP (µF) = IOUT (mA) / 700
(2) The VIN decoupling capacitor, CIN, should typically
be much greater than CP to prevent voltage droop during CP charging. Excessive glitches on VIN will affect
the output voltage VOUT. CIN is typically 10X greater
than CP.
(3) CS should be small to ensure that the ripple frequency is high, but at least 2x greater than CP, otherwise the ripple amplitude will be very high. Reducing
the value of CS will increase the ripple frequency.
Examples of CS ripple frequencies
TA=25°C) are shown in following tables:
(4) COUT, the optional VOUT capacitor, helps minimize
noise and improve load regulation; 0.1µF to 100µF is
recommended.
(CS=10μF,
After choosing external component values, check insystem performance (at min/max VIN, max temperature, and min/max IOUT). See the troubleshooting guide
on next page for tips if there are problems.
Charge Pump Noise
The charge pump is 'digital' in operation and can produce digital noise at both the free-running frequency
and at the ripple frequency.
To minimize noise, PCB grounding is important! This
part requires short, low-impedance ground connections for DGND (pin 1), GND (pin 4), the VIN decoupling capacitor (pin 2), the CS capacitor (pin 3), the
Bypass decoupling capacitor (pin 5) and the VOUT
decoupling capacitor (pin 8). All decoupling capacitors
and the CS capacitor should be low-ESR ceramics.
The CP capacitor needs to be low-ESR.
© 2005 California Micro Devices Corp. All rights reserved.
11/08/05
490 N. McCarthy Blvd., Milpitas, CA 95035-5112
●
Tel: 408.263.3214
●
Fax: 408.263.7846
●
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9
PRELIMINARY
CM4072
Efficiency
The power efficiency in % of the combined charge
pump and LDO is approximately:
Using this circuit, IOUT can be 200mA if VIN = 4.75V,
and yet the part will not overheat even if VIN = 5.25V,
IOUT=200mA and the ambient temperature is 85°C.
100 x (VOUT) / (VIN x 2)
Warnings
Power Dissipation
The charge pump output VCP (pin 3) must not be
shorted to GND or held below its internally-set voltage
while the part is powered. This usually results in the
destruction of the part.
The dissipation of the part is approximately:
((VIN x 2) - VOUT) x IOUT
The TDFN-10 package heats at a rate of about 200°C/
W (θJA). Note that this value is approximate because it
depends upon the copper tracks and ground planes on
the pcb. If VIN = 5V and IOUT = 100mA then the power
dissipation will be approximately 500mW. Multiplying
this by the θJA gives an internal temperature about
100°C higher than the ambient temperature (TA). If the
TA is 70°C then the internal temperature will be
approximately 170°C which will trigger the overtemperature circuit and lead to power-down.
Internal temperature = Ambient temperature
+ ( θJA x Power dissipation )
(Must be less than 170°C)
Note that the evaluation PCB has a θJA of less than
150°C/W, based upon measured performance.
How to Reduce the Power Dissipation of the Part
and How to Get More Than 100mA
If VIN = 5V typ., then the charge pump / LDO combination is capable of providing more than 100mA. The only
problem is power dissipation.
If the input voltage is lowered using an external diode
then the output current can be increased without causing the part to overheat. The circuit below illustrates an
example of how to increase the output current.
5V
±10%
1
1N4006
+
Ci
10μF
+
CBYP +
0.1μF
CS
3μF
10
2
3
9
CM4072
TDFN-10
8
4
7
5
6
CP
+ 1μF
VOUT
+ C
O
0.1μF
With VIN = 5V, the maximum current that can be continuously drawn from VCP is approximately 100mA dc.
Never short CP+ (pin 9) to CP- (pin 10). This will cause
large currents to flow from VIN to DGND through the
part, usually causing its destruction. This will happen
even if EN_CP and EN_LDO are off.
Troubleshooting Guide
1) Is the output voltage drooping under heavy loads?
Perhaps the charge pump cannot provide the necessary current. Try increasing the value of CP. If that
does not work, then, is VIN too low? Is VIN dropping
during the CP charging cycle? If VIN is not suitably
decoupled and drops below 3.1V then the available
current will be very low.
2) Is the output voltage oscillating between 5V and 0V?
The part may be reaching its overtemperature limit.
Reduce current consumption, reduce θJA or add an
external diode on the input to reduce VIN.
3. Is the part too noisy? Try increasing the value (or
reducing ESR) of CS, CIN, CS, CB. At minimum current
the charge pump ripple frequency will be low. If VOUT
noise is at the charge pump ripple frequency, then
change values of CP and CS. Reducing the input voltage VIN will reduce the charge pump ripple frequency
noise on VOUT.
4. Will the part power up? Pin 6 must be HIGH to
power up. Even if pin 7 is HIGH, pin 6 must also be
high to power up.
5. Can the cold start power-up time be reduced? Yes,
by reducing the value of the CBYP.
Enable
© 2005 California Micro Devices Corp. All rights reserved.
10
490 N. McCarthy Blvd., Milpitas, CA 95035-5112
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Tel: 408.263.3214
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Fax: 408.263.7846
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11/08/05
PRELIMINARY
CM4072
Mechanical Details
TDFN-10 Mechanical Specifications
Dimensions for the CM4072-50DF/DE supplied in a
10-lead TDFN package are presented below.
Mechanical Package Diagrams
For complete information on the TDFN-10, see the California Micro Devices TDFN Package Information document.
D
10 9 8 7 6
Package
TDFN
JEDEC
No.
MO-229 (Var. WEED-3)✝
Leads
10
Dim.
Millimeters
E
PACKAGE DIMENSIONS
Pin 1
Marking
Inches
Min
Nom
Max
Min
Nom
Max
A
0.70
0.75
0.80
0.028
0.030
0.031
1 2 3 4 5
A1
0.00
0.02
0.05
0.000
0.001
0.002
TOP VIEW
A2
0.45
0.55
0.65
0.018
0.022
0.026
b
0.20
0.18
D
D2
2.20
0.007
2.30
1.40
1.50
2.40
0.087
0.20
L
0.20
0.012
0.091
0.08 C
0.094
A1
0.118
1.60
0.055
0.50
K
0.010
0.10 C
0.118
3.00
e
# per
tape and
reel
0.30
3.00
E
E2
0.25
0.008
0.060
A
SIDE VIEW
A3 A2
0.063
0.020
0.008
0.30
0.40
0.008
0.012
1
0.016
2
3
4
5
Pin 1 ID
3000 pieces
C0.35
Controlling dimension: millimeters
GND PAD
L
D2
✝
This package is compliant with JEDEC standard MO-229, variation
WEED-3 with exception of the "D2" and "E2" dimensions as called
out in the table above.
E2
A3
10
K
9
8
7
6
b
e
8X
BOTTOM VIEW
0.10
M
CAB
Package Dimensions for 10-Lead TDFN
© 2005 California Micro Devices Corp. All rights reserved.
11/08/05
490 N. McCarthy Blvd., Milpitas, CA 95035-5112
●
Tel: 408.263.3214
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Fax: 408.263.7846
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www.cmd.com
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