EMMICRO EM6153V53ES16B

EM MICROELECTRONIC - MARIN SA
R
EM6153
5V Automotive Regulator with Inhibit Input and
Windowed Watchdog
Description
Features
The EM6153 offers a high level of integration by combining
voltage regulation, voltage monitoring and software
monitoring using a windowed watchdog.
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A comparator monitors the voltage applied at the VIN input
comparing it with an internal voltage reference VREF. The
power-on reset function is initialized after VIN reaches VREF
and takes the reset output inactive after a delay TPOR
depending on external resistance ROSC. The reset output goes
active low when the VIN voltage is less than VREF. The RES
and EN outputs are guaranteed to be in a correct state for a
regulated output voltage as low as 1.2 V. The watchdog
function monitors software cycle time and execution.
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If software clears the watchdog too quickly (incorrect cycle
time) or too slowly (incorrect execution) it will cause the
system to be reset. For enhanced security, the watchdog
must be serviced within an “open” time window. During the
remaining time, the watchdog time window is “closed” and a
reset will occur should a TCL pulse be received by the
watchdog during this “closed” time window. The ratio of the
open/closed window is either 33%/67% or 67%/33%.
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The system ENABLE output prevents critical control functions
being activated until software has successfully cleared the
watchdog three times. Such a security could be used to
prevent motor controls being energized on repeated resets of
a faulty system.
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Low quiescent current 90 μA
Very low OFF current consumption < 1uA
-40°C to +125°C temperature range
Highly accurate 5 V, 150 mA guaranteed output (actual
maximum current depends on power dissipation)
Low dropout voltage, typically 250 mV at 100 mA
Unregulated DC input can withstand -42 V reverse battery
and +45 V power transients
Fully operational for unregulated DC input voltage up to
40 V and regulated output voltage down to 3.5 V
No reverse output current
Very low temperature coefficient for the regulated output
Current limiting
Windowed watchdog with an adjustable time windows,
guaranteeing a minimum time and a maximum time
between software clearing of the watchdog
Time base accuracy ±8% (at 100ms)
Sleep mode function (V55)
Adjustable threshold voltage using external resistors
Adjustable power on reset (POR) delay using one
external resistor
Open-drain active-low RESET output
Reset output guaranteed for regulated output voltage
down to 1.2 V
System ENABLE output offers added security
Qualified according to AEC-Q100
Green SO-16 Exposed pad package (RoHS compliant)
When the microcontroller goes in stand-by mode or stops
working, no signal is received on the TCL input and the
EM6153 (version 55) goes into a stand-by mode in order to
save power (CAN-bus sleep detector).
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In EM6153, the voltage regulator has a low dropout voltage
and a low quiescent current of 75 μA. The quiescent current
increases only slightly in dropout prolonging battery life. Builtin protection includes a positive transient absorber for up to
45 V (load dump) and the ability to survive an unregulated
input voltage of -42 V (reverse battery). The input may be
connected to ground or to a reverse voltage without reverse
current flowing from the output to the input.
Applications
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Typical Operating Configuration
Selection Table
Unregulated
Voltage
Inhibit
22uF
+
ROSC
5V
OUTPUT
VDD
EM6153
INH
+
100nF
VDD
R1
10uF
VIN
ROSC
VSS
TCL
I/O
RES
RES
I/O
EN
Microprocessor
INPUT
Automotive systems
Industrial
Home security systems
Telecom / Networking
Computers
Set top boxes
Closed
Open
Window
Window
CAN-bus sleep
detector
Part Number
VREF
EM6153V50
1.52 V
67%
33%
EM6153V53
1.52 V
33%
67%
NO
EM6153V55
1.275 V
67%
33%
YES
NO
Please refer to Fig. 4 for more information about the
open/closed window of the watchdog.
R2
GND
Fig. 1
Copyright © 2006, EM Microelectronic-Marin SA
06/06, rev. B, prelim.
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EM6153
Ordering Information
Part Number
Version
VREF
Package
Delivery Form
V50
V53
V55
1.520 V
1.520 V
1.275 V
ExPadSO-16
ExPadSO-16
ExPadSO-16
Tape & Reel, 2500pcs
Tape & Reel, 2500pcs
Tape & Reel, 2500pcs
EM6153V50ES16B+
EM6153V53ES16B+
EM6153V55ES16B+
Package
Marking
EM6153 050
EM6153 053
EM6153 055
Note: the “+” symbol at the end of the part number means that this product is RoHS compliant (green).
Pin Assignment and Description
SO-16 Exposed Pad
2
Name
3
RES
Open drain active low reset output. RES
must be pulled up to VOUTPUT even if unused
5
TCL
VSS
Watchdog timer clear input signal
6
INPUT
8
12
INH
OUTPUT
Voltage regulator output
13
VDD
Watchdog power supply
14
ROSC
ROSC input for RC oscillator tuning
15
VIN
Voltage comparator input
1, 7, 9, 10, 11, 16
NC
No connect
EN
4
Exposed Pad
Function
Push-pull active low enable output
Ex. Pad SO-16
NC
1
16
NC
EN
2
15
VIN
RES
3
14
ROSC
Voltage regulator input
TCL
4
13
VDD
Inhibit input
VSS
5
12
INPUT
6
11
NC
NC
7
10
NC
INH
8
9
NC
GND terminal
EM6153
OUTPUT
Connect to VSS or left floating
Block Diagram EM6153
INPUT
Voltage
Regulator
OUTPUT
VDD
Voltage
Reference
Voltage
Reference
VREF
VIN
ROSC
Enable
Logic
EN
Reset
Control
RES
Comparator
+
Open drain
output RES
Current
Controlled
Oscillator
Timer
TCL
Fig. 3
Copyright © 2006, EM Microelectronic-Marin SA
06/06, rev. B, prelim.
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EM6153
a low ESR value. Tantalum capacitors are recommended.
See the notes related to Table 2. Special care must be
taken in disturbed environments (automotive, proximity of
motors and relays, etc.).
Absolute Maximum Ratings
Parameter
Symbol
Conditions
Continuous voltage at INPUT and
VINPUT
-0.3 to +40V
INH to VSS
Transients on INPUT for
VTRANS
Up to +45V
t < 100 ms and duty cycle 1%
Max. voltage at any signal pin
VMAX
VOUTPUT + 0.3V
Min. voltage at any signal pin
VMIN
VSS – 0.3V
Reverse supply voltage on
VREV
-42V
INPUT and INH
Storage temperature
TSTO
-65 to +150 °C
ESD
According to MIL-STD-883
VSmax
2000V
method 3015.7
Handling Procedures
This device has built-in protection against high static
voltages or electric fields; however, it is advised that normal
precautions be taken as for any other CMOS component.
Unless otherwise specified, proper operation can only occur
when all terminal voltages are kept within the voltage range.
At any time, all inputs must be tied to a defined logic voltage
level.
Operating Conditions
Parameter
Operating junction
temperature
INPUT voltage (note 1, 2)
Table 1
Stresses above these listed maximum ratings may cause
permanent damages to the device. Exposure beyond
specified operating conditions may affect device reliability or
cause malfunction.
The input capacitor is necessary to compensate the line
influences. A resistor of approx. 1 Ω connected in series
with the input capacitor may be used to damp the oscillation
of the input capacitor and input inductance. The ESR value
of the capacitor plays a major role regarding the efficiency of
the decoupling. It is recommended also to connect a
ceramic capacitor (100 nF) directly at the IC's pins. In
general the user must assure that pulses on the input line
have slew rates lower than 1 V/µs. On the output side, the
capacitor is necessary for the stability of the regulation
circuit. The stability is guaranteed for values of 10 µF or
greater. It is especially important to choose a capacitor with
Note 2:
Note 3:
Note 4:
Note 5:
Min.
Max.
Units
Tj
-40
+125
°C
VINPUT
5.5
40
V
RES and EN guaranteed
VOUTPUT
(note 3)
OUTPUT current (note 4)
IOUTPUT
Comparator input voltage
VIN
RC-oscillator programming
ROSC
Package thermal resistance
from junction to ambient :
Exp. Pad SO-16 150 MILS
Rth(j-a)
(note 5)
Decoupling Methods
Note 1:
Symbol
1.2
0
10
30
V
150
mA
VOUTPUT V
1000
kΩ
90
°C/W
Table 2
full operation guaranteed. To achieve the load regulation specified in Table 3 a 10 μF capacitor or greater is required on the INPUT,
see Fig. 1b. The 10 μF must have an effective resistance ≤ 4 Ω and a resonant frequency above 500 kHz.
a 10 μF load capacitor and a 100 nF decoupling capacitor are required on the regulator OUTPUT for stability. The 10 μF must have
an effective series resistance of ≤ 4 Ω and a resonant frequency above 500 kHz.
RES must be pulled up externally to VOUTPUT even if it is unused. ( RES and EN are used as inputs by EM test)
the OUTPUT current will not apply to the full range of input voltage. Power dissipation that would require the EM6153 to work above
the maximum junction temperature (+125°C) must be avoided.
the thermal resistance specified assumes the package is soldered to a PCB. A typical value of 51°C/W has been obtained with a dual
layer board, with the slug soldered to the heat-sink area of the PCB (See Figure 14)
Copyright © 2006, EM Microelectronic-Marin SA
06/06, rev. B, prelim.
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EM6153
Electrical Characteristics
VINPUT = 13.5 V, CL = 10 μF + 100 nF, CINPUT = 22 μF, VINH = 5 V, VDD connected to VOUTPUT, Tj = -40 to +125°C, unless
otherwise specified
Parameter
Supply current OFF mode
Supply current in standby mode and sleep
mode for V55 (note 1)
Supply current (note1)
Supply current
Voltage regulator
Output voltage
Line regulation (note 2)
Load regulation (note 2)
Dropout voltage (note 3)
Current limit
Supervisory and watchdog
RES & EN
Output Low Voltage
EN
Output High Voltage
TCL Input Low Level
TCL Input High Level
INH Input On Voltage
INH Input Off Voltage
INH current
TCL Leakage current
Comparator reference (note 4, 5)
Symbol Test Conditions
ROSC = don’t care, TCL = VOUTPUT,
ISS
VIN = 0 V, VINH = 0 V, Tj < 100°C
ROSC = don’t care, TCL = VOUTPUT,
ISS
VIN = 0 V, IL = 100 μA
ROSC = 100 kΩ, I/PS at VOUTPUT,
ISS
O/PS 1 MΩ to VOUTPUT, IL = 100 μA
ROSC = 100 kΩ, I/PS at VOUTPUT,
ISS
O/PS 1 MΩ to VOUTPUT, IL = 50 mA
Min.
VOUTPUT 5 mA ≤ IL ≤ 100 mA
VLINE
6 V ≤ VINPUT ≤ 28 V, IL = 1 mA
VL
1 mA ≤ IL ≤ 100 mA, VINPUT = 6 V
VDROPOUT IL = 100 mA
ILmax
OUTPUT tied to VSS, VINPUT = 6 V
4.85
VOL
VOH
VIL
VIH
VINH, on
VINH, off
IINH
ILI
VREF
Comparator hysteresis (note 5)
VIN input resistance
VOUTPUT = 4.5 V, IOL = 8 mA
VOUTPUT = 1.2 V, IOL = 0.5 mA
VOUTPUT = 4.5 V, IOH= -1 mA
VOUTPUT = 1.2 V, IOH= -20 μA
VINH = 5 V
VSS ≤ VTCL ≤ VOUTPUT
Version V50
Version V53
Version V55
VHY
RVIN
150
3.5
0.9
VSS
2.5
3.5
1.475
1.475
1.235
Typ.
Max.
Unit
0
1
μA
80
135
μA
90
140
μA
1.7
4
mA
5
5
5.15
30
V
mV
50
250
200
95
500
500
mV
mV
mA
0.25
0.04
4.1
1.05
0.45
0.2
V
V
V
V
V
V
V
V
μA
μA
V
V
V
mV
MΩ
0.5
VOUTPUT
4
0.05
1.520
1.520
1.275
2
100
0.8
8
1.565
1.565
1.315
Table 3
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
if INPUT is connected to VSS, no reverse current will flow from the OUTPUT to the INPUT.
regulation is measured at constant junction temperature using pulse testing with a low duty cycle.
the dropout voltage is defined as the INPUT to OUTPUT differential, measured with the input voltage equal to 5.0 V.
the comparator and the voltage regulator have separate voltage references (see “Block Diagram” Fig. 3).
the comparator reference is the power-down reset threshold. The power-on reset threshold equals the comparator reference voltage
plus the comparator hysteresis (see Fig. 5).
Copyright © 2006, EM Microelectronic-Marin SA
06/06, rev. B, prelim.
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EM6153
Timing Characteristics
VINPUT = 13.5 V, IL = 100 μA, CL = 10 μF + 100 nF, CINPUT = 22 μF, VINH = 5 V, Tj = -40 to + 125 °C, unless otherwise specified
Parameter
Propagation delay TCL to Output Pins
VIN sensitivity
Watchdog Reset Pulse Period
Version V50
Power-on Reset delay
Closed Window Time
Open Window Time
Watchdog Time
Watchdog Reset Pulse Width if no TCL
Version V53
Power-on Reset delay
Closed Window Time
Open Window Time
Watchdog Time
Watchdog Reset Pulse Width if no TCL
Version V55
Power-on Reset delay
Closed Window Time
Open Window Time
Watchdog Time
Watchdog Reset Pulse Width if no TCL
Watchdog Reset Pulse Width in Sleep Mode
Watchdog Reset Pulse Period in Sleep Mode
Symbol Test Conditions
TDIDO
TSEN
VINhigh=1.1xVREF, VINlow=0.9xVREF
TWDRP
TCL inactive
Min.
TPOR
TCW
TOW
TWD
TWDR
ROSC= 121.6 kΩ ±1%
91.6
74
37
92.5
2.25
100
80
40
100
2.5
108.3
85.76
42.88
107.2
2.75
ms
TPOR
TCW
TOW
TWD
TWDR
ROSC = 23.2 kΩ ±1%
4.57
9.24
18.48
18.48
0.56
5.0
10
20
20
0.625
5.44
10.77
21.54
21.54
0.69
ms
TPOR
TCW
TOW
TWD
TWDR
TWDRS
TWDRPS
ROSC = 107.5 kΩ ±1%
91.6
74
37
92.5
2.25
2.8
750
100
80
40
100
2.5
3.2
1100
108.3
85.76
42.88
107.2
2.75
3.6
1450
ms
ROSC off; RINT=1MΩ
TCL inactive
Typ. Max.
250
500
0.5
3
15
TCW + TOW+ TWDR
Units
ns
μs
ms
Table 4
For different values of TWD and ROSC, see figures 9 to 11.
Timing Waveforms
Watchdog Timeout Period
Version V50:
Version V53:
For ROSC=121.6 kOhm
TWD
TWD
TCW (closed window)
Watchdog
timer reset
For ROSC=23.2 kOhm
TOW (open)
80
TCW (closed)
120
Watchdog
timer reset
Time [ms]
TOW (open)
10
30
Time [ms]
( V30, V50 and V55 have similar ratios for T CW and TOW )
Fig. 4
Copyright © 2006, EM Microelectronic-Marin SA
06/06, rev. B, prelim.
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Voltage Monitoring
VIN
Conditions:
VOUTPUT > 3V
No timeout
VHY
VREF
TSEN
TSEN
TSEN
TSEN
TPOR
TPOR
RES
Fig. 5
Timer Reaction
Conditions: VIN > VREF after power-up sequence
TTCL
TCW
TCW
TCW + TOW TCW + TOW
TOW
TCW
TCW + TOW
TTCL
TCL
RES
EN
TWDR
1
2
3
3 correct TCL services
EN goes active low
Timeout
- Watchdog timer reset
Fig. 6
Combined Voltage and Timer Reaction
VIN
Condition:
VOUTPUT > 3V
VREF
TPOR
TCL
TOW
TTCL
TCW
TCW+TOW
RES
EN
1
2
3
TCL
too early
3 correct TCL services
EN goes active low
- Watchdog timer reset
Fig. 7
Copyright © 2006, EM Microelectronic-Marin SA
06/06, rev. B, prelim.
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EM6153
Functional Description
good load regulation a 10 μF capacitor (or greater) is
needed on the INPUT (see Fig. 8). Tantalum or aluminum
electrolytic are adequate for the 10 μF capacitor; film types
will work but are relatively expensive. Many aluminum
electrolytic have electrolytes that freeze at about –30°C, so
tantalums are recommended for operation below –25°C.
The important parameters of the 10 μF capacitor are an
effective series resistance of lower than 4 Ω and a resonant
frequency above 500 kHz.
VIN Monitoring
The power-on reset and the power-down reset are
generated as a response to the external voltage level
applied on the VIN input. The threshold voltage at which
reset is asserted or released (VRESET) is determined by the
external voltage divider between VDD and VSS, as shown on
Fig. 8. A part of VDD is compared to the internal voltage
reference. To determine the values of the divider, the
leakage current at VIN must be taken into account as well as
the current consumption of the divider itself. Low resistor
values will need more current, but high resistor values will
make the reset threshold less accurate at high temperature,
due to a possible leakage current at the VIN input. The sum
of the two resistors (R1 + R2) should stay below 500 kΩ. The
formula is:
A 10 μF capacitor (or greater) and a 100 nF capacitor are
required on the OUTPUT to prevent oscillations due to
instability. The specification of this 10 μF capacitor is as per
the 10 μF capacitor on the INPUT (see previous paragraph).
Example: choosing R1 = 200 kΩ and R2 = 100 kΩ gives
VRESET =4.56 V (typical) for version V50 and V53.
The EM6153 will remain stable and in regulation with no
external load and the dropout voltage is typically constant as
the input voltage fall below its minimum level (see Table 2).
These features are especially important in CMOS RAM
keep-alive applications.
At power-up the reset output ( RES ) is held low (see Fig. 5).
Power Dissipation
When VIN becomes greater than VREF, the RES output is
held low for an additional power-on-reset (POR) delay TPOR
(defined with the external resistor connected at ROSC pin).
The TPOR delay prevents repeated toggling of RES even if
VDD voltage drops out and recovers. The TPOR delay allows
the microprocessor’s crystal oscillator time to start and
stabilize and ensures correct recognition of the reset signal
to the microprocessor.
Care must be taken not to exceed the maximum junction
temperature (+125°C). The power dissipation within the
EM6153 is given by the formula:
VRESET = VREF x (1 + R1/R2).
PTOTAL = (VINPUT – VOUTPUT) × IOUTPUT + (VINPUT) × ISS
The maximum continuous power dissipation at a given
temperature can be calculated using the formula:
PMAX = ( 125°C – TA) / Rth(j-a)
where Rth(j-a) is the thermal resistance from the junction to
the ambient and is specified in Table 2. Note that Rth(j-a)
given in Table 2 assumes that the package is soldered to a
PCB (see figure 16). The above formula for maximum power
dissipation assumes a constant load (i.e. >100 s). The
transient thermal resistance for a single pulse is much lower
than the continuous value.
The RES output goes active low generating the powerdown reset whenever VIN falls below VREF. The sensitivity or
reaction time of the internal comparator to the voltage level
on VIN is typically 3 μs.
Timer Programming
The on-chip oscillator allows the user to adjust the power-on
reset (POR) delay TPOR and the watchdog time TWD by
changing the resistor value of the external resistor ROSC
connected between the pin ROSC and VSS (see Fig. 8). The
closed and open window times (TCW and TOW) as well as the
watchdog reset pulse width (TWDR), which are TTCL
dependent, will vary accordingly. The watchdog time TWD
can be obtained with figures 9 to 12 or with the Excel
application EM6151ResCalc.xls available on EM website.
TPOR is equal to TWD with the minimum and maximum
tolerances increased by 1% (For Version 53, TPOR is one
fourth of TWD).
CAN-Bus Sleep Mode Detector (version 55)
When the microcontroller goes into a standby mode, it
implies that it does not send any pulses on the TCL input of
the EM6153. After three reset pulse periods (TCW + TOW +
TWDR) on the RES output, the circuit switches on an internal
resistor of 1 MΩ, and it will have a reset pulse of typically 3
ms every 1 second on the RES output. When a TCL edge
Note that the current consumption increases as the
frequency increases.
Watchdog Timeout Period Description
(rising or falling) appears on the TCL input or the power
supply goes down and up, the circuit switches to the ROSC.
The watchdog timeout period is divided into two periods, a
closed window period (TCW) and an open window period
(TOW), see Fig. 4. If no pulse is applied on the TCL input
Voltage Regulator
The EM6153 has a 5 V, 150 mA, low dropout voltage
regulator. The low supply current makes the EM6153
particularly suitable for automotive systems which remain
continuously powered. The input voltage range is 4 V to 40
V for operation and the input protection includes both
reverse battery (42 V below ground) and load dump
(positive transients up to 45 V). There is no reverse current
flow from the OUTPUT to the INPUT when the INPUT
equals VSS. This feature is important for systems which
need to implement (with capacitance) a minimum power
supply hold-up time in the event of power failure. To achieve
Copyright © 2006, EM Microelectronic-Marin SA
06/06, rev. B, prelim.
during the open window period TOW, the RES output goes
low for a time TWDR. When a pulse is applied on the TCL
input, the cycle is restarted with a close window period.
For example if TWD = TPOR = 100ms, TCW = 80 ms, TOW =
40ms and TWDR = 2.5ms.
When VIN recovers after a drop below VREF, the pad RES is
set low for the time TPOR during which any TCL activation is
disabled.
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EM6153
of the POR delay. A TCL pulse will have no effect until this
power-on-reset delay is completed. When the risk exists that
TCL temporarily floats, e.g. during TPOR, a pull-up to
VOUTPUT is required on that pin. After the POR delay has
elapsed, RES goes inactive and the watchdog timer starts
acting. If no TCL pulse occurs, RES goes active low for a
short time TWDR after each closed and open window period.
A TCL pulse coming during the open window clears the
watchdog timer. When the TCL pulse occurs too early
(during the closed window), RES goes active and a new
timeout sequence starts. A voltage drop below the VREF
level for longer than typically 3μs overrides the timer and
immediately forces RES active and EN inactive. Any
further TCL pulse has no effect until the next power-up
sequence has completed.
Timer Clearing and RES Action
The watchdog circuit monitors the activity of the processor.
If the user’s software does not send a pulse to the TCL
input within the programmed open window timeout period a
short watchdog RES pulse is generated which is equal to
TWDR (see Fig. 6).
With the open window constraint, new security is added to
conventional watchdogs by monitoring both software cycle
time and execution. Should software clear the watchdog too
quickly (incorrect cycle time) or too slowly (incorrect
execution) it will cause the system to be reset. If software is
stuck in a loop which includes the routine to clear the
watchdog then a conventional watchdog would not make a
system reset even though the software is malfunctioning;
the circuit would make a system reset because the
watchdog would be cleared too quickly.
If no TCL signal is applied before the closed and open
windows expire, RES will start to generate square waves of
period TWDRP = TCW + TOW + TWDR. The watchdog will remain
in this state until the next TCL falling edge appears during
an open window, or until a fresh power-up sequence. The
system enable output, EN , can be used to prevent critical
control functions being activated in the event of the system
going into this failure mode (see section “Enable- EN
Output”).
The RES output must be pulled up to VOUTPUT even if the
output is not used by the system (see Fig 8).
Enable - EN Output
The system enable output, EN , is inactive always when
RES is active and remains inactive after a RES pulse until
the watchdog is serviced correctly 3 consecutive times (i.e.
the TCL pulse must come in the open window). After three
consecutive services of the watchdog with TCL during the
open window, the EN goes active low.
A malfunctioning system would be repeatedly reset by the
watchdog. In a conventional system critical motor controls
could be energized each time reset goes inactive (time
allowed for the system to restart) and in this way the
electrical motors driven by the system could function out of
control. The circuit prevents the above failure mode by using
the EN output to disable the motor controls until software
has successfully cleared the watchdog three times (i.e. the
system has correctly re-started after a reset condition).
Combined Voltage and Timer Action
The combination of voltage and timer actions is illustrated
by the sequence of events shown in Fig. 6. On power-up,
when the voltage at VIN reaches VREF, the power-on-reset,
POR, delay is initialized and holds RES active for the time
Typical Application
Unregulated
Voltage
INPUT
VDD
EM6153
Inhibit
Regulated Voltage (5V)
OUTPUT
+
100nF
10uF
R1
Address decoder
VIN
INH
22uF +
ROSC
VSS
TCL
Microprocessor
RES
RES
EN
100k
EN
R2
Motor
controls
GND
Fig. 8
The important parameters of the 10 μF input capacitor are an effective series resistance lower than 4 Ω and a resonant
frequency above 500 kHz.
Copyright © 2006, EM Microelectronic-Marin SA
06/06, rev. B, prelim.
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EM6153
V50 ROSC Coefficient versus TWD at VDD= 5.0V and Tj=-40 to +125°C
1.44
1.38
Max
Rosc Coefficient [kOhm/ms]
1.32
1.26
1.20
Typ
1.14
1.08
Min
1.02
0.96
10
100
1000
Twd [ms]
Fig. 9
V53 ROSC Coefficient versus TWD at VDD= 5.0V and Tj=-40 to +125°C
1.46
1.40
Max
Rosc Coefficient [kOhm/ms]
1.34
1.28
1.22
Typ
1.16
1.10
Min
1.04
0.98
10
100
1000
Twd [ms]
Fig. 10
Copyright © 2006, EM Microelectronic-Marin SA
06/06, rev. B, prelim.
9
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R
EM6153
V55 ROSC Coefficient versus TWD at VDD= 5.0V and Tj=-40 to +125°C
1.34
1.28
Max
Rosc Coefficient [kOhm/ms]
1.22
1.16
1.10
Typ
1.04
0.98
Min
0.92
0.86
10
100
1000
Twd [ms]
Fig. 11
Typical maximum OUTPUT current versus INPUT voltage
200
Exposed Pad SO-16 Package
Botton slug soldered to PCB
180
160
OUTPUT Current [mA]
140
TA=25°C
120
100
80
TA=85°C
60
40
20
0
5
10
15
20
25
30
35
40
INPUT Voltage [V]
Fig. 12
Copyright © 2006, EM Microelectronic-Marin SA
06/06, rev. B, prelim.
10
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R
EM6153
Package Information
Dimensions of Exposed Pad SO-16 Package
Dimensions in mm
Min
Nom
A
1.43
1.55
A1
0.00
0.05
A2
1.43
1.50
B
0.35
0.41
C
0.19
0.20
D
9.80
9.93
E
3.81
3.94
e
1.27
H
5.84
5.99
L
0.41
0.64
Max
1.68
0.10
1.58
0.49
0.25
9.98
3.99
6.20
0.89
Exposed pad: 3.56 x 2.29 mm
Fig. 13
Dual Layer PCB
85.00
Vss
Vss
EN
RES
TCL
INH
VIN
12.50
OUTPUT
55.00
23.50
INPUT
EM6153 Ex Pad SO16 Top View
Dimensions in mm
EM6153 Ex Pad SO16 Botton View
Fig. 14
EM Microelectronic-Marin SA (EM) makes no warranty for the use of its products, other than those expressly contained in the Company's
standard warranty which is detailed in EM's General Terms of Sale located on the Company's web site. EM assumes no responsibility for
any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without
notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual
property of EM are granted in connection with the sale of EM products, expressly or by implications. EM's products are not authorized for
use as components in life support devices or systems.
SUBJECT TO CHANGE WITHOUT NOTICE
Copyright © 2006, EM Microelectronic-Marin SA
06/06, rev. B, prelim.
11
www.emmicroelectronic.com