64MB/128MB/256MB/512MB Secure Digital Card Description Features Operating Voltage: 2.7V ~ 3.6V ESSDC64 / ESSDC128 / ESSDC256 Operating Temperature: -25℃ ~ / ESSDC512 are different memory 85℃ capacities from 64MB to 512MB of the Data Transfer Rate: Average 2MB/s Secure Digital Card. They are non-volatile, Durability: 10,000 insertion/removal which means no external power required to cycles retain the information stored on these. Mechanical Write Protection Switch Besides, They are also the solid-state SD Host allows MultiMediaCard device that without moving parts to skip or upward compatibility break down. ESMSDC64 / ESMSDC128 / Form Factor: 24mm x 32mm x 2.1mm ESMSDC256 / ESMSDC512 can offer an incredible combination of fast data transfer, great flexibility, excellent security and incredibly small size. Pin Definition Eorex Corporation www.eorex.com 1/6 Pin No. Name Type Description 1 CD/DA I/O/PP Card Detect/Data Line[Bit3] 2 CMD PP Command/Response 3 VSS1 S Supply voltage ground 4 VDD S Supply voltage 5 CLK I Clock 6 VSS2 S Supply voltage ground 7 DAT0 I/O/PP Data Line [Bit0] 8 DAT1 I/O/PP Data Line [Bit1] 9 DAT2 I/O/PP Data Line [Bit2] 64MB/128MB/256MB/512MB Secure Digital Card Architecture Eorex Corporation www.eorex.com 2/6 64MB/128MB/256MB/512MB Secure Digital Card Bus Operating Conditions 1. General Parameter Symbol Peak voltage on all lines Min. Max. Unit -0.3 VDD+0.3 V -10 10 µA -10 10 µA Remark All Inputs Input Leakage Current All Outputs Output Leakage Current 2. Power Supply Voltage Parameter Symbol Min Max Unit VDD 2.0 3.6 V Supply voltage Remark CMD0, 12, 55, ACMD41 commands Supply voltage specified in OCR register Except CMD0, 15, 55, ACMD41 commands Supply voltage differentials (VSS1, VSS2) -0.3 Power up time 0.3 V 250 ms From 0V to VDD Min. Note: The current consumption of any card during the power-up procedure must not exceed 10mA. 3. Bus Signal Line Load The total capacitance CL of each line of the MultiMediaCard bus is the sum of the bus master capacitance CHOST, the bus capacitance CBUS itself and the capacitance CCARD of each card connected to this line: CL = CHOST + CBUS + N* CCARD Where N is the number of connected cards. Requiring the sum of the host and bus capacitance’s not to exceed 30pF for up to 10 cards, and 40pF up to 30 cards, the following values must not be exceeded: Parameter Symbol Bus signal line capacitance Signal card capacitance Min Max Unit CL 100 pF CCARD 10 pF 16 nH fpp≦20MHz 90 KΩ May be used for card Maximum signal line inductance Pull-up resistance inside card (pin1) RDAT3 10 Remark fpp≦20MHz, 7 cards detection Note that the total capacitance of CMD and DAT lines will be consist of CHOST, CBUS and one CCARD only since they are connected separately to the SD Memory Card host. Parameter Pull-up resistance Bus signal line capacitance Symbol Min Max Unit Remark RCMD, RDAT 10 100 KΩ To prevent bus floating 250 pF fpp≦5MHz, 21 cards CL Eorex Corporation www.eorex.com 3/6 64MB/128MB/256MB/512MB Secure Digital Card 4. Bus Signal Levels As the bus can be supplied with a variable supply voltage, all signal levels are related to the supply voltage. To meet the requirements of the JEDEC specification JESD8-1A, the card input and output voltages shall be within the following specified ranges for any VDD of the allowed voltage range: Parameter Symbol Min Output HIGH voltage VOH 0.75* VDD Output LOW voltage VOL Input HIGH voltage VIH Input LOW voltage VIL Unit Remark V IOH=-100µA @VDD min 0.125* VDD V IOL=-100µA @VDD min 0.625* VDD VDD+0.3 V VSS-0.3 0.25* VDD V Eorex Corporation www.eorex.com 4/6 Max 64MB/128MB/256MB/512MB Secure Digital Card 5. Bus Timing Parameter Symbol Min Max Unit Remark Clock CLK (All values are referred to min (VIH) and max (VIL) Clock frequency Data Transfer Mode fpp 0 20 MHz CL<100pF,(7 cards) Clock frequency Identification Mode (The low freq. fOD 0 400 KHz CL<250pF,(21 cards) tWL 10 ns CL≤100pF, (7 cards) 50 ns CL≤250pF, (21 cards) 10 ns CL≤100pF, (7 cards) 50 ns CL≤250pF, (21 cards) 10 ns CL≤100pF, (7 cards) 50 ns CL≤250pF, (21 cards) 10 ns CL≤100pF, (7 cards) 50 ns CL≤250pF, (21 cards) is required for MultiMediaCard compatibility.) Clock low time Clock high time tWH Clock rise time tTLH Clock fall time tTHL Inputs CMD, DAT (referenced to CLK) Input set-up time fISU 5 ns CL<25pF,(1 cards) Input hold time fIH 5 ns CL<25pF,(1 cards) fODLY 0 ns CL<25pF,(1 cards) Outputs CMD, DAT (referenced to CLK) Output Delay time Eorex Corporation www.eorex.com 5/6 14 64MB/128MB/256MB/512MB Secure Digital Card 6. Reliability and Durability Temperature Moisture and corrosion Durability Bending Torque Drop test UV light exposure Visual inspection Shape and form Minimum moving force of WP witch WP Switch cycles Operation: -25℃ / 85℃ (Target spec) Storage: -40℃ (168h) / 85℃ (500h) Junction temperature: max. 95℃ Operation: 25℃ / 95% rel. humidity Storage: 40℃ / 93% rel. hum./ 500h Salt Water Spray: 3% NaCI/35C; 24h acc. MIL STD Method 1009 10,000 mating cycles; test procedure: tbd. t.b.d t.b.d 1.5m free fall UV: 200nm, 15Ws/cm2 according to ISO7816-1 No warp page; no mold skin; complete form; no cavities surface smoothness <= -0.1mm/cm2 within contour; no cracks; no pollution (fat, oil dust, etc.) 40gf (Ensures that the WP switch will not slide while it is inserted to the connector.) t.b.d Above technical information is based on industry standard data and tested to be reliable. However, Transcend makes no warranty, either expressed or implied, as to its accuracy and assumes no liability in connection with the use of this product. Transcend reserves the tight to make changes in specifications at any time without prior notice. Eorex Corporation www.eorex.com 6/6