ESMT AD62551A

ESMT
AD62551A
USB controller with external Amplifier and Recording function
Features
z Compliant with USB Specification v1.1, and USB
2.0 full speed
z Support I2S input and I2S output interface of
master mode
Sampling frequencies(Fs):48kHz
z Support recording function
z Supports Win Me//2000/XP and MacOS
z True plug-and-play application, no driver is
required for basic USB speaker application
z Support volume/mute control with external button
z Built-in 5V to 3.3V regulator for internal device
operation
z 12 MHz Crystal Input
z 32-pin LQFP(Pb free)
Description
AD62551A is a USB audio controller with I2S
interface and supports recording function. The
device also has an I2S input port and I2S output port.
The I2S output port allows other high performance
audio device (i.e. AD8356A/AD8256A) to be
controlled by AD62551A.
Functional Block Diagram
Elite Semiconductor Memory Technology Inc.
Publication Date: Apr. 2007
Revision: 1.2
1/10
ESMT
AD62551A
Pin Assignment
Pin Description
Pin
1
Name
MSDA
Type
I/O
Description
2
I C’s SDA of Master mode
Characteristics
Schmitt trigger TTL input buffer
2
2
MSCL
O
I C’s SCL of master mode
3
PDO
O
Power-down output (Note1)
4
SDATAO
O
Serial audio output (Note1)
5
LRCIN
O
L/R clock output(Fs) (Note1)
6
BCLK
O
BCLK output(64xFs) (Note1)
7
SDATAI
I
Serial audio data input
8
MCLK
O
Master clock(256xFs)
9
GND
P
Ground
10
NC
NC
No connection
11
NC
NC
No connection
12
VDD
P
Schmitt trigger TTL input buffer
5V supply voltage
Elite Semiconductor Memory Technology Inc.
Publication Date: Apr. 2007
Revision: 1.2
2/10
ESMT
AD62551A
13
VDD
P
5V supply voltage
14
NC
NC
No connection
15
NC
NC
No connection
16
GND
P
Ground
17
USB/I 2 S
I
Low is USB mode, high is I2S mode
18
NC
NC
19
SEL
I
Mode selection bit
20
XO
O
Crystal output
21
XI
I
Crystal input
22
GND
P
Ground
23
REGO
O
3.3V regulator output
24
VDD
P
5V supply voltage
25
USBDM
I/O
USB data D-
26
USBDP
I/O
USB data D+
27
GND
P
Ground
28
VOLDN
I
Volume down, low active
With internal pull-up resistor
29
VOLUP
I
Volume up, low active
With internal pull-up resistor
30
MUTE
I
Power-down and mute of Class D
31
ERROR
O
Error output
Open-Drain output
32
RESET
I
Reset signal
Schmitt trigger TTL input buffer
Schmitt trigger TTL input buffer
No connection
Schmitt trigger TTL input buffer
Schmitt trigger TTL input buffer
Note1: Must be strapped resistor 1MΩ to 3.3V(REGO) or GND. BCLK, LRCIN and PDO must be strapped
to GND. SDATAO is strapped to GND when AD62551A is button mode, otherwise strapped to 3.3V
when AD62551A is I2C slave mode.
Absolute Maximum Ratings
Symbol
VDD
Vi
Tstg
Ta
Parameter
Supply for regulator input
Input Voltage
Storage Temperature
Ambient Operating Temperature
Min
0
-0.3
-65
0
Max
5.5
3.6
150
70
Units
V
V
o
C
o
C
Recommended Operating Conditions
Symbol
Parameter
Typ
VDD
Supply for regulator input
4.5~5.5
Ta
Ambient Operating Temperature
Elite Semiconductor Memory Technology Inc.
0~70
Units
V
o
C
Publication Date: Apr. 2007
Revision: 1.2
3/10