HANBIT HMD4M144D9WG-5

HANBit
HMD4M144D9WG
64Mbyte(4Mx144) 200-pin ECC Mode 4K Ref. DIMM Design 5V
Part No. HMD4M144D9WG
GENERAL DESCRIPTION
The HMD4M144D9WG is a 4Mbit x 144bit dynamic RAM high-density memory module. The module consists of eight
CMOS 4Mx16bit DRAMs in 50-pin TSOP packages and one CMOS 4M x 16bit DRAM in 50pin TSOP package
mounted on a 200-pin, double-sided, FR-4-printed circuit board. A 0.1uF or 4.7uF decoupling capacitor is mounted on the
printed circuit board for each DRAM components.
The module is a dual In-line memory module with edge connections and is intended for mounting in to 200-pin edge
connector sockets. All module components may be powered from a single 5V DC power supply and all inputs and outputs
are TTL-compatible.
FEATURES
OPTIONS
w Access times : 50, 60 ns
MARKING
w Timing
w High -density 64MByte design
50ns access
-5
w Part identification
60ns access
-6
w Packages
- HMD4M144D9WG (4K Cycles/64ms Ref, Gold)
w Single +5V ± 0.5V power supply
200-pin DIMM
D
w JEDEC Standard pinout
w ECC mode operation
w TTL compatible inputs and output
PERFORMANCE RANGE
Speed
tRAC
tCAC
tRC
tPC
-5
50ns
13ns
90ns
35ns
-6
60ns
15ns
110ns
40ns
PIN NAMES
Pin Name
Function
Pin Name
Function
Pin Name
Function
BA0-BA11
Address Input
BRAS
Row Address Strobe
Vss
Ground
DQ0-DQ143
Data In/Out
BCAS1,BCAS2
Column Address Strobe
NC
No Connection
BWE
Read/Write Enable
Vcc
Power(+5V)
URL:www.hbe.co.kr
REV.1.0.(August.2002)
-1-
HANBit Electronics Co.,Ltd.
HANBit
HMD4M144D9WG
PIN ASSIGNMENT
PIN
Symbol
PIN
Symbol
PIN
Symbol
PIN
Symbol
PIN
Symbol
PIN
Symbol
1
Vss
35
DQ14
69
DQ29
101
Vss
135
Vss
169
DQ94
2
Vss
36
DQ50
70
DQ65
102
Vss
136
Vss
170
DQ130
3
DQ0
37
DQ15
71
DQ30
103
BA6
137
DQ80
171
DQ95
4
DQ36
38
DQ51
72
DQ66
104
BA7
138
DQ116
172
DQ131
5
DQ1
39
DQ16
73
DQ31
105
BA8
139
DQ81
173
DQ96
6
DQ37
40
DQ52
74
DQ67
106
BA9
140
DQ117
174
DQ132
7
DQ2
41
DQ17
75
DQ32
107
BA10
141
DQ82
175
DQ97
8
DQ38
42
DQ53
76
DQ68
108
BA11
142
DQ118
176
DQ133
9
DQ3
43
DQ18
77
DQ33
109
NC
143
DQ83
177
DQ98
10
DQ39
44
DQ54
78
DQ69
110
/BWE
144
DQ119
178
DQ134
11
DQ4
45
DQ19
79
DQ34
111
NC
145
DQ84
179
DQ99
12
DQ40
46
DQ55
80
DQ70
112
NC
146
DQ120
180
DQ135
13
DQ5
47
DQ20
81
Vcc
113
Vss
147
DQ85
181
DQ100
14
DQ41
48
DQ56
82
Vcc
114
Vss
148
DQ121
182
DQ136
15
DQ6
49
Vcc
83
DQ35
115
Vss
149
DQ86
183
Vcc
16
DQ42
50
Vcc
84
DQ71
116
Vss
150
DQ122
184
Vcc
17
Vcc
51
DQ21
85
/BCAS1
117
DQ72
151
Vcc
185
DQ101
18
Vcc
52
DQ57
86
/BCAS2
118
DQ108
152
Vcc
186
DQ137
19
DQ7
53
DQ22
87
/BRAS
119
Vcc
153
DQ87
187
DQ102
20
DQ43
54
DQ58
88
NC
120
Vcc
154
DQ123
188
DQ138
21
DQ8
55
DQ23
89
NC
121
DQ73
155
DQ88
189
DQ103
22
DQ44
56
DQ59
90
NC
122
DQ109
156
DQ124
190
DQ139
23
DQ9
57
DQ24
91
NC
123
DQ74
157
DQ89
191
DQ104
24
DQ45
58
DQ60
92
NC
124
DQ110
158
DQ125
192
DQ140
25
DQ10
59
DQ25
93
BA0
125
DQ75
159
DQ90
193
DQ105
26
DQ46
60
DQ61
94
BA1
126
DQ111
160
DQ126
194
DQ141
27
DQ11
61
DQ26
95
BA2
127
DQ76
161
DQ91
195
DQ106
28
DQ47
62
DQ62
96
BA3
128
DQ112
162
DQ127
196
DQ142
29
DQ12
63
DQ27
97
BA4
129
DQ77
163
DQ92
197
DQ107
30
DQ48
64
DQ63
98
BA5
130
DQ113
164
DQ128
198
DQ143
31
DQ13
65
Vss
99
Vss
131
DQ78
165
DQ93
199
Vss
32
DQ49
66
Vss
100
Vss
132
DQ114
166
DQ129
200
Vss
33
Vss
67
DQ28
133
DQ79
167
Vss
34
Vss
68
DQ64
134
DQ115
168
Vss
200PIN DIMM TOP VIEW
URL:www.hbe.co.kr
REV.1.0.(August.2002)
-2-
HANBit Electronics Co.,Ltd.
HANBit
HMD4M144D9WG
FUNCTIONAL BLOCK DIAGRAM
/CAS2
/RAS
/CAS
/RAS
/OE
W
/CAS
/RAS
/OE
W
/CAS
/RAS
/OE
W
/CAS
/RAS
/OE
W
/CAS1
DQ0-15
A0-A11
DQ0-DQ15
U2
DQ16-32
A0-A11
DQ16-DQ31
U10
DQ32-47
A0-A11
DQ32-DQ47
U9
DQ48-63
A0-A11
DQ48-DQ63
U3
/CAS1
/CAS2
/RAS
/OE
U1
DQ63-79
W
/CAS
/RAS
/OE W
/CAS
/RAS
/OE W
/CAS
/RAS
/OE W
/CAS
/RAS
/OE W
DQ64-DQ79
A0-A11
U4
DQ80-95
A0-A11
DQ80-DQ95
U5
DQ96-111
A0-A11
DQ96-DQ111
U7
DQ112-127
A0-A11
DQ112-DQ127
U6
DQ128-143
A0-A11
DQ128-DQ143
/WE
A0-A11
Vcc
Vss
URL:www.hbe.co.kr
REV.1.0.(August.2002)
-3-
0.1uF or 4.7uF Capacitor
for each DRAM
HANBit Electronics Co.,Ltd.
HANBit
HMD4M144D9WG
A
/RAS
/CAS1
/CAS2
/WE
/BA
/BRAS
/BCAS1
/BCAS2
/BWE
74FCT162244
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
RATING
VIN ,OUT
-1V to 7.0V
Voltage on Vcc Supply Relative to Vss
Vcc
-1V to 7.0V
Power Dissipation
PD
9W
TSTG
-55oC to 150oC
Voltage on Any Pin Relative to Vss
Storage Temperature
Short Circuit Output Current
IOS
50mA
w Permanent device damage may occur if " Absolute Maximum Ratings" are exceeded. Functional operation should be
restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
RECOMMENDED DC OPERATING CONDITIONS
( Voltage reference to VSS, TA=0 to 70 o C )
PARAMETER
SYMBOL
MIN
TYP.
MAX
UNIT
Supply Voltage
Vcc
4.5
5.0
5.5
V
Ground
Vss
0
0
0
V
Input High Voltage
VIH
2.4
-
Vcc+1
V
Input Low Voltage
VIL
-1.0
-
0.8
V
DC AND OPERATING CHARACTERISTICS
SYMBOL
SPEED
MIN
MAX
UNITS
ICC1
-5
-
396
mA
-6
-
366
mA
ICC2
Don't care
-
12
mA
ICC3
-5
-
396
mA
-6
-
366
mA
-5
-
396
mA
-6
-
366
mA
ICC5
Don't care
-
6
mA
ICC6
-5
-
990
mA
-6
-
900
mA
ICC4
URL:www.hbe.co.kr
REV.1.0.(August.2002)
-4-
HANBit Electronics Co.,Ltd.
HANBit
HMD4M144D9WG
Il(L)
-60
40
µA
IO(L)
-5
5
µA
VOH
2.4
-
V
VOL
-
0.4
V
ICC1 : Operating Current * (/RAS , /CAS , Address cycling @t RC=min.)
ICC2 : Standby Current (/RAS=/CAS=VIH )
ICC3 : /RAS Only Refresh Current * ( /CAS=V IH, /RAS, Address cycling @tRC=min )
ICC4 : Fast Page Mode Current * (/RAS=VIL, /CAS, Address cycling @tPC=min )
ICC5 : Standby Current (/RAS=/CAS=Vcc-0.2V )
ICC6 : /CAS-Before-/RAS Refresh Current * (/RAS and /CAS cycling @t RC=min )
IIL : Input Leakage Current (Any input 0V ≤ VIN ≤ 6.5V, all other pins not under test = 0V)
IOL : Output Leakage Current (Data out is disabled, 0V ≤ VOUT ≤ 5.5V
VOH : Output High Voltage Level (IOH= -5mA )
VOL : Output Low Voltage Level (IOL = 4.2mA )
* NOTE: ICC1, ICC3, ICC4 and ICC6 are dependent on output loading and cycle rates. Specified values are obtained with the
output open. ICC is specified as an average current. In ICC1 and ICC3, address cad be changed maximum once
while /RAS=VIL. In ICC4, address can be changed maximum once within one page mode cycle.
CAPACITANCE
o
( TA=25 C, Vcc = 5V, f = 1Mz )
DESCRIPTION
SYMBOL
MIN
MAX
UNITS
Input Capacitance (A0-A11)
CIN1
-
65
pF
Input Capacitance (/WE)
C IN2
-
80
pF
Input Capacitance (/RAS0)
CIN3
-
50
pF
Input Capacitance (/CAS1-/CAS2)
CIN4
-
40
pF
Input/Output Capacitance (DQ0-31)
CDQ1
-
20
pF
AC CHARACTERISTICS
o
( 0 C ≤ TA ≤ 70oC , Vcc = 5V±10%, See notes 1,2.)
-5
STANDARD OPERATION
-6
SYMBOL
UNIT
MIN
MAX
MAX
Random read or write cycle time
tRC
Access time from /RAS
tRAC
50
60
ns
Access time from /CAS
tCAC
15
20
ns
Access time from column address
tAA
30
35
ns
/CAS to output in Low-Z
tCLZ
0
Output buffer turn-off delay
tOFF
0
15
0
20
ns
Transition time (rise and fall)
tT
3
50
3
50
ns
URL:www.hbe.co.kr
REV.1.0.(August.2002)
-5-
110
MIN
130
ns
0
ns
HANBit Electronics Co.,Ltd.
HANBit
HMD4M144D9WG
/RAS precharge time
tRP
40
/RAS pulse width
tRAS
60
/RAS hold time
tRSH
15
20
ns
/CAS hold time
tCSH
60
70
ns
/CAS pulse width
tCAS
15
10K
20
10K
ns
/RAS to /CAS delay time
tRCD
20
45
20
50
ns
/RAS to column address delay time
tRAD
15
30
15
35
ns
/CAS to /RAS precharge time
tCRP
5
5
ns
Row address set-up time
tASR
0
0
ns
Row address hold time
tRAH
10
10
ns
Column address set-up time
tASC
0
0
ns
Column address hold time
tCAH
15
15
ns
Column address hold referenced to /RAS
tAR
50
55
ns
Column Address to /RAS lead time
tRAL
30
35
ns
Read command set-up time
tRCS
0
0
ns
Read command hold referenced to /CAS
tRCH
0
0
ns
Read command hold referenced to /RAS
tRRH
0
0
ns
Write command hold time
tWCH
15
15
ns
Write command hold referenced to /RAS
tWCR
50
55
ns
Write command pulse width
tWP
15
15
ns
Write command to /RAS lead time
tRWL
15
20
ns
Write command to /CAS lead time
tCWL
15
20
ns
Data-in set-up time
tDS
0
0
ns
Data-in hold time
tDH
15
15
ns
Data-in hold referenced to /RAS
tDHR
50
55
ns
Refresh period
tREF
Write command set-up time
tWCS
0
0
ns
/CAS setup time (C-B-R refresh)
tCSR
10
10
ns
URL:www.hbe.co.kr
REV.1.0.(August.2002)
-6-
50
10K
70
16
ns
10K
16
ns
ns
HANBit Electronics Co.,Ltd.
HANBit
HMD4M144D9WG
/CAS hold time (C-B-R refresh)
tCHR
15
15
ns
/RAS precharge to /CAS hold time
tRPC
5
5
ns
Access time from /CAS precharge
tCPA
Fast page mode cycle time
tPC
40
45
ns
/CAS precharge time (Fast page)
tCP
10
10
ns
/RAS pulse width (Fast page )
tRASP
60
/W to /RAS precharge time (C-B-R refresh)
tWRP
10
10
ns
/W to /RAS hold time (C-B-R refresh)
tWRH
10
10
ns
/CAS precharge(C-B-R counter test)
tCPT
20
30
ns
35
100K
40
70
100K
ns
ns
NOTES
1.An initial pause of 200µs is required after power-up followed by any 8 /RAS-only or /CAS-before-/RAS refresh cycles
before proper device operation is achieved.
2.VIH (min) and VIL (max) are reference levels for measuring timing of input signals. Transition times are measured between
VIH(min) and VIL(max) and are assumed to be 5ns for all inputs.
3.Measured with a load equivalent to 2TTL loads and 100pF
4.Operation within the tRCD(max) limit insures that tRAC(max) can be met. tRCD(max) is specified as a reference point only. If tRCD
is greater than the specified tRCD(max) limit, then access time is controlled exclusively by t CAC.
5.Assumes that tRCD ≥ tRCD(max)
6. tAR, tWCR, tDHR are referenced to tRAD(max)
7.This parameter defines the time at which the output achieves the open circuit condition and is not referenced to V OH
or VOL.
8. tWCS, tRWD, tCWD anf tAWD are non restrictive operating parameter.
They are included in the data sheet as electrical characteristic only. If t WCS ≥ tWCS(min) the cycle is an early write
cycle and the data out pin will remain high impedance for the duration of the cycle.
9. Either tRCH or tRRH must be satisfied for a read cycle.
10. These parameters are referenced to the CAS leading edge in early write cycles and to the W leading edge in readwrite cycles.
11. Operation within the tRAD(max) limit insures that tRAC(max) can be met. tRAD(max) is specified as a reference
point only. If tRAD is greater than the specified tRAD(max) limit. then access time is controlled by tAA.
URL:www.hbe.co.kr
REV.1.0.(August.2002)
-7-
HANBit Electronics Co.,Ltd.
HANBit
HMD4M144D9WG
PACKAGING INFORMATION
143.60 mm
136.70 mm
R1.57 mm
3.45 mm
R3.18±051
10.25 mm
18.52mm
6.45 mm
R1.57±10 mm
6.35 mm
2.05
6.39mm
130.81
7.68mm
MAX
2.54 mm
0.25 mm MAX
MIN
Gold : 1.04±0.10 mm
Solder:0.914±0.10mm
1.27
1.29±0.08 mm
ORDERING INFORMATION
Part Number
Density
Org.
Package
HMD4M144D9WG-5
64MByte
x 144
200 Pin-DMM
HMD4M144D9WG-6
64MByte
x 144
200 Pin-DIMM
URL:www.hbe.co.kr
REV.1.0.(August.2002)
-8-
Component
Vcc
MODE
SPEED
9EA
5V
ECC
50ns
9EA
5V
ECC
60ns
Number
HANBit Electronics Co.,Ltd.