KB HE83003

King Billion Electronics Co., Ltd
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有 限
公
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HE83003
HE80000 SERIES
- Table of Contents 1.
General Description ___________________________________________________________________2
2.
Features _____________________________________________________________________________2
3.
Internal Block ________________________________________________________________________3
4.
Pin Description _______________________________________________________________________3
5.
Oscillators ___________________________________________________________________________4
6.
General Purpose I/O___________________________________________________________________5
7.
Timer1 ______________________________________________________________________________6
8.
Timer2 ______________________________________________________________________________7
9.
Watch Dog Timer _____________________________________________________________________8
10.
PWM & DAC ______________________________________________________________________8
11.
Pad Diagram & Location____________________________________________________________12
12.
Absolute Maximum Rating __________________________________________________________20
13.
Recommended Operating Conditions _________________________________________________20
14.
AC/DC Characteristics _____________________________________________________________20
15.
Application Circuit_________________________________________________________________22
16.
Important Note ____________________________________________________________________23
17.
Updated History ___________________________________________________________________23
September 8, 2004
1
V1.1
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HE83003
HE80000 SERIES
1. General Description
HE83003 is a member of 8-bit micro-controller series developed by King Billion. It’s a power speech
controller. The built-in OP comparator can be used with (light, voice, temperature, humility) sensor and
used as battery low detection. And the 7-bit current-type D/A converter and PWM device provide the
complete speech output mechanism. The 36K ROM size can be used in the storage of speech (20 seconds
at 3Kbytes per second)
The instruction set of HE83003 are quite easy to learn and simple to use. Only about thirty instructions
with four-type addressing mode are provided. Most of instructions take only 3 oscillator clocks (machine
cycles). The processing power is enough to most of battery operation system.
2. Features
z Operation Voltage:
z System Clock:
z
z
z
z
z
z
z
z
z
z
z
z
2.4V – 5.5V
DC ~ 8MHz @ 5.0V
DC ~ 4MHz @ 2.4V
Internal ROM:
36K Bytes (36K Program ROM)
Internal RAM:
128 Bytes.
Dual Clock System:
Normal (Fast) clock:
32.768 KHz ~ 8MHz
Slow clock:
32.768 KHz
Operation modes:
Dual, Fast, Slow, Idle, Sleep modes.
With WDT (Watch Dog Timer) to prevent deadlock condition.
16 bit Bi-directional I/O port. Mask Option can select Push-Pull or Open Drain output mode for
each I/O pin.
One built-in OP comparator.
One 7-bit current-type DAC output (VO).
PWM device.
Two external interrupts and two internal timer interrupts.
Two 16-bit timers. (Clock Source reference by Fast Clock)
Instruction set: 32 instructions, 4 addressing modes.
September 8, 2004
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3. Internal Block
Please always take in mind that ICE is different from IC. ICE is the whole set of HE80000 series IC, but
each IC is a subset of ICE. Never use any hardware resources that real IC don’t have, especially RAM
and register. KBIDS and compiler cannot prevent user to use some hardware resources that don’t exist.
Please check the following table and refer the abbreviation in HE80000 user's manual.
8 Bit CPU
36 KB ROM
Fast Clock
OSC.
FXI, FXO
Slow Clock
OSC
SXI, SXO
128B RAM
TC1
TC2
PWM/PWMN
PWM
VO
DAC
WDT
OP Amp
I/O Port
OPO, OPIN, OPIP
PRTC[7:0], PRTD[7:0]
4. Pin Description
Pin Name I/O
FXI,
FXO
B,
O
SXI,
SXO
I,
O
RSTP_N
I
TSTP_P
I
PRTC[7:0]
B
PRTD[7:0]
B
September 8, 2004
Description
External fast clock pin. Two types of oscillator can be selected by MO_FXTAL (‘0’ for RC type and
‘1’ for crystal type). For RC type oscillator, one resistor needs to be connected between FXI and GND.
For crystal oscillator, one crystal needs to be placed between FXI and FXO. Please refer to
application circuit for details.
External slow clock pins. Slow clock is clock source for LCD display, TIMER1, Time-Base and other
internal blocks. Both crystal and RC oscillator are provided. The slow clock type can be selected by
mask option MO_SXTAL. Choose ‘0’ for RC type and ‘1’ for crystal oscillator.
System reset input pin. Level trigger, active low on this pin will put the chip in reset state.
Test input pin. Please bond this pad and reserve a test point on PCB for debugging. But for improving
ESD, please connect this point with zero Ohm resistor to GND.
8-bit bi-directional I/O port C. The output type of I/O pad can also be selected by mask option
MO_CPP[7: 0] (‘1’ for push-pull and ‘0’ for open-drain). As the output structure of I/O pad does not
contain tri-state buffer. When using the I/O as input, ‘1’ must be outputted before reading the pin.
8-bit bi-directional I/O port D. The output type of I/O pad can also be selected by mask option
MO_DPP[7: 0] (‘1’ for push-pull and ‘0’ for open-drain).
As the output structure of I/O pad does not contain tri-state buffer. When using the I/O as input, ‘1’
must be outputted before reading the pin.
PRTD[7..2] can be used as wake-up pins.
PRTD[7..6] can be as external interrupt sources.
3
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Pin Name I/O
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HE83003
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HE80000 SERIES
Description
PRTD[1..0] general I/O bi-direction pins.
The PWM output can drive speaker or buzzer directly. Using PWMP & PWMN to drive output
PWMP/PWMN O device.
VO
OPIN
OPIP
OPO
VDD
GND
O
I
I
O
Current DAC Output.
Inverting input of OP Amp.
Non-inverting input of OP Amp.
Output of OP Amp.
Positive power Input. A 0.1 µF decoupling capacitors should be placed as close to IC VDD
P
and GND pads as possible for best decoupling effect.
P Power ground Input.
I: Input, O: Output, B: Bidirectional, P: Power.
5. Oscillators
The MCU is equipped with two clock sources with a variety of selections on the types of oscillators to
choose from. System designer can select oscillator types based on the cost target, timing accuracy
requirements etc. Crystal, Resonator or the RC oscillator can be used as fast clock source, components
should be placed as close to the pins as possible. The type of oscillator used is selected by mask option
MO_FXTAL.
FXI (Bi-direction), FXO (Output)
VDD
FXI
10P
R
X'tal
FXI
FXO
C
10P
Mask Option
MO_FXTAL
MO_FCK
Description
0: RC Oscillator.
1: Crystal Oscillator.
0: Fast clock disable
1: Fast clock enable
SXI (Bi-direction), SXO (Output)
Two types of oscillator, crystal and RC, can be used as slow clock selectable by mask option
MO_SXTAL. If used time keeping function or other applications that required the accurate timing, crystal
oscillator is recommended. If the timing accuracy is not important, then RC type oscillator can be used to
save cost.
September 8, 2004
4
V1.1
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SXI
SXI
SXO
SXO
Crystal Osc.
Mask Option
MO_SXTAL
MO_SCKN
RC Osc.
Description
0: RC Oscillator.
1: Crystal Oscillator.
0: Slow clock enable
1: Slow clock disable
With two clock sources available, the system can switch among operation modes of Normal, Slow, Idle,
and Sleep modes by the setting of OP1 and OP2 registers as shown in tables below to suit the needs of
application such as power saving, etc.
OP1
Field
Mode
Reset
Bit 7
DRDY
R/W
1
Bit 6
STOP
R/W
0
Bit 5
SLOW
R/W
0
Bit 4
INTE
R/W
0
Bit 3
T2E
R/W
0
Bit 2
T1E
R/W
0
Bit 1
Z
R/W
-
Bit 0
C
R/W
-
OP2
Field
Mode
Reset
Bit 7
IDLE
R/W
0
Bit 6
PNWK
R
-
Bit 5
TCWK
R
-
Bit 4
-
Bit 3
Bit 2
Bit 1
Bit 0
-
-
-
-
6. General Purpose I/O
The PRTC[7..0] and PRTD[7..0] are dedicated general purpose I/O port. All the I/O ports are
bi-directional and non-tristate output structure. The output has weak sourcing (50µA) and stronger
sinking (1mA) capability and each can be configured as push-pull or open-drain output structure
individually by mask option.
When the I/O port is used as input, the weakly high sourcing can be used as weakly pull-up. Open drain
can be used if the pull-up is not required and let the external driver to drive the pin. Please note that a
floating pad could cause more power consumption since the noise could interfere with the circuit and
cause the input to toggle. A ‘1’ needs to be written to port first before reading the input data from the I/O
pin. If the PMOS is used as pull-up, care should be taken to avoid the constant power drain by DC path
between pull-up and external circuit.
The input port has built-in Schmidt trigger to prevent it from chattering. The hysteresis level of Schmidt
trigger is 1/3*VDD.
September 8, 2004
5
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VDD
DOUT
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HE83003
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HE80000 SERIES
VDD
Q
LATCH
Q'
MO_?PP
PAD
DIN
SCHMIDT Trigger input
7. Timer1
The Timer1 consists of two 8-bit write-only preload registers T1H and T1L and 16-bit down counter. If
Timer1 is enabled, the counter will decrement by one with each incoming clock pulse. Timer1 interrupt
will be generated when the counter underflows - counts down to FFFFH.
And the counter will be
automatically reloaded with the value of T1H and T1L.
The clock source of Timer1 is derived from slow clock “SCK” at dual clock or slow clock only mode.
And it comes from the fast clock “FCK” at fast clock only mode.
Please note that the interrupt is generated when counter counts from 0000H to FFFFH. If the value of
T1H and T1L is N, and count down to FFFFH, the total count is N+1. The content of counter is zero
when system resets. Once it is enabled to count at this moment, interrupt will be generated immediately
and value of T1H and T1L will be loaded since it counts to FFFFH. So the T1H and T1L value should be
set before enabling Timer1.
The Timer1 related control registers are list as below:
Register
IER
Address
0x02
Field
TC1_IER
Bit position
2
Mode
R/W
T1L
T1H
OP1
0x03
0x04
0x09
T1L[7:0]
T1H[7:0]
TC1E
7~0
7~0
2
W
W
R/W
September 8, 2004
6
Description
0: TC1 interrupt is disabled. (default)
1: TC1 interrupt is enabled.
Low byte of TC1 pre-load value
High byte of TC1 pre-load value
0: TC1 is disabled. (default)
1: TC1 is enabled.
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T1H
The contents of
T1H and T1L are
almost loaded into
Timer1 immediately
when Timer1 is
enabled after reset.
有
T1L
限
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HE83003
HE80000 SERIES
Auto reload
when Timer1
is underflow
< Timer1 Counter >
Decreases 1
Count To
0xFFFFh
No
Yes
Timer1
Interrupt
Request
T1_INT
8. Timer2
Timer2 is similar in structure to Timer1 except that clock source of Timer2 comes from the system clock
“Fsys”/1.5. The system clock “Fsys” varies depending on the operation modes of the MCU.
The Timer2 consists of two 8-bit write-only preload registers T2H and T2L and 16-bit down counter. If
Timer2 is enabled, counter will decrement by one with each incoming clock pulse. Timer2 interrupt will
be generated when the counter underflows - counts down to FFFFH. And it will be automatically
reloaded with the value of T2H and T2L.
Please note that the interrupt signal is generated when counter counts from 0000H to FFFFH. If the value
of counter is N, and count down to FFFFH, the total count is N+1. The content of counter is zero when
system resets. Once it is enabled to count at this time, the interrupt will be generated immediately and
value of T2H and T2L will be loaded since the counter counts to FFFFH. So the T2H and T2L value
should be set before enabling Timer2.
The Timer2 related control registers are list as below:
Register
IER
Address
0x02
Field
TC2_IER
Bit Position
1
Mode
R/W
T2L
T2H
OP1
0x05
0x06
0x09
T2L[7:0]
T2H[7:0]
TC2E
7~0
7~0
3
W
W
R/W
September 8, 2004
7
Description
0: TC2 interrupt is disabled. (default)
1: TC2 interrupt is enabled.
Low byte of TC2 pre-load value
High byte of TC2 pre-load value
0: TC2 is disabled. (default)
1: TC2 is enabled.
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T2H
The contents of
T2H and T2L are
almost loaded into
Timer2 immediately
when Timer2 is
enabled after reset.
有
限
T2L
公
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HE83003
HE80000 SERIES
Auto reload
when Timer2
is underflow
< Timer2 Counter >
Decreases 1
No
Count To
0xFFFFh
Yes
Timer2
Interrupt
Request
T2_INT
9. Watch Dog Timer
Watch Dog Timer (WDT) is designed to reset system automatically prevent system dead lock caused by
abnormal hardware activities or program execution. WDT needs to be enabled in Mask Option.
MO_WDTE
0
1
Function
WDT disable
WDT enable
To use WDT function, “CLRWDT” instruction needs to be executed in every possible program path
when the program runs normally in order to clears the WDT counter before it overflows, so that the
program can operate normally. When abnormal conditions happen to cause the MCU to divert from
normal path, the WDT counter will not be cleared and reset signal will be generated.
WDT is the enabling signal generated by calculating 32768-clock overflow. Reset Register content is
same as TC1 (Timer1 clock), which uses the same clock count source. WDT function can be generated
in Normal, Slow and Idle Mode. However, WDT will not function during Sleep Mode (as the TC1
clock has stopped.)
10. PWM & DAC
The current DAC output pin is VO and its primary function is intended for speech generation, but the
DAC output path can be used in conjunction with built-in OP comparator to function as an
Analog-to-Digital Converter for applications such as speech recording, speech recognition or sensor
interfaces.
September 8, 2004
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7-bit Voice Output Architecture
VOC[2]
#reset
PWMC[6..0]
PWM
Command
Register
PWMC_REG[6..4]
PWMC[7]
Write_Strobe
PWMP
PWM
Driver
PWMN
#reset
clk
PWMC_
REG[0]
clk
Fast_clock
VOC[2]
7-bit
PWM Data
Register
PWMO_REG[6..0]
DAC
VO
clk
VOC[1]
The 7-bit voice output is controlled by PWMC and VOC register, and the PWMC is a command/data
register which is determined by PWMC[7] bit. The voice output control (VOC) register is used to control
the PWM and DAC enable/disable. These two functions can be enabled simultaneously.
VOC
Field
Reset
address
0x13
September 8, 2004
Bit 7
-
Bit 6
-
Bit
Name
VOC[2]
PWM
VOC[1]
DAC
Bit 5
Value
1
0
1
0
Bit 4
-
Bit 3
-
Bit 2
PWM
0
Bit 1
DAC
0
Bit 0
Reserved
0
Function description
PWM Module Enable
PWM Module Disable
Digital-to-Analog Converter Enable
Digital-to-Analog Converter Disable
9
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VOC
VOC[2]
0
0
1
1
PWMC register
DAC & PWM Data
Control
Bit 7
0
1
Bit 6
VOC[1]
0
1
0
1
Output Function
All Disabled
VO
PWM
PWM+VO
Bit 5
Bit 4
Bit 3
Bit 2
DAC and PWM output value
PWM O/P driver
Reserved
Bit 1
Bit 0
PWME
In the PWMC register, the PWMC[7] bit determines the written PWMC[6..0] value is PWM/DAC data or
commands. If the PWMC[1] is ‘0’, the PWMC[6..0] is stored into the data register, otherwise
PWMC[6..0] is stored into command register shown on the above diagram. The command register
controls the PWM output driver current and its enable/disable. If user want to enable the PWM function,
both VOC[2] and PWME bits shall be set to ‘1’.
The fast clock is used to provide as PWM driver time base, and user shall set the PWMC[7]=’1’ and
VOC[2]=’1’ to enable the PWM output. When the system enters into sleep or idle mode, it will
automatically turn off the voice device by clearing VOC[2:0] to ”000”. In order to activate voice output
again when the system returns and enters into normal mode, the related bits of VOC register need to be
set again.
PWM
Data=0x40h
Data=0x10h
Data=0x70h
subframe
When the DAC is used as sound generator, the bias & filter circuit is used for bias voltage setting and
waveform filter regulation and the DAC is output to the VO (Voice Output) pin and please see
application notes for detailed calculation example and application. The driving capability of DAC is
shown below.
VO/DAO
September 8, 2004
Condition
VDD=3V;VO=0~2V;Data=7Fh
10
Min.
2.5
Typ.
3
Max.
Unit
mA
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VDD
CPU
VO(DAO)
bias &
filter
circuit
SPEAKER
The PWM output volume can be adjusted by command register PWMC[6..4]. The PWMC[6] and
PWMC[5] control 2 time driver, while PWMC [4] controls 1 time driver, thus it has maximum 5 levels of
driver output. The sound volume of PWM output can be controlled by these PWMC[6..4] bits. Please
note that this adjustment only apply to PWM. When the system enters into sleep mode or idle mode, it
will automatically disable all voice outputs by clearing VOC[6..0] to ”0000000”. To activate voice
output again when returning to normal mode, the VOC register needs to be set again.
PWMC[6..4] Number of PWM Output Driver
000
off
001
1
010
2
011
3
100
2
101
3
110
4
111
5
September 8, 2004
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11. Pad Diagram & Location
Which version of HE83003 delivered to customer is decided by KingBillion, user shall make sure the
delivered version before PCB is manufactured. The locations of chips logo are different from each
other.
A1 Version:Die Size= 2050 µm * 2180 µm
September 8, 2004
12
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PIN Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
September 8, 2004
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A1 Version HE83003
PIN Name
X Coordinate
PRTD[3]
X= -923.95
PRTD[2]
X= -923.95
PRTD[1]
X= -923.95
PRTD[0]
X= -923.95
PRTC[7]
X= -923.95
PRTC[6]
X= -923.95
PRTC[5]
X= -923.95
PRTC[4]
X= -923.95
PRTC[3]
X= -895.15
PRTC[2]
X= -682.35
PRTC[1]
X= -499.15
PRTC[0]
X= -286.35
PWMP
X=
-89.35
PWMN
X=
122.25
GND
X= 319.05
VO
X= 934.70
OPIN
X=
934.70
OPIP
X= 934.70
OPO
X= 934.70
RSTP_N
X= 934.70
FXO
X=
934.70
FXI
X= 934.70
TSTP_P
X= 934.70
SXO
X=
391.15
SXI
X= 206.35
VDD
X=
22.85
PRTD[7]
X= -160.15
PRTD[6]
X= -373.00
PRTD[5]
X= -556.20
PRTD[4]
X= -769.00
13
限
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HE83003
HE80000 SERIES
Y Coordinate
Y= 646.60
Y= 433.80
Y= 250.60
Y=
37.80
Y= -145.40
Y= -331.80
Y= -515.00
Y= -701.40
Y= -992.85
Y= -992.85
Y= -992.85
Y= -992.85
Y= -992.85
Y= -992.85
Y= -992.85
Y= -890.70
Y= -707.90
Y= -524.40
Y= -341.60
Y= -158.10
Y=
24.70
Y= 208.85
Y= 392.65
Y= 990.00
Y= 990.00
Y= 990.00
Y= 990.00
Y= 990.00
Y= 990.00
Y= 990.00
V1.1
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HE80000 SERIES
A2 Version:Die Size= 1980 µm * 2210 µm
September 8, 2004
14
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PIN Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
September 8, 2004
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限
A2 Version HE83003
PIN Name
X Coordinate
PRTD[3]
X= -885.80
PRTD[2]
X= -885.80
PRTD[1]
X= -885.80
PRTD[0]
X= -885.80
PRTC[7]
X= -885.80
PRTC[6]
X= -885.80
PRTC[5]
X= -885.80
PRTC[4]
X= -885.80
PRTC[3]
X= -855.75
PRTC[2]
X= -642.95
PRTC[1]
X= -459.75
PRTC[0]
X= -246.95
PWMP
X=
-48.75
PWMN
X=
162.85
GND
X= 361.45
VO
X= 884.20
OPIN
X=
884.20
OPIP
X= 884.20
OPO
X= 884.20
RSTP_N
X= 884.20
FXO
X=
884.20
FXI
X= 884.20
TSTP_P
X= 884.20
SXO
X=
329.75
SXI
X= 147.50
VDD
X= -36.60
PRTD[7]
X= -220.20
PRTD[6]
X= -433.00
PRTD[5]
X= -616.20
PRTD[4]
X= -829.00
15
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HE83003
HE80000 SERIES
Y Coordinate
Y= 543.30
Y= 330.50
Y= 147.30
Y= -65.50
Y= -248.70
Y= -435.10
Y= -618.30
Y= -804.70
Y= -1002.00
Y= -1002.00
Y= -1002.00
Y= -1002.00
Y= -1002.00
Y= -1002.00
Y= -1002.00
Y= -826.30
Y= -632.30
Y= -448.20
Y= -264.20
Y= -80.40
Y= 103.00
Y= 287.45
Y= 471.25
Y= 1002.00
Y= 1002.00
Y= 1002.00
Y= 1002.00
Y= 1002.00
Y= 1002.00
Y= 1002.00
V1.1
This specification is subject to change without notice. Please contact sales person for the latest version before use.
King Billion Electronics Co., Ltd
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億
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股
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限
公
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HE83003
HE80000 SERIES
C Version:Die Size= 1970 µm * 2170 µm
September 8, 2004
16
V1.1
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King Billion Electronics Co., Ltd
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億
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限
C Version HE83003
PIN Number
PIN Name
X Coordinate
1
PRTD[3]
X= -1057.45
2
PRTD[2]
X= -1057.45
3
PRTD[1]
X= -1057.45
4
PRTD[0]
X= -1057.45
5
PRTC[7]
X= -1057.45
6
PRTC[6]
X= -1057.45
7
PRTC[5]
X= -1057.45
8
PRTC[4]
X= -1057.45
9
PRTC[3]
X= -1052.90
10
PRTC[2]
X= -874.30
11
PRTC[1]
X= -696.50
12
PRTC[0]
X= -517.90
13
PWMP
X= -332.30
14
PWMN
X= -126.40
15
GND
X=
59.20
16
VO
X= 709.15
17
OPIN
X=
709.15
18
OPIP
X= 709.15
19
OPO
X= 709.15
20
RSTP_N
X= 709.15
21
FXO
X= 709.15
22
FXI
X= 709.15
23
TSTP_P
X= 709.15
24
SXO
X= 240.70
25
SXI
X=
62.90
26
VDD
X= -115.70
27
PRTD[7]
X= -293.50
28
PRTD[6]
X= -472.10
29
PRTD[5]
X= -649.90
30
PRTD[4]
X= -828.50
September 8, 2004
17
公
司
HE83003
HE80000 SERIES
Y Coordinate
Y= 742.30
Y= 564.50
Y= 385.90
Y= 208.10
Y=
29.50
Y= -148.30
Y= -326.90
Y= -504.70
Y= -1058.50
Y= -1058.50
Y= -1058.50
Y= -1058.50
Y= -1058.50
Y= -1058.50
Y= -1058.50
Y= -803.20
Y= -625.40
Y= -446.80
Y= -269.00
Y= -90.40
Y=
87.40
Y= 266.00
Y= 443.80
Y=
909.10
Y= 909.10
Y= 909.10
Y= 909.10
Y= 909.10
Y= 909.10
Y= 909.10
V1.1
This specification is subject to change without notice. Please contact sales person for the latest version before use.
King Billion Electronics Co., Ltd
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億
電
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股
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限
公
司
HE83003
HE80000 SERIES
D1 Version: Die Size= 1970 µm * 2280 µm
Logo location
September 8, 2004
18
V1.1
This specification is subject to change without notice. Please contact sales person for the latest version before use.
King Billion Electronics Co., Ltd
駿
PIN Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
September 8, 2004
億
電
子
股
份
有
限
D1 Version HE83003
PIN Name
X Coordinate
PRTD[3]
X= -921.50
PRTD[2]
X= -921.50
PRTD[1]
X= -921.50
PRTD[0]
X= -921.50
PRTC[7]
X= -921.50
PRTC[6]
X= -921.50
PRTC[5]
X= -921.50
PRTC[4]
X= -921.50
PRTC[3]
X= -804.25
PRTC[2]
X= -649.25
PRTC[1]
X= -494.25
PRTC[0]
X= -339.25
PWMP
X= -130.20
PWMN
X=
31.20
GND
X= 164.20
VO
X= 905.40
OPIN
X=
905.40
OPIP
X= 905.40
OPO
X= 905.40
RSTP_N
X= 905.40
FXO
X= 905.40
FXI
X= 905.40
TSTP_P
X= 905.40
SXO
X=
217.25
SXI
X=
64.15
VDD
X= -82.95
PRTD[7]
X= -233.45
PRTD[6]
X= -383.45
PRTD[5]
X= -533.45
PRTD[4]
X= -683.45
19
公
司
HE83003
HE80000 SERIES
Y Coordinate
Y= 318.40
Y= 193.40
Y=
68.40
Y= -57.10
Y= -175.10
Y= -293.15
Y= -418.15
Y= -556.05
Y= -1070.65
Y= -1070.65
Y= -1070.65
Y= -1070.65
Y= -1070.65
Y= -1070.65
Y= -1070.65
Y= -807.85
Y= -677.85
Y= -547.85
Y= -314.60
Y= -184.60
Y= -55.10
Y= 170.70
Y= 305.70
Y= 1064.65
Y= 1069.45
Y= 1069.35
Y= 1069.35
Y= 1069.35
Y= 1069.30
Y= 1069.35
V1.1
This specification is subject to change without notice. Please contact sales person for the latest version before use.
King Billion Electronics Co., Ltd
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億
電
子
股
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限
公
司
HE83003
HE80000 SERIES
12. Absolute Maximum Rating
Item
Symbol
Rating
Condition
Supply Voltage
VDD
-0.5V ~ 7.0V
Input Voltage
VIN
-0.5V ~ VDD +0.5V
Output Voltage
Vo
-0.5V ~ VDD +0.5V
Operating Temperature
Top
0℃ ~ 70℃
Storage Temperature
Tst
-50℃ ~ 100℃
13. Recommended Operating Conditions
Item
Supply Voltage
Input Voltage
Operating Frequency
Operating Temperature
Storage Temperature
Symbol
Rating
Condition
VDD
2.4V ~ 5.56V
VIH
0.9 VDD ~ VDD
VIL
0.0V ~ 0.1 VDD
8M Hz
VDD =5.0V
Fmax.
4M Hz
VDD =2.4V
0
0
Top
0 C ~ 70 C
Tst
-500C ~ 1000C
14. AC/DC Characteristics
Testing Condition: TEMP=25℃, VDD=3V±10%
PARAMETER
CONDITION
MIN TYP MAX UNIT
NORMAL Mode Current System
2M ext. R/C
0.75 1
mA
IFast
System
32.768K X’tal
6
9
µA
ISlow SLOW Mode Current
IDLE Mode Current
System
32.769K X’tal
4
7
µA
IIdle
System
1
µA
ISleep Sleep Mode Current
*2
12 15
mA
IoHPWM PWM Output Drive Current PWMP, PWMN VDD=3V; VOH=2V
33 40
mA
IoLPWM PWM Output Sink Current PWMP, PWMN*2 VDD=3V; VOL=1V
VO
VDD=3V;VO=0~2V,Data=7F 2.5 3
mA
IoVO DAC Output Current
0.8
Input High Voltage
I/O pins
V
ViH
VDD
0.2
Input Low Voltage
I/O pins
V
ViL
VDD
Threshold=2/3VDD(input
from low to high)
1/3
Vhys Input Hysteresis Width I/O, RSTP_N
V
Threshold=1/3VDD(input
VDD
from high to low)
Output Drive Current
I/O pull-high*1 VOL=2.0V
50
µA
IOH
*1
I/O pull-low
VOL=0.4V
1.0
mA
IOL_1 Output Sink Current
V
=GND,
pull
high
IL
RSTP_N
20
µA
IIL_1 Input Low Current
Internally
September 8, 2004
20
V1.1
This specification is subject to change without notice. Please contact sales person for the latest version before use.
King Billion Electronics Co., Ltd
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IIL_2
Input Low Current
億
I/O
電
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限
公
司
VIL=GND, if pull high
Internally by user
HE83003
HE80000 SERIES
100
µA
Note:
*1: Drive Current Spec. for Push-Pull I/O port only Sink Current Spec. for both Push-Pull and
Open-Drain I/O port.
*2: This Spec. base on one driver only. There are five build-in drivers, so users just multiply the number
of driver he used to one driver current to get the total amount of current. ( IoHPWM、IoLPWM * N;
N=0,1,2,3,4,5)
September 8, 2004
21
V1.1
This specification is subject to change without notice. Please contact sales person for the latest version before use.
King Billion Electronics Co., Ltd
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億
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公
HE83003
司
HE80000 SERIES
15. Application Circuit
No External Parts is
necessary if user adopt
Internal Fast RC Clock
VDD
VDD
FXI
R1
50K
BATTERY 1
3V
C1
FXO
C2
SXI
RSTP_N
0.1uF 100uF
C3
SW1
0.1uF
RESET
SXO
FXI
External Fast Clock:
Crystal osc.
FXO
SXI
FXI
2MHZ
PRTD[7:0]
GND
20P
SXO
20P
FXO
PRTC[7:0]
External Fast Clock:
RC osc.
VDD
R > 8.2 KOhm
FXI
OPIN
OPIP
OPO
PWMP
PWMN
VO
C: Please Ref . AN016
Buzzer
or
Speaker
Circuit
Passive
Bias &
Filter
Circuit
TSTP_P
SXI
VDD
20P
SP1
32.768K
SXO
Q1
NPN
Please Refer
AN022 for Speech
Output Circuit
20P
SPEAKER
External Slow Clock:
RC osc.
SXI
R: Please ref . AN016
HE83005
September 8, 2004
External Slow Clock:
Crystal osc.
SXO
22
V1.1
This specification is subject to change without notice. Please contact sales person for the latest version before use.
King Billion Electronics Co., Ltd
駿
億
電
子
股
份
有 限
公
司
HE83003
HE80000 SERIES
16. Important Note
1.
Please note the ICE is a superset of HE80000 series IC. Each member of the family only has parts of
all resources. Do not use any hardware resource that your target chip doesn’t have, for example,
RAM and register. KBIDS and compiler can’t prevent user from using some hardware resources that
don’t exist in your target chip.
2.
Please bond the TSTP_P, RSTP_N and PRTD [7:0] with test points on PCB (can be soldered and
probed) as you can, then some testing can be performed on PCB when it’s necessary. The TSTP_P is
suggested to connect to ground by a 0 ohm resistor.
3.
Users should turn off the PWM and DAC function by firmware before the system enters into the
sleep and idle modes. Otherwise, there are some current leakages in the PWM/DAC circuit, and the
current will be large in the sleep and idle mode.
17. Updated History
Version
V1.0
V1.1
Date
9/30/03 New create
9/30/03 ROM size 32KB -> 36 KB
September 8, 2004
New Content
23
V1.1
This specification is subject to change without notice. Please contact sales person for the latest version before use.