KODENSHI KK74LV241DW

TECHNICAL DATA
KK74LV241
OCTAL BUFFER/LINE DRIVE; 3-STATE
The KK74LV241 is a low-voltage Si-gate CMOS device and is pin and
function compatible with KK74HC/HCT241.
The KK74LV241 is an octal non-inverting buffer/line driver with 3-state
outputs. The 3-state outputs are controlled by the output enable inputs 1OE
and 2OE.
•
•
•
•
•
N SUFFIX
PLASTIC DIP
20
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 1.2 to 3.6 V
Low Input Current: 1.0 µA, 0.1 µА at Т = 25 °С
Output Current: 8 mA at VCC = 3.0 V
High Noise Immunity Characteristic of CMOS Devices
1
DW SUFFIX
SO
20
1
ORDERING INFORMATION
KK74LV241N
Plastic DIP
KK74LV241DW
SOIC
TA = -40° to 125° C for all packages
LOGIC DIAGRAM
1A0
1A1
1A2
1A3
DATA
INPUTS
2A0
18
1Y0
4
16
1Y1
6
14
1Y2
8
12
1Y3
11
9
2Y0
13
7
2Y1
2A0 15
5
2Y0
2A1 17
3
2Y1
2A1
OUTPUT
ENABLES
2
1OE
2OE
PIN ASSIGNMENT
1OE
1
20
VCC
1A0
2
19
2OE
2Y3
3
18
1Y0
1A1
4
17
2A3
2Y2
5
16
1Y1
1A2
6
15
2A2
2Y1
7
14
1Y2
1A3
8
13
2A1
2Y0
9
12
1Y3
10
11
2A0
NONINVERTING
OUTPUTS
GND
1
FUNCTION TABLE
19
Input
PIN 20=VCC
PIN 10 = GND
Output
Input
Output
1OE
1A
n
1Yn
2OE
2A
n
2Yn
L
L
L
H
L
L
L
H
H
H
H
H
H
X
Z
L
X
Z
H= high level
L = low level
X = don’t care
Z = high impedance
1
KK74LV241
MAXIMUM RATINGS*
Symbol
VCC
Parameter
DC supply voltage
Value
Unit
-0.5 to +5.0
V
1
DC Input diode current
±20
mA
2
DC Output diode current
±50
mA
DC Output source or sink current
±35
mA
ICC
DC VCC current
±70
mA
IGND
DC GND current
±70
mA
IIK *
IOK *
IO *
3
PD
Tstg
TL
Power dissipation per package: *
Plastic DIP
SO
4
mW
750
500
Storage Temperature
-65 to +150
°C
260
°C
Lead Temperature, 1.5 mm (Plastic DIP Package), 0.3 mm
(SO Package) from Case for 4 Seconds
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
*1 VI < -0.5 V or VI > VCC + 0.5 V.
*2 VO < -0.5 V or VO > VCC + 0.5 V.
*3 -0.5 V < VO < VCC + 0.5 V.
*4 Derating - Plastic DIP: - 12 mW/°C from 70° to 125°C
SO Package: : - 8 mW/°C from 70° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
VCC
Parameter
DC Supply Voltage
Min
Max
Unit
1.2
3.6
V
VI
Input Voltage
0
VCC
V
VO
Output Voltage
0
VCC
V
TA
Operating Temperature, All Package Types
-40
+125
°C
tr, tf
Input Rise and Fall Time (Figure 1)
0
0
0
0
1000
700
500
400
ns
VCC =1.2 V
VCC =2.0 V
VCC =3.0 V
VCC =3.6 V
This device contains protection circuitry to guard against damage due to high static voltages or electric fields.
However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this
high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND≤(VIN or
VOUT)≤VCC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused
outputs must be left open.
2
KK74LV241
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Symbol
Parameter
Test
VCC
conditions
V
Guaranteed Limit
25°C
-40°C to 85°C
Unit
125°C
min
max
min
max
min
max
VIH
HIGH level input
voltage
1.2
2.0
3.0
3.6
0.9
1.4
2.1
2.5
-
0.9
1.4
2.1
2.5
-
0.9
1.4
2.1
2.5
-
V
VIL
LOW level input
voltage
1.2
2.0
3.0
3.6
-
0.3
0.6
0.9
1.1
-
0.3
0.6
0.9
1.1
-
0.3
0.6
0.9
1.1
V
VOH
HIGH level output
voltage
VI = VIH or VIL
IO = -50 µА
1.2
2.0
3.0
3.6
1.1
1.92
2.92
3.52
-
1.0
1.9
2.9
3.5
-
1.0
1.9
2.9
3.5
-
V
VI = VIH or VIL
IO = -8 mА
3.0
2.48
-
2.34
-
2.20
-
V
VI = VIH or VIL
IO = 50 µА
1.2
2.0
3.0
3.6
-
0.09
0.09
0.09
0.09
-
0.1
0.1
0.1
0.1
-
0.1
0.1
0.1
0.1
V
VI = VIH or VIL
IO = 8 mА
3.0
-
0.33
-
0.4
-
0.5
V
VI = VCC or 0 V
*
-
±0.1
-
±1.0
-
±1.0
µА
1.2
*
-
±0.5
-
±5
-
±10
µА
*
-
8.0
-
80
-
160
µА
VOL
II
LOW level output
voltage
Input current
IOZ
Three state leakage 3-state outputs
current
VI (01,19) = VIH
VO =VCC or 0 V
ICC
Supply current
VI =VCC or 0 V
IO = 0 µА
* VCC = 3.3 ± 0.3 V
3
KK74LV241
AC ELECTRICAL CHARACTERISTICS (CL=50 pF, tr=tf=6.0 ns)
Symbol
Parameter
Test
VCC
conditions
V
Guaranteed Limit
25°C
-40°C to 85°C
min max min
Unit
125°C
max
min
max
tPHL, tPLH Propagation delay , 1An to VI = 0 V or VCC
1Yn, 2An to 2Yn
Figure 1 and 3
1.2
2.0
*
-
100
24
15
-
125
30
19
-
150
36
23
ns
tPHZ tPLZ Propagation delay, 1OE to VI = 0 V or VCC
1Yn, 2OE to 2Yn
Figure 2 and 4
1.2
2.0
*
-
140
30
20
-
175
35
24
-
210
41
28
ns
tPZH tPZL Propagation delay, 1OE to VI = 0 V or VCC
1Yn, 2OE to 2Yn
Figure 2 and 4
1.2
2.0
*
-
140
32
20
-
175
40
25
-
210
48
30
ns
tTHL, tTLH Output Transition Time,
Any Output
1.2
2.0
*
-
60
16
10
-
75
20
13
-
90
24
15
ns
3.0
-
7.0
-
7.0
-
7.0
pF
-
70
-
-
-
-
pF
CI
CPD
VI = 0 V or VCC
Figure 1 and 3
Input capacitance
Power dissipation
capacitance (per one
channel)
VI = 0 V or VCC
* VCC = 3.3 ± 0.3 V
tr
1An or 2An
10%
tf
VCC
90%
50%
GND
t PLH
1OE
50%
2OE
50%
50%
10%
90%
t PLZ
t PHZ
t PZH
t THL
1Yn or 2Yn
50%
GND
VCC
50%
1Yn or 2Yn
t TLH
GND
VCC
t PZL
t PHL
1Yn or 2Yn
VCC
VOL
VOH
)
GND
Figure 1. Switching Waveforms
Figure 2. Switching Waveforms
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
*
CL
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
1k
*
CL
Connect to V CC when
testing tPLZ and tPZL
Connect to GND when
testing tPHZ and tPZH
* Includes all probe and jig capacitance
* Includes all probe and jig capacitance
Figure 3. Test Circuit
Figure 4. Test Circuit
4
KK74LV241
N SUFFIX PLASTIC DIP
(MS - 001AD)
A
Dimension, mm
11
20
B
1
10
Symbol
MIN
MAX
A
24.89
26.92
B
6.1
7.11
5.33
C
F
L
C
-T- SEATING
PLANE
N
D
0.36
0.56
F
1.14
1.78
G
2.54
H
7.62
J
0°
10°
K
2.92
3.81
0.25 (0.010) M T
L
7.62
8.26
1. Dimensions “A”, “B” do not include mold flash or protrusions.
M
0.2
0.36
N
0.38
G
K
M
H
D
NOTES:
J
Maximum mold flash or protrusions 0.25 mm (0.010) per side.
D SUFFIX SOIC
(MS - 013AC)
A
20
11
H
Dimension, mm
B
1
P
10
G
R x 45
C
-TK
D
SEATING
PLANE
J
0.25 (0.010) M T C M
F
M
Symbol
MIN
MAX
A
12.6
13
B
7.4
7.6
C
2.35
2.65
D
0.33
0.51
F
0.4
1.27
G
1.27
H
9.53
J
0°
8°
1. Dimensions A and B do not include mold flash or protrusion.
K
0.1
0.3
2. Maximum mold flash or protrusion 0.15 mm (0.006) per side
M
0.23
0.32
P
10
10.65
R
0.25
0.75
NOTES:
for A; for B ‑ 0.25 mm (0.010) per side.
5