TECHNICAL DATA KK74LV373 Octal D-type transparent latch; 3-state The KK74LV373 is a low-voltage Si-gate CMOS devise and is pin and function compatible with 74HCT373. The KK74LV373 is an octal D-type transparent latch featuring separate D-type inputs for each latch and 3-state outputs for bus oriented applications. A latch enable (LE) input and an output enable (OE) input are common to all intemal latches. • • • • Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 1.2 to 3.6 V Low Input Current: 1.0 µA High Noise Immunity Characteristic of CMOS Devices ORDERING INFORMATION KK74LV373N Plastic KK74LV373DW SOIC TA = -40° to 125° C for all packages LOGIC DIAGRAM PIN ASSIGNMENT OE D0 D1 D2 D3 D4 D5 D6 D7 LE OE 03 02 04 05 07 06 08 09 13 12 14 15 17 16 18 19 VCC 01 20 Q0 Q0 02 19 Q7 Q1 D0 03 18 D7 Q2 D1 04 17 D6 Q3 Q1 05 16 Q6 Q2 06 15 Q5 D2 07 14 D5 D3 08 13 D4 Q3 09 12 Q4 GND 10 11 LE Q4 Q5 Q6 Q7 373 11 FUNCTION TABLE 01 PIN 20=VCC PIN 10 = GND Inputs Output OE LE Dn Qn L H H H L H L L L L X Qo H X X Z X = Don’t care Z = High impedance OFF-state L = Low voltage level H= HIGH voltage level 1 KK74LV373 MAXIMUM RATINGS* Symbol VCC Parameter DC supply voltage Value Unit -0.5 to +5.0 V 1 DC input diode current ±20 mA 2 DC output diode current ±50 mA DC output source or sink current -bus driver outputs ±35 mA IGND DC VCC or GND current for types with - bus driver outputs ±70 mA ICC DC VCC or GND current for types with - bus driver outputs ±70 mA PD Power dissipation per paskade, plastic DIP+ SOIC package+ 750 500 mW -65 to +150 °C 260 °C IIK* IOK* Io* 3 Tstg TL Storage temperature Lead temperature, 1.5 mm from Case for 10 seconds (Plastic DIP ), 0.3 mm (SOIC Package) * Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 12 mW/°C from 70° to 125°C SOIC Package: : - 8 mW/°C from 70° to 125°C *1: VI < -0.5 or VI > VCC+0.5V *2: Vo < -0.5 or Vo > VCC+0.5V *3: -0.5V < Vo < VCC+0.5V RECOMMENDED OPERATING CONDITIONS Symbol VCC VIN, VOUT Parameter DC Supply Voltage DC Input Voltage, Output Voltage TA Operating Temperature, All Package Types tr, tf Input Rise and Fall Time (Figure 1) VCC =1.2 V VCC =2.0 V VCC =3.0 V VCC =3.6 V Min Max Unit 1.2 3.6 V 0 VCC V -40 +125 °C 0 0 0 1000 700 500 400 ns This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND≤(VIN or VOUT)≤VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. 2 KK74LV373 DC ELECTRICAL CHARACTERISTICS Symbol Parameter Test Conditions V , CC Guaranteed Limit Unit В -40°C tо -40°C tо 85°C 125°C min max min max min max 25°C VIH HIGH level input VO = VCC-0.1 В voltage 1.2 2.0 3.0 3.6 0.9 1.4 2.1 2.5 - 0.9 1.4 2.1 2.5 - 0.9 1.4 2.1 2.5 - В VIL LOW level input VO =0.1 В voltage 1.2 2.0 3.0 3.6 - 0.3 0.6 0.9 1.1 - 0.3 0.6 0.9 1.1 - 0.3 0.6 0.9 1.1 В VOH HIGH level VI = VIH or VIL output voltage; all IO = -50 мкА outputs 1.2 2.0 3.0 3.6 1.1 1.92 2.92 3.52 - 1.0 1.9 2.9 3.5 - 1.0 1.9 2.9 3.5 - В HIGH level VI = VIH or VIL output voltage; IO = -8.0 мА bus driver outputs 3.0 2.48 - 2.34 - 2.20 - B LOW-level output VI = VIH or VIL voltage; all IO = 50 мкА outputs 1.2 2.0 3.0 3.6 - 0.09 0.09 0.09 0.09 - 0.1 0.1 0.1 0.1 - 0.1 0.1 0.1 0.1 B LOW-level output VI = VIH or VIL voltage; bus IO = 8.0 мА driver outputs 3.0 - 0.33 - 0.4 - 0.5 B IIN Input leakage current 3.6 - ±0.1 - ±1.0 - ±1.0 мкА IOZ 3-state output VI = VIL or VIH OFF-state current VO =VCC or GND 1.2 3.6 - ±0.5 - ±5 - ±10 мкА ICC Guiescent supply VI =VCC or 0 B current; MSI IO = 0 мкА 3.6 - 8.0 - 80 - 160 мкА VOL VI = VCC or GND 3 KK74LV373 AC ELECTRICAL CHARACTERISTICS (CL=50 пФ, tLH = tHL = 6.0 нс, VIL=0B, VIH=VCC) Symbol Parameter VCC Guaranteed Limit V 25°C min max -40°C tо 85°C max min Unit -40°C tо 125°C min max tPHL,tPLH от Dn к Qn Propagation delay Dn to Qn 1.2 2.0 3.0 - 150 38 23 - 190 48 29 - 220 58 35 tPHL, tPLH от LE к Qn Propagation delay LE to Qn 1.2 2.0 3.0 - 180 45 27 - 230 56 34 - 270 68 41 tPHZ, tPLZ от OE к Qn 3-state output enable time OE to Qn 1.2 2.0 3.0 - 160 35 23 - 200 43 28 - 240 45 32 tPZH, tPZL от OE к Qn 3-state output disable time OE to Qn 1.2 2.0 3.0 - 160 40 24 - 200 50 30 - 240 60 36 Output transition time 1.2 2.0 3.0 - 75 16 10 - 100 20 13 - 120 24 15 tW LE pulse width HING 1.2 2.0 3.0 250 30 18 - 350 34 24 - 450 41 24 - tSU Hold time Dn to LE 1.2 2.0 3.0 45 15 9 - 50 17 10 - 100 15 12 - tH Hold time Dn to LE 1.2 2.0 3.0 25 5 5 - 25 5 5 - 25 5 5 - CI Input capacitance 3.0 - 7.0 - 7.0 - 7.0 tTHL, tTLH CPD Power dissipation capacitance per latch Typical @25°C,VCC=3.0 V 80 Used to determine the no-load dynamic power consumption: PD=CPDV2CCfi + ∑(CLV2CCf0) where: fI = input freguercy in MHz; CL= output load capacity in pF; f0= output freguercy in MHz; VCC = supply voltage in V; ∑(CLV2CCf0) = sum of outputs. ns pF pF 4 KK74LV373 t LH t HL 0.9 0.9 Dn V1 VCC 0.9 0.1 GND 0.1 t PLH 0.1 GND t PLH t PHL 0.9 0.9 V1 t THL t TLH 0.9 V1 V1 0.1 V1 tW t PHL 0.9 V1 V1 LE V1 Qn t LH V CC 0B 0.1 Qn V1 0.1 t THL t TLH Figure 1. Switching Waveforms Figure 2. Switching Waveforms t LH VCC V1 V1 t HL 0.9 OE V1 V1 V1 V1 VCC 0.9 0.1 GND tSU 0B V1 = 0.5V CC V1 = 0.5V CC Dn 0.1 tH tSU t PZH tH VCC 0.1 V1 Qn 0.9 GND VOH t PHZ 0B LE V1 V1 t PLZ Qn VCC V1 GND t PZL V1 = 0.5V CC 0.1 VOL V1 = 0.5V CC Figure 3. Switching Waveforms Figure 4. Switching Waveforms EXPANDED LOGIC DIAGRAM 5 KK74LV373 N SUFFIX PLASTIC DIP (MS - 001AD) A Dimension, mm 11 20 B 1 10 Symbol MIN MAX A 24.89 26.92 B 6.1 7.11 5.33 C F L C -T- SEATING PLANE N G K M J H D 0.25 (0.010) M T NOTES: 1. Dimensions “A”, “B” do not include mold flash or protrusions. Maximum mold flash or protrusions 0.25 mm (0.010) per side. D 0.36 0.56 F 1.14 1.78 G 2.54 H 7.62 J 0° 10° K 2.92 3.81 L 7.62 8.26 M 0.2 0.36 N 0.38 D SUFFIX SOIC (MS - 013AC) A 20 11 H Dimension, mm B 1 P 10 G R x 45 C -TK D SEATING PLANE J 0.25 (0.010) M T C M NOTES: 1. Dimensions A and B do not include mold flash or protrusion. 2. Maximum mold flash or protrusion 0.15 mm (0.006) per side for A; for B ‑ 0.25 mm (0.010) per side. F M Symbol MIN MAX A 12.6 13 B 7.4 7.6 C 2.35 2.65 D 0.33 0.51 F 0.4 1.27 G 1.27 H 9.53 J 0° 8° K 0.1 0.3 M 0.23 0.32 P 10 10.65 R 0.25 0.75 6