ML1350 Monolithic IF Amplifier Legacy Device: Motorola MC1350 The ML1350 is an integrated circuit featuring wide range AGC for use as a linear IF amplifier in AM radio, shortwave, TV and instrumentation. • Power Gain: • • • • • • 50 dB Typ at 45 MHz 50 dB Typ at 58 MHz AGC Range: 60 dB Min, DC to 45 MHz Nearly Constant Input & Output Admittance over the Entire AGC Range Y21 Constant (–3.0 dB) to 90 MHz Low Reverse Transfer Admittance: << 1.0 µmho Typical 12 V Operation, Single–Polarity Power Supply Operating Temperature Range TA = 0° to +75° C 8 1 SO 8 = -5P PLASTIC PACKAGE CASE 751 (SO–8) MAXIMUM RATINGS (TA = +25°C, unless otherwise noted.) Symbol Value Unit Power Supply Voltage V+ +18 Vdc Output Supply Voltage V1, V8 +18 1 Vdc Vdc Note: Lansdale lead free (Pb) product, as it becomes available, will be identified by a part number prefix change from ML to MLE. VAGC V+ Differential Input Voltage Vin 5.0 Vdc Power Dissipation (Package Limitation) Plastic Package Derate above 25° C PD 625 5.0 mW mW/°C Operating Temperature Range TA 0 to +75 °C AGC Supply Voltage 8 CROSS REFERENCE/ORDERING INFORMATION PACKAGE MOTOROLA LANSDALE P DIP 8 MC1350P ML1350PP SO 8 MC1350D ML1350-5P Note: See ML1490 Similar Function Rating P DIP = PP PLASTIC PACKAGE CASE 626 Figure 1. Typical ML1350 Video IF Amplifier and MC1330 Low–Level Video Detector Circuit 0.002µF 470 220 0.1µF 0.002µF +18Vdc 18V Auxiliary Video Output 10V 3.3k 68pF 0.001µF 4 3 2 22 1 7 6 5 Primary Video and Sound Output 7.7V 4 T1 50 3.9k MC1330AP ML1350 6 7 8 12pF 8 3 33pF 2 1 AFT Output 0.002 µ F 5.0k 5 20pF 0 0.002 µ F 45MHz Input 3.9k L1 T1 AGC 5" ≈16 1" 5 6 Turns Turns 4 All windings #30 AWG tinned nylon acetate wire tuned with Carbonyl E or J slugs. Page 1 of 6 www.lansdale.com 3" 16 10 Turns 3" 16 L1 wound with #26 AWG tinned nylon acetate wire tuned by distorting winding. Issue A LANSDALE Semiconductor, Inc. ML1350 ELECTRICAL CHARACTERISTICS (V+ = +12 Vdc, TA = +25°C, unless otherwise noted.) Symbol Characteristics Min Typ Max Unit 60 68 – dB – 46 – – 48 50 58 62 – – – – – – 20 8.0 – – AGC Range, 45 MHz (5.0 V to 7.0 V) (Figure 1) Power Gain (Pin 5 grounded via a 5.1 kΩ resistor) f = 58 MHz, BW = 4.5 MHz See Figure 6(a) f = 45 MHz, BW = 4.5 MHz See Figure 6(a), (b) f = 10.7 MHz, BW = 350 kHz See Figure 7 f = 455 kHz, BW = 20 kHz Ap dB Maximum Differential Voltage Swing 0 dB AGC –30 dB AGC VO Output Stage Current (Pins 1 and 8) I1 + I8 – 5.6 – mA Total Supply Current (Pins 1, 2 and 8) IS – 14 17 mAdc Power Dissipation PD – 168 204 mW Vpp DESIGN PARAMETERS, Typical Values (V+ = +12 Vdc, TA = +25°C, unless otherwise noted.) Frequency Parameter Symbol 455 kHz 10.7 MHz 45 MHz 58 MHz Unit g11 b11 0.31 0.022 0.36 0.50 0.39 2.30 0.5 2.75 mmho Input Admittance Variations with AGC (0 dB to 60 dB) ∆g11 ∆b11 – – – – 60 0 – – µmho Differential Output Admittance g22 b22 4.0 3.0 4.4 110 30 390 60 510 µmho Output Admittance Variations with AGC (0 dB to 60 dB) ∆g22 ∆b22 – – – – 4.0 90 – – µmho Reverse Transfer Admittance (Magnitude) |y12| < < 1.0 < < 1.0 < < 1.0 < < 1.0 µmho Forward Transfer Admittance Magnitude Angle (0 dB AGC) Angle (–30 dB AGC) |y21| < y21 < y21 160 –5.0 –3.0 160 –20 –18 200 –80 –69 180 –105 –90 mmho Degrees Degrees Single–Ended Input Capacitance Cin 7.2 7.2 7.4 7.6 pF Differential Output Capacitance CO 1.2 1.2 1.3 1.6 pF Single–Ended Input Admittance Figure 2. Typical Gain Reduction Figure 3. Noise Figure versus Gain Reduction IAGC = 0.1 mA 20 40 60 (Figures 6 and 7) 80 4.0 Page 2 of 6 NOISE FIGURE (dB) GAIN REDUCTION (dB) 0 IAGC = 0.2 mA 5.0 6.0 VAGC, SUPPLY VOLTAGE (V) 7.0 22 20 18 16 14 12 10 8.0 6.0 58 MHz 45 MHz (Figure 6) 0 10 20 30 40 GAIN REDUCTION (dB) www.lansdale.com Issue A LANSDALE Semiconductor, Inc. ML1350 GENERAL OPERATING INFORMATION The input amplifiers (Q1 and Q2) operate at constant emitter currents so that input impedance remains independent of AGC action. Input signals may be applied single–ended or differentially (for AC) with identical results. Terminals 4 and 6 may be driven from a transformer, but a DC path from either terminal to ground is not permitted. Figure 4. Circuit Schematic AGC Amplifier Section V+ 2 (+) 1.47k AGC Input 70 8 AGC action occurs as a result of an increasing voltage on the base of Q4 and Q5 causing these transistors to conduct more heavily thereby shunting signal current from the interstage amplifiers Q3 and Q6. The output amplifiers are supplied from an active current source to maintain constant quiescent bias thereby holding output admittance nearly constant. Collector voltage for the output amplifier must be supplied through a center–tapped tuning coil to Pins 1 and 8. The 12 V supply (V+) at Pin 2 may be used for this purpose, but output admittance remains more nearly constant if a separate 15 V supply (V+ +) is used, because the base voltage on the output amplifier varies with AGC bias. V++ Output 5 12.1 k 5.53k 470 470 Q3 Q4 Q5 Q6 Figure 5. Frequency Response Curve (45 MHz and 58 MHz) 1(–) 2.0k Q7 4 (–) Q1 66 Q10 Q8 45 1.4k Inputs Q2 2.8k 6 (+) Q9 200 200 2.8k 5.0k 5.0k 5.6k 1.1k 1.1k 1.9k 8.4k 200 Scale: 1.0 MHz/cm 7 Gnd Input Amplifier Section Bias Supplies Output Amplifier Section Figure 6. Power Gain, AGC and Noise Figure Test Circuits (a) 45 MHz and 58 MHz 0.001µF Input RS = 50Ω 0.001µF C2 L1 C1 LP LP 1.5–20pF 0.001 µF 4 (b) Alternate 45 MHz +12V 3 2 Input 0.68µH .001 +12V L1 LP 0.1 Output T1 RL = 50Ω 1 RS = 50Ω 0.33µH C1 4 3 2 1 RL = 50Ω Output ML1350 ML1350 5 6 7 8 5.1k 5.1k 5 6 7 5.1k 8 C2 VAGC VAGC * 0.001µF 0.001 C3 0.001 0.001µF 0.001µF *Connect to ground for maximum power gain test. All power supply chokes (Lp), are self–resonant at input frequency. LP ≥ 20 kΩ. See Figure 5 for Frequency Response Curve. L1 @ 45 MHz = 7 1/4 Turns on a 1/4" coil form L1 @ 58 MHz = 6 Turns on a 1/4" coil form T1 Primary Winding = 18 Turns on a 1/4" coil form, center–tapped, #25 AWG Secondary Winding = 2 Turns centered over Primary Winding @ 45 MHz = 1 Turn @ 58 MHz Slug = Carbonyl E or J 45 MHz Page 3 of 6 L1 Ferrite Core 14 Turns 28 S.W.G. C1 C2 C3 5–25 pF 5–25 pF 5–25 pF 58 MHz L1 0.4 µH Q ≥ 100 0.3 µH Q ≥ 100 T1 1.3 µH to 3.4 µH Q ≥ 100 @ 2.0 µH 1.2 µH to 3.8 µH Q ≥ 100 @ 2.0 µH C1 50 pF to 160 pF 8.0 pF to 60 pF C2 8.0 pF to 60 pF 3.0 pF to 35 pF www.lansdale.com Issue A LANSDALE Semiconductor, Inc. ML1350 Legacy Applications Information Figure 7. Power Gain and AGC Test Circuit (455 kHz and 10.7 MHz) Frequency L1 12 V C2 C1 C3 4 3 2 1 5 6 C7 *Grounded for maximum power gain. C1 C2 C3 C4 C5 C8 C7 L1 T1 – – 0.05 µF 0.05 µF 0.001 µF 0.05 µF 0.05 µF – Note 1 80–450 pF 5.0–80 pF 0.001 µF 0.05 µF 36 pF 0.05 µF 0.05 µF 4.6 µF Note 2 Output RS = 50Ω 7 8 C6 NOTES: NOTES: NOTES: NOTES: NOTES: NOTES: NOTES: NOTES: NOTES: Figure 8. Single–Ended Input Admittance 5.0 500 4.0 400 b11 3.0 2.0 1.0 < Y21 (–30 dB gain) 300 –80 200 –120 Y21 20 30 40 50 f, FREQUENCY (MHz) 70 100 1.0 1.0 (Single–ended output admittance exhibits twice these values.) b22 0.6 0.4 0.2 g22 0 10 3.0 5.0 10 20 f, FREQUENCY (MHz) 30 –200 100 50 8.0 DIFFERENTIAL OUTPUT VOLTAGE (V) 0.8 2.0 Figure 11. Differential Output Voltage Figure 10. Differential Output Admittance g 22 , b 22 (mmho) –160 0 10 0 –40 < Y21 (max gain) 100 g11 0 7.0 6.0 V + + = 14 V 5.0 4.0 V + + = 12 V 3.0 2.0 1.0 0 20 30 40 50 70 100 0 f, FREQUENCY (MHz) Page 4 of 6 1. Primary: 120 µH (center–tapped) 1. Qu = 140 at 455 kHz 1. Primary: Secondary turns ratio ≈ 13 2. Primary: 6.0 µH 2. Primary winding = 24 turns #36 AWG 2. (close–wound on 1/4" dia. form) 2. Core = Carbonyl E or J 2. Secondary winding = 1–1/2 turns #36 AWG, 1/4" dia. 2. (wound over center–tap) Figure 9. Forward Transfer Admittance | Y 21 | (mmhos) g11 ,b11 (mmhos) 10.7 MHz T1 MC1350 5.1k 455 kHz C4 C5 VAGC * Component < Y 21 (DEGREES) Input RS = 50Ω www.lansdale.com 10 20 30 40 50 GAIN REDUCTION (dB) 60 70 80 Issue A LANSDALE Semiconductor, Inc. ML1350 Typical application of a AM Modulator using ML1350 Figure 12. V1 12V +V C4 .1uF C1 220pF vcc rfout 4 3 2 1 rfin R2 P1 50 V2 10V +V AGC 7 8 gnd a gc C7 1uF 6 rfout 5 R1 5.1k T1 U2 ML1350 rfin R3 10k 40% gnd RF input L2 1uH C5 47pF C6 470pF RF out P3 C2 MOD input P2 .1uF C3 .1uF Page 5 of 6 www.lansdale.com Issue A LANSDALE Semiconductor, Inc. ML1350 OUTLINE DIMENSIONS 8 P DIP 8 = PP (ML1350PP) PLASTIC PACKAGE CASE 626–05 ISSUE K 5 –B– 1 NOTES: 1. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 2. PACKAGE CONTOUR OPTIONAL (ROUND OR SQUARE CORNERS). 3. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 4 F DIM A B C D F G H J K L M N –A– NOTE 2 L C J –T– N SEATING PLANE D M K MILLIMETERS MIN MAX 9.40 10.16 6.10 6.60 3.94 4.45 0.38 0.51 1.02 1.78 2.54 BSC 0.76 1.27 0.20 0.30 2.92 3.43 7.62 BSC ––– 0.76 1.01 INCHES MIN MAX 0.370 0.400 0.240 0.260 0.155 0.175 0.015 0.020 0.040 0.070 0.100 BSC 0.030 0.050 0.008 0.012 0.115 0.135 0.300 BSC ––– 0.030 0.040 G H 0.13 (0.005) M T A M B SO 8 = -5P (ML1350-5P) PLASTIC PACKAGE CASE 751–05 (SO–8) ISSUE N –A– 8 M NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 5 –B– 1 4X P 0.25 (0.010) 4 M B M G R C –T– 8X K D 0.25 (0.010) M T B SEATING PLANE M S A X 45° F J S DIM A B C D F G J K M P R MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.18 0.25 0.10 0.25 INCHES MIN MAX 0.189 0.196 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.007 0.009 0.004 0.009 5.80 0.25 0.229 0.010 6.20 0.50 0.244 0.019 Lansdale Semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function or design. Lansdale does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others. “Typical” parameters which may be provided in Lansdale data sheets and/or specifications can vary in different applications, and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by the customer’s technical experts. Lansdale Semiconductor is a registered trademark of Lansdale Semiconductor, Inc. Page 6 of 6 www.lansdale.com Issue A