MC3458, MC3358 Dual, Low Power Operational Amplifiers Utilizing the circuit designs perfected for the quad operational amplifiers, these dual operational amplifiers feature: low power drain, a common mode input voltage range extending to ground/VEE, and Single Supply or Split Supply operation. These amplifiers have several distinct advantages over standard operational amplifier types in single supply applications. They can operate at supply voltages as low as 3.0 V or as high as 36 V with quiescent currents about one–fifth of those associated with the MC1741C (on a per amplifier basis). The common mode input range includes the negative supply, thereby eliminating the necessity for external biasing components in many applications. The output voltage range also includes the negative power supply voltage. • Short Circuit Protected Outputs • True Differential Input Stage • Single Supply Operation: 3.0 V to 36 V • Low Input Bias Currents • Internally Compensated • Common Mode Range Extends to Negative Supply • Class AB Output Stage for Minimum Crossover Distortion • Single and Split Supply Operations Available • Similar Performance to the Popular MC1458 http://onsemi.com MARKING DIAGRAMS 8 MC3x58P1 AWL YYWW PDIP–8 P1 SUFFIX CASE 626 8 1 1 8 SO–8 D SUFFIX CASE 751 8 1 3x58 ALYW 1 x A WL, L YY, Y WW, W = 3 or 4 = Assembly Location = Wafer Lot = Year = Work Week PIN CONNECTIONS Output A 2 Inputs A VEE/Gnd 8 1 3 7 – + – + 4 6 VCC Output B Inputs B 5 (Top View) ORDERING INFORMATION Device Package Shipping MC3358D SO–8 98 Units/Rail MC3358DR2 SO–8 2500 Tape & Reel MC3358P1 PDIP–8 50 Units/Rail MC3458D SO–8 98 Units/Rail MC3458DR2 SO–8 2500 Tape & Reel PDIP–8 50 Units/Rail MC3458P1 Semiconductor Components Industries, LLC, 2001 March, 2001 – Rev. 1 1 Publication Order Number: MC3458/D MC3458, MC3358 Bias Circuitry Common to Both Amplifiers Output Q19 Q18 Q27 Q20 Q17 Q23 Q16 40 k 5.0 pF Q29 31 k Q28 Q1 Q15 + Q22 Q24 2.0 k Q9 Inputs Q2 Q11 Q6 Q5 Q3 Q13 37k Q25 Q21 Q4 25 Q12 Q30 2.4 k Q10 Q7 60 k VCC Q8 VEE (Gnd) Figure 1. Representative Schematic Diagram (1/2 of Circuit Shown) MAXIMUM RATINGS Rating Symbol Value VCC VCC, VEE 36 ±18 Input Differential Voltage Range (Note 1.) VIDR ±30 Vdc Input Common Mode Voltage Range (Note 2.) VICR ±15 Vdc Junction Temperature TJ 150 °C Storage Temperature Range Tstg –55 to +125 °C Operating Ambient Temperature Range MC3458 MC3358 TA Power Supply Voltages Single Supply Split Supplies Unit Vdc °C 0 to +70 –40 to +85 1. Split Power Supplies. 2. For supply voltages less than ±18 V, the absolute maximum input voltage is equal to the supply voltage. http://onsemi.com 2 MC3458, MC3358 ELECTRICAL CHARACTERISTICS (For MC3458, VCC = +15 V, VEE = –15 V, TA = 25°C, unless otherwise noted.) (For MC3358, VCC = +14 V, VEE = Gnd, TA = 25°C, unless otherwise noted.) MC3458 MC3358 Symbol Min Typ Max Min Typ Max Unit Input Offset Voltage TA = Thigh to Tlow (Note 3.) VIO – – 2.0 – 10 12 – – 2.0 – 8.0 10 mV Input Offset Current TA = Thigh to Tlow IIO – – 30 – 50 200 – – 30 – 75 250 nA 20 15 200 – – – 20 15 200 – – – Characteristic Large Signal Open Loop Voltage Gain VO = ±10 V, RL = 2.0 kΩ, TA = Thigh to Tlow AVOL V/mV Input Bias Current TA = Thigh to Tlow IIB – – –200 – –500 –800 – – –200 – –500 –1000 nA Output Impedance, f = 20 Hz zO – 75 – – 75 – Ω Input Impedance, f = 20 Hz zI 0.3 1.0 – 0.3 1.0 – MΩ ±12 ±10 ±10 ±13.5 ±13 – – – – 12 10 10 12.5 12 – – – – Output Voltage Range RL = 10 kΩ RL = 2.0 kΩ RL = 2.0 kΩ, TA = Thigh to Tlow VOR Input Common Mode Voltage Range VICR +13 –VEE +13.5 –VEE – +13 –VEE +13.5 –VEE – V Common Mode Rejection Ratio, RS ≤ 10 kΩ CMR 70 90 – 70 90 – dB ICC, IEE – 1.6 3.7 – 1.6 3.7 mA ISC ±10 ±20 ±45 ±10 ±30 ±45 mA Positive Power Supply Rejection Ratio PSRR+ – 30 150 – 30 150 µV/V Negative Power Supply Rejection Ratio PSRR– – 30 150 – – – µV/V Average Temperature Coefficient of Input Offset Current, TA = Thigh to Tlow ∆IIO/∆T – 50 – – 50 – pA/°C Average Temperature Coefficient of Input Offset Current, TA = Thigh to Tlow ∆VIO/∆T – 10 – – 10 – µV/°C Power Bandwidth AV = 1, RL = 2.0 kΩ, VO = 20 Vpp, THD = 5% BWp – 9.0 – – 9.0 – kHz Small Signal Bandwidth AV = 1, RL = 10 kΩ, VO = 50 mV BW – 1.0 – – 1.0 – MHz Slew Rate AV = 1, VI = –10 V to +10 V SR – 0.6 – – 0.6 – V/µs Rise Time AV = 1, RL = 10 kΩ, VO = 50 mV tTLH – 0.35 – – 0.35 – µs Fall Time AV = 1, RL = 10 kΩ, VO = 50 mV tTHL – 0.35 – – 0.35 – µs Overshoot AV = 1, RL = 10 kΩ, VO = 50 mV os – 20 – – 20 – % Phase Margin AV = 1, RL = 2.0 kΩ, CL = 200 pF φm – 60 – – 60 – Degrees – – 1.0 – – 1.0 – % Power Supply Current (VO = 0) RL = ∞ Individual Output Short Circuit Current (Note 4.) Crossover Distortion (Vin = 30 mVpp, Vout = 2.0 Vpp, f = 10 kHz) V 3. MC3358: Tlow = –40°C, Thigh = +85°C MC3458: Tlow = 0°C, Thigh = +70°C 4. Not to exceed maximum package power dissipation. http://onsemi.com 3 MC3458, MC3358 ELECTRICAL CHARACTERISTICS (VCC = 5.0 V, VEE = Gnd, TA = 25°C, unless otherwise noted.) MC3458 MC3358 Symbol Min Typ Max Min Typ Max Unit Input Offset Voltage VIO – 2.0 5.0 – 2.0 10 mV Input Offset Current IIO – 30 50 – – 75 nA Characteristic Input Bias Current IIB – –200 –500 – – –500 nA Large Signal Open Loop Voltage Gain RL = 2.0 kΩ, AVOL 20 200 – 20 200 – V/mV Power Supply Rejection Ratio PSRR – – 150 – – 150 µV/V 3.3 – 3.5 VCC –1.7 – – 3.3 – 3.5 VCC –1.7 – – Output Voltage Range (Note 5.) RL = 10 kΩ, VCC = 5.0 V RL = 10 kΩ, 5.0 V ≤ VCC ≤ 30 V VOR Vpp Power Supply Current ICC – 2.5 7.0 – 2.5 4.0 mA Channel Separation f = 1.0 kHz to 20 kHz (Input Referenced) CS – –120 – – –120 – dB 5. Output will swing to ground with a 10 kΩ pull down resistor. 5 V/DIV stage performs not only the first stage gain function but also performs the level shifting and transconductance reduction functions. By reducing the transconductance, a smaller compensation capacitor (only 5.0 pF) can be employed, thus saving chip area. The transconductance reduction is accomplished by splitting the collectors of Q24 and Q22. Another feature of this input stage is that the input Common Mode range can include the negative supply or ground, in single supply operation, without saturating either the input devices or the differential to single–ended converter. The second stage consists of a standard current source load amplifier stage. The output stage is unique because it allows the output to swing to ground in single supply operation and yet does not exhibit any crossover distortion in split supply operation. This is possible because Class AB operation is utilized. Each amplifier is biased from an internal voltage regulator which has a low temperature coefficient thus giving each amplifier good temperature characteristics as well as excellent power supply rejection. 20 µs/DIV Figure 2. Inverter Pulse Response CIRCUIT DESCRIPTION The MC3458/3358 is made using two internally compensated, two–stage operational amplifiers. The first stage of each consists of differential input devices Q24 and Q22 with input buffer transistors Q25 and Q21 and the differential to single ended converter Q3 and Q4. The first http://onsemi.com 4 MC3458, MC3358 120 50 mV/DIV A VOL , LARGE SIGNAL OPEN LOOP VOLTAGE GAIN (dB) 0.5 V/DIV AV = 100 80 60 40 20 0 -20 *Note Class A B output stage produces distortion less sinewave. VCC = +15 V VEE = -15 V TA = 25°C 100 50 µs/DIV 1.0 Figure 3. Sine Wave Response 10 100 1.0 k 10 k f, FREQUENCY (Hz) VO, OUTPUT VOLTAGE RANGE (V pp) VO, OUTPUT VOLTAGE (Vpp ) +15 V - 20 VO + -15 V 15 10 k 10 5.0 TA = 25°C 0 -5.0 1.0 k 10 k 100 k f, FREQUENCY (Hz) 20 10 0 1.0 M TA = 25°C 30 0 Figure 5. Power Bandwidth I IB , INPUT BIAS CURRENT (nA) I IB, INPUT BIAS CURRENT (nA) 200 100 -75 -55 -35 -15 5.0 25 45 65 2.0 4.0 6.0 8.0 10 12 14 16 18 VCC AND (VEE), POWER SUPPLY VOLTAGES (V) 20 Figure 6. Output Swing versus Supply Voltage VCC = +15 V VEE = -15 V TA = 25°C 300 1.0 M Figure 4. Open Loop Frequency Response 30 25 100 k 85 170 160 150 105 125 0 2.0 4.0 6.0 8.0 10 12 14 16 T, TEMPERATURE (°C) VCC AND (VEE), POWER SUPPLY VOLTAGES (V) Figure 7. Input Bias Current versus Temperature Figure 8. Input Bias Current versus Supply Voltage http://onsemi.com 5 18 20 MC3458, MC3358 VCC 50 k VCC 10 k R2 - 5.0 k 1/2 VO MC3458 + VCC 10 k Vret - 1/2 VO MC3458 + 10 k R1 VO = VO = fo = Vref = 1 VCC 2 R1 R1 +R2 R 1 V 2 CC C R 1 2πRC For: = 1.0 kHz C fo R = 16 kΩ C = 0.01 µF Figure 9. Voltage Reference e1 + 1 R C 1/2 Figure 10. Wien Bridge Oscillator MC3458 - R1 - b R1 1/2 + VOH 1/2 VO MC3458 - Vin eo MC3458 + 1 R C - 1/2 MC3458 + e2 R1 Vret a R1 Hysteresis R2 R VO VOL VinL = R1 (VOL - Vref) +Vref R1 +R2 VinH = R1 (VOH - Vref) +Vref R1 +R2 Vh = R1 (VOH - VOL) R1 +R2 R VinL VinH Vref eo = C (1 +a +b) (e2 –e1) Figure 11. High Impedance Differential Amplifier Figure 12. Comparator with Hysteresis R R C1 100 k C R2 - Vin C 1/2 - MC3458 + 100 k 1/2 Where: TBP = center frequency gain TN = passband notch gain R1 - 1/2 MC3458 + Vref R2 1 2πRC R1 = QR MC3458 + Vref fo = Bandpass Output R3 - 1/2 MC3458 + Vref Figure 13. Bi–Quad Filter http://onsemi.com 6 Vref C1 R2 = R1 TBP R3 = TN R2 C1 = 10 C For: fo = 1.0 kHz Q = 10 TBP = 1 TN = 1 Notch Output Vref = 1 V 2 CC R = 160 kΩ C = 0.001 µF R1 = 1.6 MΩ R2 = 1.6 MΩ R3 = 1.6 MΩ MC3458, MC3358 Vref = 1 VCC 2 R2 Triangle Wave Output Vref + 300 k R3 1/2 MC3458 - + 75 k C Square Wave Output 1/2 MC3458 - R1 100 k Vref Rf f= R1 +RC 4 CRf R1 R3 = R2 R1 R2 +R1 if, Figure 14. Function Generator C R1 Vin C VCC R3 - 1/2 MC3458 + R2 CO CO = 10 C Vref = 1 VCC 2 Vref Given: fo = center frequency A(fo) = gain at center frequency Choose value fo, C. Then: R3 = Q π fo C R1 = R3 2 A(fo) R2 = For less than 10% error from operational amplifier where, fo and BW are expressed in Hz. R1 R5 4Q2 R1 - R3 Qo fo < 0.1 BW If source impedance varies, filter may be preceded with voltage follower buffer to stabilize filter parameters. Figure 15. Multiple Feedback Bandpass Filter http://onsemi.com 7 VO MC3458, MC3358 PACKAGE DIMENSIONS PDIP–8 P1 SUFFIX CASE 626–05 ISSUE L 8 NOTES: 1. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 2. PACKAGE CONTOUR OPTIONAL (ROUND OR SQUARE CORNERS). 3. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 5 –B– 1 4 DIM A B C D F G H J K L M N F –A– NOTE 2 L C J –T– MILLIMETERS MIN MAX 9.40 10.16 6.10 6.60 3.94 4.45 0.38 0.51 1.02 1.78 2.54 BSC 0.76 1.27 0.20 0.30 2.92 3.43 7.62 BSC --10 0.76 1.01 INCHES MIN MAX 0.370 0.400 0.240 0.260 0.155 0.175 0.015 0.020 0.040 0.070 0.100 BSC 0.030 0.050 0.008 0.012 0.115 0.135 0.300 BSC --10 0.030 0.040 N SEATING PLANE D M K G H 0.13 (0.005) M T A M B M SO–8 D SUFFIX CASE 751–07 ISSUE W –X– NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. A 8 5 0.25 (0.010) S B 1 M Y M 4 K –Y– G C N X 45 SEATING PLANE –Z– 0.10 (0.004) H M D 0.25 (0.010) M Z Y S X S http://onsemi.com 8 J DIM A B C D G H J K M N S MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0 8 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 8 0.010 0.020 0.228 0.244 MC3458, MC3358 Notes http://onsemi.com 9 MC3458, MC3358 Notes http://onsemi.com 10 MC3458, MC3358 Notes http://onsemi.com 11 MC3458, MC3358 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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