MAS MAS1175A1SN06

DA1175.008
13 July, 2006
MAS1175
IC FOR 10.00 – 20.00 MHz VCTCXO
Low Power
Wide Supply Voltage Range
True Sine Wave Output
Very High Level of Integration
• Electrically Trimmable
• Very Low Phase Noise
• Low Cost
•
•
•
•
DESCRIPTION
The MAS1175 is an integrated circuit well suited to
build VCTCXO for mobile communication. Only two
external components are needed. Temperature
calibration is achieved with three calibration points
only. The trimming is done through a serial bus and
the calibration information is stored in an internal
PROM.
FEATURES
•
•
•
•
•
To build a VCTCXO only two additional
components, a varactor and a crystal are needed.
The compensation method is fully analog. IC
compensation work is continuous without
generating any steps or other interferences.
APPLICATIONS
Very small size
Minimum current draw
Wide operating temperature range
Phase noise <-130 dBc/Hz at 1 kHz offset
VCTCXO for mobile phones
VCTCXO for other telecommunications
systems
•
BLOCK DIAGRAM
DA
CLK
PV
CUB
4
INF
4
SENS
4
LIN
8
CDAC1
8
f(T)
MAS1175
TE1
Σ
f(T)
T
Vref
TMux
TE2
VC
VDD
CDAC2
VSS
2
OUT
X2
X1
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DA1175.008
13 July, 2006
PIN DESCRIPTION
Pin Description
Symbol
x-coordinate
y-coordinate
Power Supply Voltage
Programming Input
Serial Bus Clock Input
VDD
PV
CLK
263
503
745
1330
1326
1321
Serial Bus Data Input
Temperature Output
Test Multiplexer Output
Voltage Control Input
Crystal Oscillator Output
Crystal/Varactor Oscillator Input
Power Supply Ground
Buffer Output
DA
TE1
TE2
VC
X1
X2
VSS
OUT
1001
1246
1454
190
398
1355
1828
2031
1321
1325
1325
231
231
231
242
231
Note: Because the substrate of the die is internally connected to VDD, the die has to be connected to VDD or
left floating. Make sure that VDD is the first pad to be bonded. Pick-and-place and all component assembly are
recommended to be performed in ESD protected area.
Note: Pad coordinates are measured from the left bottom corner of the chip to the center of the pads. The
coordinates may vary depending on sawing width and location, however, distances between pads are accurate.
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Min
Max
Unit
Supply Voltage
Input Voltage
Power Dissipation
Storage Temperature
VDD - VSS
VIN
PMAX
TST
-0.3
VSS -0.3
6.0
VDD + 0.3
20
150
V
V
mW
o
C
-55
Note
1)
Note: Not valid for programming pin PV
RECOMMENDED OPERATION CONDITIONS
Parameter
Symbol
Supply Voltage
Supply Current
Operable Temperature
Storage Temperature
VDD
ICC
TC
TS
Crystal Pulling Sensitivity
Load Capacitance
S
CL
Conditions
Min
Typ
Max
Unit
2.7
2.8
5.5
1.8
+85
+40
V
mA
o
C
o
C
Vcc = 2.8 Volt
Relative humidity =
15%…70%
-30
-5
30
10
ppm/pF
pF
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DA1175.008
13 July, 2006
ELECTRICAL CHARACTERISTICS
Parameter
Symbol
Min
Frequency Range
fo
Voltage Control Range
VC
Voltage Control Sensitivity
Typ
Max
Unit
10.00
20.00
MHz
0
Vdd
VCSENS
10
ppm/V
Output Voltage (10kΩ // 10 pF)
Vout
1.0
Vpp
Compensation Range ± 2.5 ppm
TC
-30
85
o
o
Compensation Range ± 2.0 ppm
TC
-25
75
Compensation Range Linear Part
a1
-0.7
0.0
Compensation Inflection Point
INF
25
31
Compensation Range Cubic Part
a3
Compensation CDAC1 (8 Bit)
CX1
C10
CX2
C20
Compensation CDAC2 (2 Bit)
Startup Time
C
C
ppm/K
o
C
ppm2/K3
95
C10 + 18
C20 + 4
TSTART
Note
2
pF
2)
pF
3)
ms
Note 2: typ C10 = 14pF
Note 3: typ C20 = 5pF (varactor capacitance has to be added)
IC OUTLINES
PV
CLK
DA
TE1
TE2
MAS1175
1556 µm
VDD
VC
X1
X2
VSS
OUT
Die map reference
2234 µm
Note 1: MAS1175A pads are round with 95 µm diameter at opening.
Note 2: Pins PV and TE1 shall not be connected and pins CLK and DA can either be connected to VSS or left
open in VCTCXO module end-user application.
Note 3: Die map reference is the actual left bottom corner of the sawn chip.
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DA1175.008
13 July, 2006
DEVICE OUTLINE CONFIGURATION
MSOP10 (SnPb)
CLK
PV
VDD
A = product version
Y = year
WW= week
TE2
OUT
VSS
X2
Top View
DA
CLK
X1
PV
VC
VDD
1175
A G
YWW
DA
1175
AYWW
TE2
MSOP10 (Green)
OUT
VSS
X2
X1
VC
A = product version
Y = year
WW= week
G=Green/RoHs Compliant
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DA1175.008
13 July, 2006
PACKAGE (MSOP-10) OUTLINE
e
S
See Detail A
c
B
c1
b1
(b)
E1
E1
B
Section B - B
E
E
5-15 Degrees
L1
Detail A
A2A
F
AA
A1
Land
Pattern
Recommendation
Gauge Plane
0 - 8 Degrees
L2
D
Seating Plane
N
L
G
Symbol
Min
Nom
Max
Unit
A
A1
A2
b
b1
c
c1
D
E
E1
e
F
G
L
(Terminal length for
soldering)
L1
L2
M
N
S
-0.00
0.75
0.15
0.15
0.08
0.08
--0.85
----
1.10
0.15
0.95
0.30
0.25
0.23
0.18
mm
mm
mm
mm
mm
mm
mm
mm
mm
mm
mm
mm
mm
mm
0.40
3.00 BSC
4.90 BSC
3.00 BSC
0.50 BSC
4.8
0.50
0.60
0.80
0.95 REF
0.25 BSC
0.41
1.02
0.50
M
mm
mm
mm
Mm
Dimensions do not include mold or interlead flash, protrusions or gate burrs.
Reference Standard : JEDEC MO-187 BA.
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DA1175.008
13 July, 2006
SOLDERING INFORMATION
◆ For Sn/Pb MSOP-10
Resistance to Soldering Heat
Maximum Temperature
Maximum Number of Reflow Cycles
Reflow profile
Seating Plane Co-planarity
Lead Finish
According to RSH test IEC 68-2-58/20 2*220°C
240°C
3
Thermal profile parameters stated in JESD22-A113 should not
be exceeded. http://www.jedec.org
max 0.08 mm
Solder plate 7.62 - 25.4 µm, material Sn 85% Pb 15%
◆ For Pb Free, RoHS Compliant MSOP-10
Resistance to Soldering Heat
Maximum Temperature
Maximum Number of Reflow Cycles
Reflow profile
Lead Finish
According to RSH test IEC 68-2-58/20
260°C
3
Thermal profile parameters stated in IPC/JEDEC J-STD-020
should not be exceeded. http://www.jedec.org
Solder plate 7.62 - 25.4 µm, material Matte Tin
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DA1175.008
13 July, 2006
EMBOSSED TAPE SPECIFICATIONS
P1
T
DO
PO
P2
E
W
F
BO
A
AO
KO
D1
Section A-A
User Direction of Feed
Pin 1 Designator
Dimension
Min/Max
Unit
Ao
Bo
Do
D1
E
F
Ko
Po
P1
P2
T
W
5.00 ±0.10
3.20 ±0.10
1.50 +0.1/-0.0
1.50 min
1.75
5.50 ±0.05
1.45 ±0.10
4.0
8.0
±0.10
2.0
±0.05
0.3
±0.05
12.00 +0.30/-0.10
mm
mm
mm
mm
mm
mm
mm
mm
mm
mm
mm
mm
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DA1175.008
13 July, 2006
REEL SPECIFICATIONS
W2
A
D
C
Tape Slot for Tape Start
N
B
W1
5000 Components on Each Reel
Reel Material: Conductive, Plastic Antistatic or Static Dissipative
Carrier Tape Material: Conductive
Cover Tape Material: Static Dissipative
Carrier Tape
Cover Tape
End
Start
Trailer
Dimension
A
B
C
D
N
W 1 (measured at hub)
W 2 (measured at hub)
Trailer
Leader
Weight
Leader
Components
Min
1.5
12.80
20.2
50
12.4
Max
Unit
330
mm
mm
mm
mm
mm
mm
mm
mm
mm
13.50
14.4
18.4
160
390,
of which minimum 160
mm of empty carrier tape
sealed with cover tape
1500
g
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DA1175.008
13 July, 2006
ORDERING INFORMATION
Product Code
Product
Package
Comments
MAS1175ATB1
MAS1175ASM1-T
IC FOR VCTCXO
IC FOR VCTCXO
Tested wafers, 480 µm
MSOP10
Die Size 2.233x1.556 mm
Tape & Reel
MAS1175A1SN06
IC FOR VCTCXO
Green MSOP-10, Pb Free,
RoHS Compliant
Please contact Micro Analog Systems Oy for other wafer thickness options.
Tape & Reel
LOCAL DISTRIBUTOR
MICRO ANALOG SYSTEMS OY CONTACTS
Micro Analog Systems Oy
Kamreerintie 2, P.O. Box 51
FIN-02771 Espoo, FINLAND
Tel. +358 9 80 521
Fax +358 9 805 3213
http://www.mas-oy.com
NOTICE
Micro Analog Systems Oy reserves the right to make changes to the products contained in this data sheet in order to improve the design or
performance and to supply the best possible products. Micro Analog Systems Oy assumes no responsibility for the use of any circuits
shown in this data sheet, conveys no license under any patent or other rights unless otherwise specified in this data sheet, and makes no
claim that the circuits are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and
Micro Analog Systems Oy makes no claim or warranty that such applications will be suitable for the use specified without further testing or
modification.
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