OBSOLETE 8/31/94 MT5C6401 64K x 1 SRAM SRAM 64K x 1 SRAM FEATURES • High speed: 9, 10, 12, 15, 20 and 25ns • High-performance, low-power, CMOS double-metal process • Single +5V ±10% power supply • Easy memory expansion with /C/E option • All inputs and outputs are TTL-compatible OPTIONS 22-Pin DIP (SA-2) MARKING • Timing 9ns access 10ns access 12ns access 15ns access 20ns access 25ns access - 9 -10 -12 -15 -20 -25 • Packages Plastic DIP (300 mil) Plastic SOJ (300 mil) • 2V data retention • Temperature Commercial Industrial Automotive Extended PIN ASSIGNMENT (Top View) (0°C to +70°C) (-40°C to +85°C) (-40°C to +125°C) (-55°C to +125°C) None DJ A0 1 22 Vcc A1 2 21 A15 A2 3 20 A14 A3 4 19 A13 A4 5 18 A12 A5 6 17 A11 A6 7 16 A10 A7 8 15 A9 Q 9 14 A8 WE 10 13 D Vss 11 12 CE L 24-Pin SOJ (SD-1) None IT AT XT A0 A1 A2 A3 A4 A5 NC A6 A7 Q WE Vss • Part Number Example: MT5C6401DJ-10 L NOTE: Not all combinations of operating temperature, speed, data retention and low power are necessarily available. Please contact the factory for availability of specific part number combinations. 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 Vcc A15 A14 A13 A12 NC A11 A10 A9 A8 D CE GENERAL DESCRIPTION The MT5C6401 is organized as a 65,556 x 1 SRAM using a four-transistor memory cell with a high-speed, low-power CMOS process. Micron SRAMs are fabricated using doublelayer metal, double-layer polysilicon technology. For flexibility in high-speed memory applications, Micron offers chip enable (/C/E) with all organizations. This enhancement can place the outputs in High-Z for additional flexibility in system design. The x1 configuration features separate data input and output. MT5C6401 REV. 12/93 Writing to these devices is accomplished when write enable (?W/E) and /C/E inputs are both LOW. Reading is accomplished when ?W/E remains HIGH and /C/E goes to LOW. The device offers a reduced power standby mode when disabled. This allows system designers to meet low standby power requirements. All devices operate from a single +5V power supply and all inputs and outputs are fully TTL-compatible. 1 Micron Semiconductor, Inc., reserves the right to change products or specifications without notice. 1993, Micron Semiconductor, Inc. OBSOLETE 8/31/94 MT5C6401 64K x 1 SRAM FUNCTIONAL BLOCK DIAGRAM Vcc GND A A A A A D I/O CONTROL ROW DECODER A 65,536-BIT MEMORY ARRAY Q CE A (LSB) WE COLUMN DECODER (LSB) A A A A A A POWER DOWN A TRUTH TABLE MT5C6401 REV. 12/93 MODE /C/E ?W/E INPUT OUTPUT POWER STANDBY H X DON’T CARE HIGH-Z STANDBY READ L H DON’T CARE Q ACTIVE WRITE L L DATA-IN HIGH-Z ACTIVE 2 Micron Semiconductor, Inc., reserves the right to change products or specifications without notice. 1993, Micron Semiconductor, Inc. OBSOLETE 8/31/94 MT5C6401 64K x 1 SRAM *Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. ABSOLUTE MAXIMUM RATINGS* Voltage on VCC Supply Relative to VSS .............. -1V to +7V Storage Temperature (plastic) .................... -55°C to +150°C Power Dissipation ............................................................. 1W Short Circuit Output Current ..................................... 50mA Voltage on Any Pin Relative to VSS ............ -1V to VCC +1V ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS (0°C ≤ TA ≤ 70°C; Vcc = 5V ±10%) DESCRIPTION SYMBOL MIN MAX UNITS NOTES Input High (Logic 1) Voltage CONDITIONS VIH 2.2 VCC +1 V 1 Input Low (Logic 0) Voltage VIL -0.5 0.8 V 1, 2 0V ≤ VIN ≤ VCC ILI -5 5 µA Output(s) disabled 0V ≤ VOUT ≤ VCC ILO -5 5 µA Output High Voltage IOH = -4.0mA VOH 2.4 Output Low Voltage IOL = 8.0mA VOL Input Leakage Current Output Leakage Current Supply Voltage VCC 4.5 V 1 0.4 V 1 5.5 V 1 MAX DESCRIPTION CONDITIONS SYMBOL TYP Power Supply Current: Operating /C/E ≤ VIL; VCC = MAX f = MAX = 1/ tRC outputs open ICC Power Supply Current: Standby /C/E ≥ VIH; VCC = MAX f = MAX = 1/ tRC outputs open /C/E ≥ VCC -0.2V; VCC = MAX VIN ≤ VSS +0.2V or VIN ≥ VCC -0.2V; f = 0 -9 -10 -12 -15 -20 -25 UNITS NOTES 125 190 185 175 165 140 130 mA 3, 13 ISB1 22 60 50 45 40 35 35 mA 13 ISB2 0.5 3 3 3 3 3 5 mA 13 CAPACITANCE DESCRIPTION Input Capacitance Output Capacitance MT5C6401 REV. 12/93 CONDITIONS SYMBOL MAX UNITS NOTES TA = 25°C; f = 1 MHz CI 7 pF 4 VCC = 5V CO 7 pF 4 3 Micron Semiconductor, Inc., reserves the right to change products or specifications without notice. 1993, Micron Semiconductor, Inc. OBSOLETE 8/31/94 MT5C6401 64K x 1 SRAM ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS (Note 5) (0°C ≤ TA ≤ 70°C; VCC = 5V ±10%) DESCRIPTION READ Cycle READ cycle time Address access time Chip Enable access time Output hold from address change Chip Enable to output in Low-Z Chip disable to output in High-Z Chip Enable to power-up time Chip disable to power-down time WRITE Cycle WRITE cycle time Chip Enable to end of write Address valid to end of write Address setup time Address hold from end of write WRITE pulse width Data setup time Data hold time Write disable to output in Low-Z Write Enable to output in High-Z MT5C6401 REV. 12/93 SYM tRC -9 -10 -12 -15 -20 -25 MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX UNITS NOTES 9 tAA tACE tOH tLZCE 3 2 tHZCE tPU tCW tAW tAS tAH tWP tDS tDH tLZWE tHZWE 12 10 9 3 2 5 0 tPD tWC 10 9 9 3 2 5 0 9 9 7 7 0 0 6 5 1 2 3 2 0 8 ns ns ns ns ns ns ns ns ns ns 3 2 0 8 0 20 20 15 15 0 0 12 9 1 2 6 25 ns ns ns ns ns ns ns ns 25 20 8 15 15 12 12 0 0 10 8 1 2 5 25 20 15 7 12 12 10 10 0 0 8 7 1 2 5 4 3 2 0 10 8 8 0 0 7 6 1 2 20 15 12 6 10 4 15 12 10 25 20 20 0 0 15 10 1 2 8 7, 14 6, 7 7 6, 7 Micron Semiconductor, Inc., reserves the right to change products or specifications without notice. 1993, Micron Semiconductor, Inc. OBSOLETE 8/31/94 MT5C6401 64K x 1 SRAM INDUSTRIAL TEMPERATURE SPECIFICATIONS (IT) The following specifications are to be used for Industrial Temperature (IT) MT5C6401 SRAMs. (-40°C ≤ TA ≤ 85°C) MAX DESCRIPTION CONDITIONS SYMBOL -10 -12 -15 -20 -25 UNITS NOTES Power Supply Current: Operating /C/E ≤ VIL; VCC = MAX f = MAX = 1/ tRC outputs open ICC 195 185 175 150 140 mA 3, 13 Power Supply Current: Standby /C/E ≥ VIH; VCC = MAX f = MAX = 1/ tRC outputs open ISB1 60 50 45 40 40 mA 13 /C/E ≥ VCC -0.2V; VCC = MAX VIN ≤ VSS +0.2V or VIN ≥ VCC -0.2V; f = 0 ISB2 5 5 5 5 5 mA 13 DATA RETENTION ELECTRICAL CHARACTERISTICS (L version only) DESCRIPTION CONDITIONS Data Retention Current /C/E ≥ (Vcc -0.2V) VIN ≥ (VCC -0.2V) or ≤ 0.2V SYMBOL TYP MAX UNITS NOTES VCC = 2V ICCDR 130 300 µA 14 VCC = 3V ICCDR 210 550 µA 14 ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS Refer to commercial temperature timing parameters for specifications not listed here. (Notes 5, 14) (-40°C ≤ TA ≤ 85°C) DESCRIPTION READ Cycle Output hold from address change Chip Enable to output in Low-Z WRITE Cycle Write disable to output in Low-Z MT5C6401 REV. 12/93 SYM tOH -12 -15 -20 -25 MIN MAX MIN MAX MIN MAX MIN MAX UNITS NOTES tLZCE 2 1 2 1 2 1 2 1 ns ns 7 tLZWE 1 1 1 1 ns 7 5 Micron Semiconductor, Inc., reserves the right to change products or specifications without notice. 1993, Micron Semiconductor, Inc. OBSOLETE 8/31/94 MT5C6401 64K x 1 SRAM AUTOMOTIVE AND EXTENDED TEMPERATURE SPECIFICATIONS (AT AND XT) The following specifications are to be used for Automotive Temperature (AT) and Extended Temperature (XT) MT5C6401 SRAMs. (-40°C ≤ TA ≤ 125°C - AT) (-55°C ≤ TA ≤ 125°C - XT) MAX DESCRIPTION CONDITIONS SYMBOL -12 -15 -20 -25 Power Supply Current: Operating /C/E ≤ VIL; VCC = MAX f = MAX = 1/ tRC outputs open UNITS NOTES ICC 185 175 150 140 mA 3, 13 Power Supply Current: Standby /C/E ≥ VIH; VCC = MAX f = MAX = 1/ tRC outputs open ISB1 50 45 40 40 mA 13 /C/E ≥ VCC -0.2V; VCC = MAX VIN ≤ VSS +0.2V or VIN ≥ VCC -0.2V; f = 0 ISB2 5 5 5 5 mA 13 DATA RETENTION ELECTRICAL CHARACTERISTICS (L version only) DESCRIPTION CONDITIONS Data Retention Current /C/E ≥ (Vcc -0.2V) VIN ≥ (VCC -0.2V) or ≤ 0.2V SYMBOL TYP MAX UNITS NOTES VCC = 2V ICCDR 130 300 µA 14 VCC = 3V ICCDR 210 550 µA 14 ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS Refer to commercial temperature timing parameters for specifications not listed here. (Notes 5, 14) (-40°C ≤ TA ≤ 125°C; -55°C ≤ TA ≤ 125°C; VCC = 5V ±10%) DESCRIPTION READ Cycle Output hold from address change Chip Enable to output in Low-Z WRITE Cycle Write disable to output in Low-Z MT5C6401 REV. 12/93 SYM tOH -12 -15 -20 -25 MIN MAX MIN MAX MIN MAX MIN MAX UNITS NOTES tLZCE 2 1 2 1 2 1 2 1 ns ns 7 tLZWE 1 1 1 1 ns 7 6 Micron Semiconductor, Inc., reserves the right to change products or specifications without notice. 1993, Micron Semiconductor, Inc. OBSOLETE 8/31/94 MT5C6401 64K x 1 SRAM AC TEST CONDITIONS +5V +5V 480 480 Input pulse levels ................................... Vss to 3.0V Q Q Input rise and fall times ....................................... 3ns 30 pF 255 5 pF 255 Input timing reference levels ............................. 1.5V Output reference levels ..................................... 1.5V Fig. 1 OUTPUT LOAD EQUIVALENT Output load .............................. See Figures 1 and 2 Fig. 2 OUTPUT LOAD EQUIVALENT NOTES 8. W ? /E is HIGH for READ cycle. 9. Device is continuously selected. All chip enables are held in their active state. 10. Address valid prior to, or coincident with, latest occurring chip enable. 11. tRC = Read Cycle Time. 12. Chip enable and write enable can initiate and terminate a WRITE cycle. 13. Typical values are measured at 5V, 25°C and 15ns cycle time. 14. Typical currents are measured at 25°C. 1. 2. 3. 4. 5. All voltages referenced to VSS (GND). -3V for pulse width < tRC/2. ICC is dependent on output loading and cycle rates. This parameter is sampled. Test conditions as specified with the output loading as shown in Fig. 1 unless otherwise noted. 6. tHZCE and tHZWE are specified with CL = 5pF as in Fig. 2. Transition is measured ±500mV from steady state voltage. 7. At any given temperature and voltage condition, tHZCE is less than tLZCE and tHZWE is less than tLZWE DATA RETENTION ELECTRICAL CHARACTERISTICS (L version only) DESCRIPTION CONDITIONS SYMBOL MIN VDR 2 VCC for Retention Data Data Retention Current / /E ≥ (Vcc -0.2V) C VIN ≥ (VCC -0.2V) or ≤ 0.2V VCC = 2V VCC = 3V Chip Deselect to Data Retention Time Operation Recovery Time MT5C6401 REV. 12/93 7 TYP MAX UNITS NOTES ICCDR 130 300 µA 14 ICCDR 210 400 µA 14 V tCDR 0 ns 4 tR tRC ns 4, 11 Micron Semiconductor, Inc., reserves the right to change products or specifications without notice. 1993, Micron Semiconductor, Inc. OBSOLETE 8/31/94 MT5C6401 64K x 1 SRAM , LOW VCC DATA RETENTION WAVEFORM DATA RETENTION MODE 4.5V Vcc 4.5V VDR tCDR CE , tR VDR VIH VIL READ CYCLE NO. 1 8, 9 tRC ADDR VALID tAA tOH Q PREVIOUS DATA VALID ,, DATA VALID READ CYCLE NO. 2 7, 8, 10 tRC CE tACE tLZCE DQ HIGH-Z tPU , Icc tHZCE DATA VALID ,, tPD ,, DON’T CARE UNDEFINED MT5C6401 REV. 12/93 8 Micron Semiconductor, Inc., reserves the right to change products or specifications without notice. 1993, Micron Semiconductor, Inc. OBSOLETE 8/31/94 MT5C6401 64K x 1 SRAM WRITE CYCLE NO. 1 12 (Chip Enable Controlled) tWC , , , , , , , , , , , , , ,, ADDR tAW tAS tCW tAH CE tWP WE tDS tDH DATA VALID D HIGH-Z Q WRITE CYCLE NO. 2 7, 12 (Write Enable Controlled) , , , , ,, ,, , ,,, , , , , , , , , , , , , , ,, ,,,,,, ,,, ,, tWC ADDR tAW tCW tAH CE tAS tWP WE tDS tDH DATA VALID D tHZWE tLZWE HIGH-Z Q DON’T CARE UNDEFINED MT5C6401 REV. 12/93 9 Micron Semiconductor, Inc., reserves the right to change products or specifications without notice. 1993, Micron Semiconductor, Inc. OBSOLETE 8/31/94 MT5C6401 64K x 1 SRAM 22-PIN PLASTIC DIP 1.033 (26.24) 1.027 (26.09 ) PIN 1 PIN #1 INDEX .170 (4.32) .155 (3.94) .062 (1.57) .050 (1.27) .100 (2.54) .021 (0.53) .016 (0.41) TYP 1.000 (25.38) TYP NOTE: MT5C6401 REV. 12/93 .140 (3.56) .120 (3.05) .145 (3.68) .135 (3.43) SEATING PLANE .257 (6.53) .251 (6.38) .325 (8.26) .300 (7.62) .014 (0.36) .008 (0.20) .380 (9.65) .330 (8.38) 1. All dimensions in inches (millimeters) MAX or typical where noted. MIN 2. Package width and length do not include mold protrusion; allowable mold protrusion is .01" per side. 10 Micron Semiconductor, Inc., reserves the right to change products or specifications without notice. 1993, Micron Semiconductor, Inc. OBSOLETE 8/31/94 MT5C6401 64K x 1 SRAM 24-PIN PLASTIC SOJ .629 (15.98) .623 (15.82) .305 (7.75) .299 (7.59) .340 (8.64) .330 (8.38) PIN #1 INDEX .050 (1.27) TYP .550 (13.97) .032 (0.81) .026 (0.66) 30° .118 (3.00) .108 (2.74) .145 (3.68) .132 (3.35) .025 (0.64) SEATING PLANE .037 (0.94) MAX DAMBAR PROTRUSION NOTE: .020 (0.51) .015 (0.38) .095 (2.41) .080 (2.03) .275 (6.99) .260 (6.60) 1. All dimensions in inches (millimeters) MAX or typical where noted. MIN 2. Package width and length do not include mold protrusion; allowable mold protrusion is .01" per side. 8000 S. Federal Way, P.O. Box 6, Boise, ID 83707-0006, Tel: 208-368-3900 E-mail: [email protected], Internet: http://www.micron.com, Customer Comment Line: 800-932-4992 Micron is a registered trademark of Micron Technology, Inc. MT5C6401 REV. 12/93 11 Micron Semiconductor, Inc., reserves the right to change products or specifications without notice. 1993, Micron Semiconductor, Inc.