CFK2062-P3 QNX@š•@RNP@gh¡ KSP@‡b“@p•žˆ˜@g„a™@fet mŒ“ŒŸ@b˜•„‡…„”‡L@i”†N@QPWYU@r•†‘’ˆ @r‡NL@h•›™š•”L@tˆŸ„™@WWPYY tˆ’Z@RXQNYXXNTVPP@@f„ŸZ@RXQNYXXNTVQU@@žžžN“Œ“ŒŸ…˜•„‡…„”‡N†•“ ÐRPPU@mŒ“ŒŸ@b˜•„‡…„”‡L@i”†N CFK2062-P3 Product Specifications July 1997 (1 of 4) 1.8 to 2.0 GHz +30 dBm Power GaAs FET Features ❏ High Gain ❏ +30 dBm Power Output ❏ Proprietary Power FET Process ❏ >40% Linear Power Added Efficiency ❏ Surface Mount SO-8 Power Package Package Diagram G GND GND G 1 2 3 4 Back Plane is Source Applications ❏ PCS/PCN Base Stations and Terminals ❏ Wireless Local Loop 8 7 6 5 D GND GND D Description The CFK2062-P3 is a high-gain FET intended for driver amplifier applications in high-power systems, and output stage usage in medium power applications at power levels up to +30 dBm. The device is easily matched and provides excellent linearity at 1 Watt. Manufactured in Celeritek’s proprietary Specifications (TA = 25°C) The following specifications are guaranteed at room temperature in Celeritek test fixture at 1.95 GHz. Parameters Conditions Min Vd = 8V, Id = 400 mA (Quiescent) P-1dB SSG 3rd Order Products (1) Efficiency @ P1dB Vd = 5V, Id = 600 mA (Quiescent) P-1dB SSG Typ Max Units 30.0 31.0 — dBm 13.5 14.5 — dB — — 30 40 — — dBc % — 30.5 — dBm — 13.5 — dB Parameters Conditions Min Typ Max Units gm Idss Vp BVGD ΘJL (2) Vds = 2.0V, Vgs = 0V Vds = 2.0V, Vgs = 0V Vds = 3.0V, Ids = 25 mA Igd = 2.5 mA @150°C TCH — — — 15 — 650 1.4 -1.8 17 12 — — mS A Volts Volts °C/W — — power FET process, this device is assembled in an industry standard surface mount SO-8 power package that is compatible with high volume, automated board assembly techniques. SO-8 Power Package Physical Dimensions Absolute Maximum Ratings Parameter Drain-Source Voltage Gate-Source Voltage Drain Current Continuous Dissipation Channel Temperature Storage Temperature 3236 Scott Boulevard Symbol Rating VDS VGS IDS PT TCH TSTG 10V (3) -5V Idss 6W 175°C -65°C to +175°C Santa Clara, California 95054 Notes: 1. Sum to two tones with 1 MHz spacing = 25 dBm. 2. See thermal considerations information on page 4. 3. Maximum potential difference across the device (Vd + Vg) cannot exceed 12V. Phone: (408) 986-5060 Fax: (408) 986-5095 Product Specifications - July 1997 CFK2062-P3 Typical Scattering Parameters Frequency (GHz) 0.6 1.0 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2.0 2.1 2.2 3.0 3.5 4.0 (2 of 4) (TA = 25°C, Vds = 5 V, Ids = 600 mA) S1 S 22 Mag 0.927 0.914 0.908 0.904 0.9 0.897 0.893 0.889 0.866 0.883 0.78 0.879 0.917 0.932 0.913 S2 1 Ang -129.75 -154.69 -162.37 -164.19 -166.3 -168.59 -171.31 -174.42 -178.39 177.09 171.92 166.48 135.01 137.14 143.42 S1 1 Mag Ang Mag 8.7 5.449 4.423 4.225 4.066 3.947 3.847 3.768 3.693 3.605 3.504 3.386 2.081 1.635 1.641 102.7 84.82 76.85 74.15 71.35 68.38 65.08 61.32 57.12 52.62 48.01 42.82 13.19 8.18 3.36 0.024 0.025 0.027 0.028 0.029 0.03 0.032 0.033 0.035 0.05 0.035 0.036 0.03 0.028 0.032 Ang Mag 2 Ang 21.95 8.72 4.79 2.63 2.62 -0.23 -1.99 -5.24 -8.52 -10.6 -14.75 -18.18 -41.27 -41.69 -41.15 0.576 0.6 0.588 0.578 0.567 0.555 0.542 0.53 0.52 0.512 0.508 0.509 0.623 0.643 0.557 -178.45 175.04 172.66 171.66 170.4 168.55 166.26 163.11 159.17 154.61 149.35 143.77 118.42 124.18 131.38 17.07 6.34 0.5 1.6 -0.36 -3.35 -4.87 -7.72 -9.68 -13.77 -16.17 -21.9 -46.6 -43.86 -43.95 0.521 0.548 0.538 0.53 0.519 0.507 0.496 0.483 0.472 0.463 0.458 0.458 0.579 0.611 0.541 -174.04 178.8 176.86 176.13 174.97 173.4 171.26 168.5 164.9 160.21 154.9 149.35 121.99 128.44 137.64 (TA = 25°C, Vds = 8 V, Ids = 400 mA) 0.6 1.0 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2.0 2.1 2.2 3.0 3.5 4.0 0.91 0.904 0.899 0.897 0.892 0.891 0.886 0.883 0.88 0.877 0.873 0.874 0.915 0.93 0.912 -131.25 -155.33 -167.2 -164.68 -166.63 -168.82 -171.54 -174.77 -178.6 176.74 171.86 166.29 135.06 137.37 143.75 9.129 5.68 4.574 4.366 4.203 4.063 3.951 3.86 3.783 3.696 3.589 3.46 2.136 1.662 1.642 100.5 82.61 74.6 71.76 68.96 65.99 62.5 58.87 54.83 50.36 45.5 40.56 10.26 4.59 -0.35 Vg RF IN 100 pF 100 nH 50 Ω Vd 0.1 µF 47 nH 2.4 Ω 0.1 µF uuuu 91 Ω uuuu RF Match Data shown in the performance graphs was taken in the test circuit shown at right. Layout is important for proper operation. Phase length of input and output 50Ω line varies as a function of exact desired frequency of operation. Output shunt inductor effects output performance. Celeritek recommends the use of a high impedance printed inductor Lambda/4 in length. Please contact the factory for an evaluation board and/or more detailed application support. 0.026 0.027 0.028 0.029 0.03 0.031 0.032 0.034 0.034 0.035 0.036 0.037 0.031 0.027 0.031 50 Ω RF OUT 100 pF 2.7 pF 3.9 pF CFK2062-P3, 8V, 400 mA 3236 Scott Boulevard, Santa Clara, California 95054 Phone: (408) 986-5060 Fax: (408) 986-5095 CFK2062-P3 Product Specifications - July 1997 (3 of 4) Typical Performance 50 20 15 10 0 5 10 15 Power Input (dBm) 20 Power Output and Gain vs Frequency VDS =8V, I DS = 400 mA 32 14 30 13 Gain 29 12 28 1.8 1.9 1.95 Frequency, GHz 14 Gain 25 13 22 12 4 3236 Scott Boulevard 5 6 Volts 7 8 11 Santa Clara, California 95054 Power Output @ P-1 dB 15 19 5 10 15 Power Input (dBm) 20 25 15 14 31 Power Output 13 30 Gain 12 29 11 1.85 1.9 1.95 Frequency, GHz 2.0 Power Output and Gain vs Voltage @ 1.95 GHz IDS = 600 mA 16 28 0 0 1.8 Power Output 31 10 15 28 Gain @ P -1 dB Power Output @ P-1 dB 34 20 Efficiency 2.0 Power Output and Gain vs Voltage @ 1.95 GHz IDS = 400 mA 3 20 32 11 1.85 30 Power Output and Gain vs Frequency VDS =5V, I DS = 600 mA 15 Power Output 31 25 10 25 Power Output @ P -1 dB 0 40 Power Output Gain @ P -1 dB 20 30 36 17 33 16 Power Output 15 30 27 14 Gain Gain @ P-1 dB 30 Efficiency Power Output (dBm) 25 10 Power Output @ P-1 dB 40 Power Output Efficiency (%) 30 50 35 Gain @ P-1 dB Power Output (dBm) 35 Power Output & Power Added Efficiency vs Power Input 1.95 GHz, VDS = 5 V, IDS = 600 mA Efficiency (%) Power Output & Power Added Efficiency vs Power Input 1.95 GHz, VDS = 8 V, IDS = 400 mA 13 24 21 12 3 4 5 6 7 8 Volts Phone: (408) 986-5060 Fax: (408) 986-5095 Product Specifications - July 1997 CFK2062-P3 (4 of 4) Thermal Considerations The data shown was taken on a 31 mil thick FR-4 board with 1 ounce copper on both sides. The board was mounted to a baseplate with 3 screws as shown. The screws bring the top side copper temperature to the same value as the baseplate. The thermal resistance to the indicated reference lead, ΘJL, is 12°C/W. The thermal resistance to the reference screw is 14°C/W. 1. Use 1 or 2 ounce copper if possible. 2. Solder all eight leads of the CFK2062-P3 package to the appropriate electrical connection. 3. Solder the copper pad on the backside of the CFK2062-P3 package to the ground plane. 4. Use a large ground pad area with many plated through-holes as shown. 5. If possible, use at least one screw no more than 0.2 inches from the CFK2062-P3 package to provide a low thermal resistance path to the baseplate of the package. Ordering Information The CFK2062-P3 power stage is available in a SO-8 surface mount package. Devices are available in tape and reel. Ordering part numbers are listed. Part Number for Ordering CFK2062-P3 CFK2062-P3-000T Function 1.8 - 2.0 GHz Power Stage 1.8 - 2.0 GHz Power Stage Package SO-8 surface mount power package SO-8 surface mount power package in tape and reel Celeritek reserves the right to make changes without further notice to any products herein. Celeritek makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Celeritek assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different applications. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Celeritek does not convey any license under its patent rights nor the rights of others. Celeritek products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Celeritek product could create a situation where personal injury or death may occur. Should Buyer purchase or use Celeritek products for any such unintended or unauthorized application, Buyer shall indemnify and hold Celeritek and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Celeritek was negligent regarding the design or manufacture of the part. Celeritek is a registered trademark of Celeritek, Inc. Celeritek, Inc. is an Equal Opportunity/Affirmative Action Employer. 3236 Scott Boulevard, Santa Clara, California 95054 Phone: (408) 986-5060 Fax: (408) 986-5095