NanoAmp Solutions, Inc. 670 North McCarthy Blvd. Suite 220, Milpitas, CA 95035 ph: 408-935-7777, FAX: 408-935-7770 www.nanoamp.com N04L1618C2A 4Mb Ultra-Low Power Asynchronous CMOS SRAM 256Kx16 bit Overview Features The N04L1618C2A is an integrated memory device containing a 4 Mbit Static Random Access Memory organized as 262,144 words by 16 bits. The device is designed and fabricated using NanoAmp’s advanced CMOS technology to provide both high-speed performance and ultra-low power. The base design is the same as NanoAmp’s N04L163WC1A, which is processed to operate at higher voltages. The device operates with two chip enable (CE1 and CE2) controls and output enable (OE) to allow for easy memory expansion. Byte controls (UB and LB) allow the upper and lower bytes to be accessed independently and can also be used to deselect the device. The N04L1618C2A is optimal for various applications where low-power is critical such as battery backup and hand-held devices. The device can operate over a very wide temperature range of -40oC to +85oC and is available in JEDEC standard packages compatible with other standard 256Kb x 16 SRAMs • Single Wide Power Supply Range 1.65 to 2.2 Volts • Very low standby current 0.5µA at 1.8V (Typical) • Very low operating current 0.7mA at 1.8V and 1µs (Typical) • Low Page Mode operating current 0.5mA at 1.8V and 1µs (Typical) • Simple memory control Dual Chip Enables (CE1 and CE2) Byte control for independent byte operation Output Enable (OE) for memory expansion • Low voltage data retention Vcc = 1.2V • Very fast output enable access time 25ns OE access time • Automatic power down to standby mode • TTL compatible three-state output driver • Compact space saving BGA package available Product Family Part Number Package Type N04L1618C2AB 48 - BGA N04L1618C2AB2 48-BGA Green Operating Temperature Power Supply (Vcc) Speed Standby Operating Current (ISB), Current (Icc), Typical Typical 70ns @ 1.8V oC -40 to +85oC 1.65V - 2.2V 85ns @ 1.65V 0.5 µA 0.7 mA @ 1MHz (DOC# 14-02-016 REV G ECN# 01-1266) The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. 1 N04L1618C2A NanoAmp Solutions, Inc. Pin Configuration 1 2 3 4 5 6 A LB OE A0 A1 A2 CE2 B I/O8 UB A3 A4 CE1 I/O0 C I/O9 I/O10 A5 A6 I/O1 I/O2 D VSS I/O11 A17 A7 I/O3 VCC E VCC I/O12 NC A16 I/O4 VSS F I/O14 I/O13 A14 A15 I/O5 I/O6 G I/O15 NC A12 A13 WE I/O7 NC A8 A9 A10 A11 NC H 48 Pin BGA (top) 6 x 8 mm Pin Descriptions Pin Name Pin Function A0-A17 Address Inputs WE CE1, CE2 OE LB UB I/O0-I/O15 Write Enable Input Chip Enable Input Output Enable Input Lower Byte Enable Input Upper Byte Enable Input Data Inputs/Outputs VCC Power VSS Ground NC Not Connected (DOC# 14-02-016 REV G ECN# 01-1266) The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. N04L1618C2A NanoAmp Solutions, Inc. Functional Block Diagram Word Address Decode Logic Address Inputs A4 - A17 Page Address Decode Logic 16K Page x 16 word x 16 bit RAM Array Input/ Output Mux and Buffers Word Mux Address Inputs A0 - A3 I/O0 - I/O7 I/O8 - I/O15 CE1 CE2 WE OE UB LB Control Logic Functional Description CE1 CE2 WE OE UB LB I/O0 - I/O151 MODE POWER H X X X X X High Z Standby2 Standby X L X X X X High Z Standby2 Standby X X X X H H High Z Standby2 Standby L H L X3 L1 L1 Data In Write3 Active -> Standby4 L H H L L1 L1 Data Out Read Active -> Standby4 L H H H L1 L1 High Z Active Standby4 1. When UB and LB are in select mode (low), I/O0 - I/O15 are affected as shown. When LB only is in the select mode only I/O0 - I/O7 are affected as shown. When UB is in the select mode only I/O8 - I/O15 are affected as shown. 2. When the device is in standby mode, control inputs (WE, OE, UB, and LB), address inputs and data input/outputs are internally isolated from any external influence and disabled from exerting any influence externally. 3. When WE is invoked, the OE input is internally disabled and has no effect on the circuit. 4. The device will consume active power in this mode whenever addresses are changed. Data inputs are internally isolated from any expernal influence. Capacitance1 Item Symbol Test Condition Max Unit 25oC Min 8 pF 8 pF Input Capacitance CIN VIN = 0V, f = 1 MHz, TA = I/O Capacitance CI/O VIN = 0V, f = 1 MHz, TA = 25oC 1. These parameters are verified in device characterization and are not 100% tested (DOC# 14-02-016 REV G ECN# 01-1266) The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. N04L1618C2A NanoAmp Solutions, Inc. Absolute Maximum Ratings1 Item Symbol Rating Unit Voltage on any pin relative to VSS VIN,OUT –0.3 to VCC+0.3 V Voltage on VCC Supply Relative to VSS VCC –0.3 to 3.0 V Power Dissipation PD 500 mW Storage Temperature TSTG –40 to 125 o Operating Temperature TA -40 to +85 oC Soldering Temperature and Time TSOLDER 10sec(Lead only) oC 240oC, C 1. Stresses greater than those listed above may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operating section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Operating Characteristics (Over Specified Temperature Range) Min. Typ1 Max Unit 1.65 1.8 2.2 V 1.2 2.2 V VIH 0.7VCC VCC+0.3 V Input Low Voltage VIL –0.3 0.3VCC V Output High Voltage VOH IOH = 0.2mA Output Low Voltage VOL IOL = -0.2mA 0.3 V Input Leakage Current ILI VIN = 0 to VCC 0.5 µA Output Leakage Current ILO OE = VIH or Chip Disabled 0.5 µA Read/Write Operating Supply Current @ 1 µs Cycle Time2 ICC1 VCC=2.2V, VIN=VIH or VIL Chip Enabled, IOUT = 0 0.7 3.0 mA Read/Write Operating Supply Current @ 70 ns Cycle Time2 ICC2 VCC=2.2V, VIN=VIH or VIL Chip Enabled, IOUT = 0 8.0 17.0 mA Page Mode Operating Supply Current @ 70ns Cycle Time2 (Refer to Power Savings with Page Mode Operation diagram) ICC3 VCC=2.2V, VIN=VIH or VIL Chip Enabled, IOUT = 0 4.0 Read/Write Quiescent Operating Supply Current3 ICC4 VCC=2.2V, VIN=VIH or VIL Chip Enabled, IOUT = 0, f=0 ISB1 VIN = VCC or 0V Chip Disabled tA= 85oC, VCC = 2.2V Item Symbol Supply Voltage VCC Data Retention Voltage VDR Input High Voltage Maximum Standby Current3 Maximum Data Retention Current3 IDR Test Conditions Chip Disabled3 VCC = 1.2V, VIN = VCC or 0 Chip Disabled, tA= 85oC VCC–0.2 V 0.5 mA 10 µA 10.0 µA 10 µA 1. Typical values are measured at Vcc=Vcc Typ., TA=25°C and not 100% tested. 2. This parameter is specified with the outputs disabled to avoid external loading effects. The user must add current required to drive output capacitance expected in the actual system. 3. This device assumes a standby mode if the chip is disabled (CE1 high or CE2 low). In order to achieve low standby current all inputs must be within 0.2 volts of either VCC or VSS. (DOC# 14-02-016 REV G ECN# 01-1266) The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. N04L1618C2A NanoAmp Solutions, Inc. Power Savings with Page Mode Operation (WE = VIH) Page Address (A4 - A17) Word Address (A0 - A3) Open page Word 1 Word 2 ... Word 16 CE1 CE2 OE LB, UB Note: Page mode operation is a method of addressing the SRAM to save operating current. The internal organization of the SRAM is optimized to allow this unique operating mode to be used as a valuable power saving feature. The only thing that needs to be done is to address the SRAM in a manner that the internal page is left open and 16-bit words of data are read from the open page. By treating addresses A0-A3 as the least significant bits and addressing the 16 words within the open page, power is reduced to the page mode value which is considerably lower than standard operating currents for low power SRAMs. (DOC# 14-02-016 REV G ECN# 01-1266) The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. N04L1618C2A NanoAmp Solutions, Inc. Timing Test Conditions Item Input Pulse Level 0.1VCC to 0.9 VCC Input Rise and Fall Time 5ns Input and Output Timing Reference Levels 0.5 VCC Output Load 30pF Operating Temperature -40 to +85 oC Timing 1.65 - 2.2 V 1.8 - 2.2 V Item Symbol Read Cycle Time tRC Address Access Time tAA 85 70 ns Chip Enable to Valid Output tCO 85 70 ns Output Enable to Valid Output tOE 30 25 ns Byte Select to Valid Output tLB, tUB 85 70 ns Chip Enable to Low-Z output tLZ 10 10 ns Output Enable to Low-Z Output tOLZ 5 5 ns Byte Select to Low-Z Output tLBZ, tUBZ 10 10 ns Chip Disable to High-Z Output tHZ 10 30 10 25 ns Output Disable to High-Z Output tOHZ 10 30 10 25 ns Byte Select Disable to High-Z Output tLBHZ, tUBHZ 10 30 10 25 ns Output Hold from Address Change tOH 5 5 ns Write Cycle Time tWC 85 70 ns Chip Enable to End of Write tCW 50 40 ns Address Valid to End of Write tAW 50 40 ns Byte Select to End of Write tLBW, tUBW 50 40 ns Write Pulse Width tWP 50 40 ns Address Setup Time tAS 0 0 ns Write Recovery Time tWR 0 0 ns Write to High-Z Output tWHZ Data to Write Time Overlap tDW 40 40 ns Data Hold from Write Time tDH 0 0 ns End Write to Low-Z Output tOW 10 10 ns Min. Max. 85 Min. Max. Units 70 25 ns 20 (DOC# 14-02-016 REV G ECN# 01-1266) The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. ns N04L1618C2A NanoAmp Solutions, Inc. Timing of Read Cycle (CE1 = OE = VIL, WE = CE2 = VIH) tRC Address tAA tOH Data Out Previous Data Valid Data Valid Timing Waveform of Read Cycle (WE=VIH) tRC Address tAA tHZ CE1 tCO CE2 tLZ tOHZ tOE OE tOLZ tLB, tUB LB, UB tLBLZ, tUBLZ Data Out High-Z tLBHZ, tUBHZ Data Valid (DOC# 14-02-016 REV G ECN# 01-1266) The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. N04L1618C2A NanoAmp Solutions, Inc. Timing Waveform of Write Cycle (WE control) tWC Address tWR tAW CE1 tCW CE2 tLBW, tUBW LB, UB tAS tWP WE tDW High-Z tDH Data Valid Data In tWHZ tOW High-Z Data Out Timing Waveform of Write Cycle (CE1 Control) tWC Address tAW CE1 (for CE2 Control, use inverted signal) tWR tCW tAS tLBW, tUBW LB, UB tWP WE tDW Data Valid Data In tLZ Data Out tDH tWHZ High-Z (DOC# 14-02-016 REV G ECN# 01-1266) The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. N04L1618C2A NanoAmp Solutions, Inc. Ball Grid Array Package 0.28±0.05 1.24±0.10 D A1 BALL PAD CORNER (3) 1. 0.35±0.05 DIA. E 2. SEATING PLANE - Z 0.15 Z 0.05 TOP VIEW SIDE VIEW 1. DIMENSION IS MEASURED AT THE A1 BALL PAD MAXIMUM SOLDER BALL DIAMETER. CORNER PARALLEL TO PRIMARY Z. SD e SE 2. PRIMARY DATUM Z AND SEATING PLANE ARE DEFINED BY THE SPHERICAL CROWNS OF THE SOLDER BALLS. 3. A1 BALL PAD CORNER I.D. TO BE MARKED BY INK. K TYP J TYP e BOTTOM VIEW Dimensions (mm) e = 0.75 D 6±0.10 SD SE J K BALL MATRIX TYPE 0.375 0.375 1.125 1.375 FULL E 8±0.10 (DOC# 14-02-016 REV G ECN# 01-1266) The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. Z N04L1618C2A NanoAmp Solutions, Inc. Ordering Information N04L1618C2AX-XX X Temperature Performance Package Type I = Industrial, -40°C to 85°C 70 = 70ns B = 48-ball BGA B2 = 48-ball BGA Green (RoHS compliant) Revision History Revision Date Change Description A Sept. 19 2000 Productiona Release B Mar. 2001 Changed BGA package dimensions to 6x8 mm, other minor edits C May. 2001 Corrected BGA mechanical drawing dimension K D Dec. 2001 Part number change from EM256W16, modified Overview and Features, added Page Mode Operation diagram and Ordering Information diagram, revised Operating Characteristics table, Package diagram and Functional Description table E Nov. 2002 Replaced Isb and Icc on Product Family table with typical values F May 2003 Deleted TSOP package option G Nov. 2005 Added Green Package Part Number & RoHS compliant © 2003 Nanoamp Solutions, Inc. All rights reserved. NanoAmp Solutions, Inc. ("NanoAmp") reserves the right to change or modify the information contained in this data sheet and the products described therein, without prior notice. NanoAmp does not convey any license under its patent rights nor the rights of others. Charts, drawings and schedules contained in this data sheet are provided for illustration purposes only and they vary depending upon specific applications. NanoAmp makes no warranty or guarantee regarding suitability of these products for any particular purpose, nor does NanoAmp assume any liability arising out of the application or use of any product or circuit described herein. NanoAmp does not authorize use of its products as critical components in any application in which the failure of the NanoAmp product may be expected to result in significant injury or death, including life support systems and critical medical instruments. (DOC# 14-02-016 REV G ECN# 01-1266) The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.