NSC LP38691SD-1.8

January 2005
LP38691/LP38693
500mA Low Dropout CMOS Linear Regulators
Stable with Ceramic Output Capacitors
General Description
Features
The LP38691/3 low dropout CMOS linear regulators provide
tight output tolerance (2.0% typical), extremely low dropout
voltage (250 mV @ 500mA load current, VOUT = 5V), and
excellent AC performance utilizing ultra low ESR ceramic
output capacitors.
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The low thermal resistance of the LLP, SOT-223 and T0-252
packages allow the full operating current to be used even in
high ambient temperature environments.
The use of a PMOS power transistor means that no DC base
drive current is required to bias it allowing ground pin current
to remain below 100 µA regardless of load current, input
voltage, or operating temperature.
Dropout Voltage: 250 mV (typ) @ 500mA (typ. 5V out).
Ground Pin Current: 55 µA (typ) at full load.
Precision Output Voltage: 2.0% (25˚C) accuracy.
2.0% output accuracy (25˚C)
Low dropout voltage: 250 mV @ 500mA (typ, 5V out)
Wide input voltage range (2.7V to 10V)
Precision (trimmed) bandgap reference
Guaranteed specs for -40˚C to +125˚C
1µA off-state quiescent current
Thermal overload protection
Foldback current limiting
T0-252, SOT-223 and 6-Lead LLP packages
Enable pin (LP38693)
Applications
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Hard Disk Drives
Notebook Computers
Battery Powered Devices
Portable Instrumentation
Typical Application Circuits
20126501
20126502
Note: * Minimum value required for stability.
**LLP package devices only.
© 2005 National Semiconductor Corporation
DS201265
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LP38691/LP38693 500mA Low Dropout CMOS Linear Regulators
Stable with Ceramic Output Capacitors
PRELIMINARY
LP38691/LP38693
Connection Diagrams
20126503
TO-252, Top View
LP38691DT-X.X
20126504
SOT-223, Top View
LP38693MP-X.X
20126505
20126506
6-Lead LLP, Bottom View
LP38691SD-X.X
6-Lead LLP, Bottom View
LP38693SD-X.X
Pin Description
PIN
DESCRIPTION
VIN
This is the input supply voltage to the regulator. For LLP devices, both VIN pins must be tied
together for full current operation (250mA maximum per pin).
GND
Circuit ground for the regulator. This is connected to the die through the lead frame, and also
functions as the heat sink when the large ground pad is soldered down to a copper plane.
SNS
Output sense pin allows remote sensing at the load which will eliminate the error in output
voltage due to voltage drops caused by the resistance in the traces between the regulator and
the load. This pin must be tied to VOUT.
VEN
The enable pin allows the part to be turned ON and OFF by pulling this pin high or low.
VOUT
Regulated output voltage
Ordering Information
Order Number
Package Marking
Package Type
Package Drawing
Supplied As
LP38691SD-1.8
L118B
6-Lead LLP
SDE06A
1000 Units Tape and Reel
LP38691SD-2.5
L119B
6-Lead LLP
SDE06A
1000 Units Tape and Reel
LP38691SD-3.3
L120B
6-Lead LLP
SDE06A
1000 Units Tape and Reel
LP38691SD-5.0
L121B
6-Lead LLP
SDE06A
1000 Units Tape and Reel
LP38691DT-1.8
LP38691DT-1.8
TO-252
TD03B
Available Soon
LP38691DT-2.5
LP38691DT-2.5
TO-252
TD03B
Available Soon
LP38691DT-3.3
LP38691DT-3.3
TO-252
TD03B
Available Soon
LP38691DT-5.0
LP38691DT-5.0
TO-252
TD03B
Available Soon
LP38693SD-1.8
L128B
6-Lead LLP
SDE06A
1000 Units Tape and Reel
LP38693SD-2.5
L129B
6-Lead LLP
SDE06A
1000 Units Tape and Reel
LP38693SD-3.3
L130B
6-Lead LLP
SDE06A
1000 Units Tape and Reel
LP38693SD-5.0
L131B
6-Lead LLP
SDE06A
1000 Units Tape and Reel
LP38693MP-1.8
LJVB
SOT-223
MP05A
1000 Units Tape and Reel
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(Continued)
Order Number
Package Marking
Package Type
Package Drawing
Supplied As
LP38693MP-2.5
LJXB
SOT-223
MP05A
1000 Units Tape and Reel
LP38693MP-3.3
LJYB
SOT-223
MP05A
1000 Units Tape and Reel
LP38693MP-5.0
LJZB
SOT-223
MP05A
1000 Units Tape and Reel
LP38691SDX-1.8
L118B
6-Lead LLP
SDE06A
4500 Units Tape and Reel
LP38691SDX-2.5
L119B
6-Lead LLP
SDE06A
4500 Units Tape and Reel
LP38691SDX-3.3
L120B
6-Lead LLP
SDE06A
4500 Units Tape and Reel
LP38691SDX-5.0
L121B
6-Lead LLP
SDE06A
4500 Units Tape and Reel
LP38691DTX-1.8
LP38691DT-1.8
TO-252
TD03B
Available Soon
LP38691DTX-2.5
LP38691DT-2.5
TO-252
TD03B
Available Soon
LP38691DTX-3.3
LP38691DT-3.3
TO-252
TD03B
Available Soon
LP38691DTX-5.0
LP38691DT-5.0
TO-252
TD03B
Available Soon
LP38693SDX-1.8
L128B
6-Lead LLP
SDE06A
4500 Units Tape and Reel
LP38693SDX-2.5
L129B
6-Lead LLP
SDE06A
4500 Units Tape and Reel
LP38693SDX-3.3
L130B
6-Lead LLP
SDE06A
4500 Units Tape and Reel
LP38693SDX-5.0
L131B
6-Lead LLP
SDE06A
4500 Units Tape and Reel
LP38693MPX-1.8
LJVB
SOT-223
MP05A
2000 Units Tape and Reel
LP38693MPX-2.5
LJXB
SOT-223
MP05A
2000 Units Tape and Reel
LP38693MPX-3.3
LJYB
SOT-223
MP05A
2000 Units Tape and Reel
LP38693MPX-5.0
LJZB
SOT-223
MP05A
2000 Units Tape and Reel
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LP38691/LP38693
Ordering Information
LP38691/LP38693
Absolute Maximum Ratings (Note 1)
IOUT
Internally Limited
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Junction Temperature
−40˚C to +150˚C
Storage Temperature Range
Operating Ratings
−65˚C to +150˚C
Lead Temp. (Soldering, 5 seconds)
VIN Supply Voltage
260˚C
ESD Rating (Note 3)
2 kV
Power Dissipation (Note 2)
Internally Limited
V(max) All pins (with respect to GND)
2.7V to 10V
Operating Junction
Temperature Range
−40˚C to +125˚C
-0.3V to 12V
Electrical Characteristics Limits in standard typeface are for TJ = 25˚C, and limits in boldface type apply
over the full operating temperature range. Unless otherwise specified: VIN = VOUT + 1V, CIN = COUT = 10 µF, ILOAD = 10mA.
Min/Max limits are guaranteed through testing, statistical correlation, or design.
Symbol
Parameter
Conditions
100 µA < IL < 0.5A
MIN
TYP
(Note 4)
MAX
-2.0
2.0
-4.0
4.0
Units
VO
Output Voltage Tolerance
∆VO/∆VIN
Output Voltage Line Regulation
(Note 6)
VO + 0.5V ≤ VIN ≤ 10V
IL = 25mA
0.03
0.1
%/V
∆VO/∆IL
Output Voltage Load Regulation
(Note 7)
1 mA < IL < 0.5A
VIN = VO + 1V
1.8
5
%/A
(VO = 2.5V)
IL = 0.1A
IL = 0.5A
80
430
145
725
(VO = 3.3V)
IL = 0.1A
IL = 0.5A
65
330
110
550
(VO = 5V)
IL = 0.1A
IL = 0.5A
45
250
100
450
100
VO + 1V ≤ VIN ≤ 10V
VIN - VOUT
Dropout Voltage (Note 8)
IQ
Quiescent Current
VIN ≤ 10V, IL =100 µA - 0.5A
55
VEN ≤ 0.4V, (LP38693 Only)
0.001
IL(MIN)
Minimum Load Current
VIN - VO ≤ 4V
IFB
Foldback Current Limit
VIN - VO > 5V
350
VIN - VO < 4V
850
VIN = VO + 2V(DC), with 1V(p-p)
/ 120Hz Ripple
55
mV
µA
100
PSRR
Ripple Rejection
TSD
Thermal Shutdown Activation
(Junction Temp)
160
TSD (HYST)
Thermal Shutdown Hysteresis
(Junction Temp)
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%VOUT
mA
dB
˚C
4
Symbol
Parameter
Conditions
MIN
TYP
(Note 4)
en
Output Noise
BW = 10Hz to 10kHz
VO = 3.3V
0.7
VO (LEAK)
Output Leakage Current
VO = VO(NOM) + 1V @ 10VIN
0.5
VEN
Enable Voltage (LP38693 Only)
Output = OFF
IEN
Enable Pin Leakage (LP38693
Only)
MAX
Units
µV/
12
µA
0.4
Output = ON, VIN = 4V
1.8
Output = ON, VIN = 6V
3.0
Output = ON, VIN = 10V
4.0
VEN = 0V or 10V, VIN = 10V
-1
V
0.001
1
µA
Note 1: Absolute maximum ratings indicate limits beyond which damage to the component may occur. Operating ratings indicate conditions for which the device
is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications, see Electrical Characteristics. Specifications do not
apply when operating the device outside of its rated operating conditions.
Note 2: At elevated temperatures, device power dissipation must be derated based on package thermal resistance and heatsink values (if a heatsink is used). The
junction-to-ambient thermal resistance ( θJ-A) for the TO-252 is approximately 90˚C/W for a PC board mounting with the device soldered down to minimum copper
area (less than 0.1 square inch). If one square inch of copper is used as a heat dissipator for the TO-252, the θJ-A drops to approximately 50˚C/W. The SOT-223
package has a θJ-A of approximately 125˚C/W when soldered down to a minimum sized pattern (less than 0.1 square inch) and approximately 70˚C/W when soldered
to a copper area of one square inch. The θJ-A values for the LLP package are also dependent on trace area, copper thickness, and the number of thermal vias used
(refer to application note AN-1187). If power disspation causes the junction temperature to exceed specified limits, the device will go into thermal shutdown.
Note 3: ESD is tested using the human body model which is a 100pF capacitor discharged through a 1.5k resistor into each pin.
Note 4: Typical numbers represent the most likely parametric norm for 25˚C operation.
Note 5: If used in a dual-supply system where the regulator load is returned to a negative supply, the output pin must be diode clamped to ground.
Note 6: Output voltage line regulation is defined as the change in output voltage from nominal value resulting from a change in input voltage.
Note 7: Output voltage load regulation is defined as the change in output voltage from nominal value as the load current increases from 1mA to full load.
Note 8: Dropout voltage is defined as the minimum input to output differential required to maintain the output within 100mV of nominal value.
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LP38691/LP38693
Electrical Characteristics Limits in standard typeface are for TJ = 25˚C, and limits in boldface type apply
over the full operating temperature range. Unless otherwise specified: VIN = VOUT + 1V, CIN = COUT = 10 µF, ILOAD = 10mA.
Min/Max limits are guaranteed through testing, statistical correlation, or design. (Continued)
LP38691/LP38693
Block Diagrams
20126507
FIGURE 1. LP38691 Functional Diagram (LLP)
20126508
FIGURE 2. LP38691 Functional Diagram (TO-252)
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LP38691/LP38693
Block Diagrams
(Continued)
20126509
FIGURE 3. LP38693 Functional Diagram (LLP)
20126510
FIGURE 4. LP38693 Functional Diagram (SOT-223)
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LP38691/LP38693
Typical Performance Characteristics Unless otherwise specified: TJ = 25˚C, CIN = COUT = 10 µF,
enable pin is tied to VIN (LP38693 only), VOUT = 1.8V, VIN = VOUT +1V, IL = 10mA.
Noise vs Frequency
Noise vs Frequency
20126536
20126535
Noise vs Frequency
Ripple Rejection
20126518
20126537
Ripple Rejection
Ripple Rejection
20126520
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20126522
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Line Transient Response
Line Transient Response
20126524
20126526
Line Transient Response
Load Transient Response
20126528
20126542
Load Transient Response
VOUT vs Temperature (5.0V)
20126544
20126530
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LP38691/LP38693
Typical Performance Characteristics Unless otherwise specified: TJ = 25˚C, CIN = COUT = 10 µF,
enable pin is tied to VIN (LP38693 only), VOUT = 1.8V, VIN = VOUT +1V, IL = 10mA. (Continued)
LP38691/LP38693
Typical Performance Characteristics Unless otherwise specified: TJ = 25˚C, CIN = COUT = 10 µF,
enable pin is tied to VIN (LP38693 only), VOUT = 1.8V, VIN = VOUT +1V, IL = 10mA. (Continued)
VOUT vs Temperature (3.3V)
VOUT vs Temperature (2.5V)
20126532
20126531
VOUT vs Temperature (1.8V)
Enable Voltage vs Temperature
20126533
20126552
Load Regulation vs Temperature
Line Regulation vs Temperature
20126553
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20126554
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MIN VIN vs IOUT
Dropout Voltage vs IOUT
20126556
20126557
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LP38691/LP38693
Typical Performance Characteristics Unless otherwise specified: TJ = 25˚C, CIN = COUT = 10 µF,
enable pin is tied to VIN (LP38693 only), VOUT = 1.8V, VIN = VOUT +1V, IL = 10mA. (Continued)
LP38691/LP38693
TANTALUM: Solid Tantalum capacitors have good temperature stability: a high quality Tantalum will typically show a
capacitance value that varies less than 10-15% across the
full temperature range of -40˚C to +125˚C. ESR will vary only
about 2X going from the high to low temperature limits.
Application Hints
EXTERNAL CAPACITORS
Like any low-dropout regulator, external capacitors are required to assure stability. These capacitors must be correctly
selected for proper performance.
PCB LAYOUT
INPUT CAPACITOR: An input capacitor of at least 1µF is
required (ceramic recommended). The capacitor must be
located not more than one centimeter from the input pin and
returned to a clean analog ground.
Good PC layout practices must be used or instability can be
induced because of ground loops and voltage drops. The
input and output capacitors must be directly connected to the
input, output, and ground pins of the regulator using traces
which do not have other currents flowing in them (Kelvin
connect).
The best way to do this is to lay out CIN and COUT near the
device with short traces to the VIN, VOUT, and ground pins.
The regulator ground pin should be connected to the external circuit ground so that the regulator and its capacitors
have a "single point ground".
It should be noted that stability problems have been seen in
applications where "vias" to an internal ground plane were
used at the ground points of the IC and the input and output
capacitors. This was caused by varying ground potentials at
these nodes resulting from current flowing through the
ground plane. Using a single point ground technique for the
regulator and it’s capacitors fixed the problem. Since high
current flows through the traces going into VIN and coming
from VOUT, Kelvin connect the capacitor leads to these pins
so there is no voltage drop in series with the input and output
capacitors.
OUTPUT CAPACITOR: An output capacitor is required for
loop stability. It must be located less than 1 centimeter from
the device and connected directly to the output and ground
pins using traces which have no other currents flowing
through them.
The minimum amount of output capacitance that can be
used for stable operation is 1µF. Ceramic capacitors are
recommended (the LP38691/3 was designed for use with
ultra low ESR capacitors). The LP38691/3 is stable with any
output capacitor ESR between zero and 100 Ohms.
ENABLE PIN (LP38693 only): The LP38693 has an enable
pin which turns the regulator output on and off. Pulling the
enable pin down to a logic low will turn the part off. The
voltage the pin has to be pulled up to in order to assure the
part is on depends on input voltage (refer to Electrical Characteristics section). This pin should be tied to VIN if the
enable function is not used.
Foldback Current Limiting: Foldback current limiting is
built into the LP38691/3 which reduces the amount of output
current the part can deliver as the output voltage is reduced.
The amount of load current is dependent on the differential
voltage between VIN and VOUT. Typically, when this differential voltage exceeds 5V, the load current will limit at about
350 mA. When the VIN - VOUT differential is reduced below
4V, load current is limited to about 850 mA.
RFI/EMI SUSCEPTIBILITY
RFI (radio frequency interference) and EMI (electromagnetic
interference) can degrade any integrated circuit’s performance because of the small dimensions of the geometries
inside the device. In applications where circuit sources are
present which generate signals with significant high frequency energy content ( > 1 MHz), care must be taken to
ensure that this does not affect the IC regulator.
SELECTING A CAPACITOR
It is important to note that capacitance tolerance and variation with temperature must be taken into consideration when
selecting a capacitor so that the minimum required amount
of capacitance is provided over the full operating temperature range.
If RFI/EMI noise is present on the input side of the regulator
(such as applications where the input source comes from the
output of a switching regulator), good ceramic bypass capacitors must be used at the input pin of the IC.
If a load is connected to the IC output which switches at high
speed (such as a clock), the high-frequency current pulses
required by the load must be supplied by the capacitors on
the IC output. Since the bandwidth of the regulator loop is
less than 100 kHz, the control circuitry cannot respond to
load changes above that frequency. This means the effective
output impedance of the IC at frequencies above 100 kHz is
determined only by the output capacitor(s).
In applications where the load is switching at high speed, the
output of the IC may need RF isolation from the load. It is
recommended that some inductance be placed between the
output capacitor and the load, and good RF bypass capacitors be placed directly across the load.
PCB layout is also critical in high noise environments, since
RFI/EMI is easily radiated directly into PC traces. Noisy
circuitry should be isolated from "clean" circuits where possible, and grounded through a separate path. At MHz frequencies, ground planes begin to look inductive and RFI/
EMI can cause ground bounce across the ground plane. In
multi-layer PCB applications, care should be taken in layout
so that noisy power and ground planes do not radiate directly
into adjacent layers which carry analog power and ground.
Capacitor Characteristics
CERAMIC: For values of capacitance in the 10 to 100 µF
range, ceramics are usually larger and more costly than
tantalums but give superior AC performance for bypassing
high frequency noise because of very low ESR (typically less
than 10 mΩ). However, some dielectric types do not have
good capacitance characteristics as a function of voltage
and temperature.
Z5U and Y5V dielectric ceramics have capacitance that
drops severely with applied voltage. A typical Z5U or Y5V
capacitor can lose 60% of its rated capacitance with half of
the rated voltage applied to it. The Z5U and Y5V also exhibit
a severe temperature effect, losing more than 50% of nominal capacitance at high and low limits of the temperature
range.
X7R and X5R dielectric ceramic capacitors are strongly recommended if ceramics are used, as they typically maintain a
capacitance range within ± 20% of nominal over full operating ratings of temperature and voltage. Of course, they are
typically larger and more costly than Z5U/Y5U types for a
given voltage and capacitance.
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OUTPUT NOISE
Attention should be paid to the units of measurement. Spot
noise is measured in units µV/root-Hz or nV/root-Hz and total
output noise is measured in µV(rms)
Noise is specified in two ways: Spot Noise or Output Noise
Density is the RMS sum of all noise sources, measured at
the regulator output, at a specific frequency (measured with
a 1Hz bandwidth). This type of noise is usually plotted on a
curve as a function of frequency. Total Output Noise or
Broad-Band Noise is the RMS sum of spot noise over a
specified bandwidth, usually several decades of frequencies.
The primary source of noise in low-dropout regulators is the
internal reference. Noise can be reduced in two ways: by
increasing the transistor area or by increasing the current
drawn by the internal reference. Increasing the area will
decrease the chance of fitting the die into a smaller package.
Increasing the current drawn by the internal reference increases the total supply current (ground pin current).
(Continued)
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LP38691/LP38693
Application Hints
LP38691/LP38693
Physical Dimensions
inches (millimeters) unless otherwise noted
6-lead, LLP Package
NS Package Number SDE06A
TO-252 Package
NS Package Number TD03B
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14
inches (millimeters) unless otherwise noted (Continued)
SOT-223 Package
NS Package Number MP05A
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves
the right at any time without notice to change said circuitry and specifications.
For the most current product information visit us at www.national.com.
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WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR
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1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body, or
(b) support or sustain life, and whose failure to perform when
properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to result
in a significant injury to the user.
2. A critical component is any component of a life support
device or system whose failure to perform can be reasonably
expected to cause the failure of the life support device or
system, or to affect its safety or effectiveness.
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LP38691/LP38693 500mA Low Dropout CMOS Linear Regulators
Stable with Ceramic Output Capacitors
Physical Dimensions