DS7833/DS8833/DS7835/DS8835 Quad TRI-STATEÉ Bus Transceivers General Description Features This family of TRI-STATE bus transceivers offers extreme versatility in bus organized data transmission systems. The data bus may be unterminated, or terminated DC or AC, at one or both ends. Drivers in the third (high impedance) state load the data bus with a negligible leakage current. The receiver input current is low allowing at least 100 driver/receiver pairs to utilize a single bus. The bus loading is unchanged when VCC e 0V. The receiver incorporates hysteresis to provide greater noise immunity. All devices utilize a high current TRI-STATE output driver. The DS7833/ DS8833 and DS7835/DS8835 employ TRI-STATE outputs on the receiver also. Y The DS7833/DS8833 are non-inverting quad transceivers with a common inverter driver disable control and common inverter receiver disable control. The DS7835/DS8835 are inverting quad transceivers with a common inverter driver disable control and a common inverter receiver disable control. Y Y Y Y Y Y Y Y Receiver hysteresis Receiver noise immunity Bus terminal current for normal VCC or VCC e 0V Receivers Sink Source 400 mV typ 1.4V typ 80 mA max 16 mA at 0.4V max 2.0 mA (Mil) at 2.4V min 5.2 mA (Com) at 2.4V min Drivers Sink 50 mA at 0.5V max 32 mA at 0.4V max Source 10.4 mA (Com) at 2.4V min 5.2 mA (Mil) at 2.4V min Drivers have TRI-STATE outputs DS7833/DS8833, DS7835/DS8835 receivers have TRI-STATE outputs Capable of driving 100X DCÐterminated buses Compatible with Series 54/74 Connection Diagram Dual-In-Line Package Dual-In-Line Package TL/F/5808 – 2 TL/F/5808 – 1 Top View Top View Order Number DS7833J or DS8833N See NS Package Number J16A or N16A Order Number DS7835J or DS8835N See NS Package Number J16A or N16A TRI-STATEÉ is a registered trademark of National Semiconductor Corp. C1996 National Semiconductor Corporation TL/F/5808 RRD-B30M36/Printed in U. S. A. http://www.national.com DS7833/DS8833/DS7835/DS8835 Quad TRI-STATE Bus Transceivers February 1996 Absolute Maximum Ratings (Note 1) Operating Conditions If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage Input Voltage Output Voltage Storage Temperature Maximum Power Dissipation* at 25§ C Cavity Package Molded Package Lead Temperature (Soldering, 4 sec.) Supply Voltage, VCC DS7833/DS7835 DS8833/DS8835 Temperature (TA) DS7833/DS7835 DS8833/DS8835 7.0V 5.5V 5.5V Min Max Units 4.5 4.75 5.5 5.25 V V b 55 a 125 a 70 §C §C 0 b 65§ C to a 150§ C 1509 mW 1476 mW 260§ C *Derate cavity package 10.1 mW/§ C above 25§ C; derate molded package 11.8 mW/§ C above 25§ C. Electrical Characteristics (Notes 2 and 3) Symbol Parameter Conditions Min Typ Max Units DISABLE/DRIVER INPUT VIH VIL IIH High Level Input Voltages VCC e Min Low Level Input Voltage VCC e Min High Level Input Current VCC e Max 2.0 V DS7833, DS8833, DS8835 0.8 DS7835 0.7 V VIN e 2.4V 40 mA VIN e 5.5V 1.0 mA IIL Low Level Input Current VCC e Max, VIN e 0.4V b 1.0 b 1.6 mA VCL Input Clamp Diode VCC e 5.0V, IIN e b12 mA, TA e 25§ C b 0.8 b 1.5 V IIT Driver Low Level Disabled Input Current Driver Disable Input e 2.0V, VIN e 0.4V b 40 mA RECEIVER INPUT/BUS OUTPUT VTH High Level Threshold Voltage VTL Low Level Threshold Voltage IS Bus Current, Output Disabled or High VBUS e 4.0V DS7833, DS7835 1.4 1.75 2.1 V DS8833, DS8835 1.5 1.75 2.0 V DS7833, DS7835 0.8 1.35 1.6 V DS8833, DS8835 0.8 1.35 1.5 V 25 80 mA VCC e Max VCC e 0V VCC e Max, VBUS e 0.4V VOH VOL Logic ‘‘1’’ Output Voltage VCC e Min Logic ‘‘0’’ Output Voltage VCC e Min Output Short Circuit Current VCC e Max, (Note 4) IOUT e b5.2 mA 5.0 80 mA b 2.0 b 40 mA DS7833, DS7835 2.4 2.75 IOUT e b10.4 mA DS8833, DS8835 2.4 2.75 IOUT e 50 mA V 0.28 0.5 V 0.4 V b 40 b 62 b 120 mA IOUT e 32 mA IOS V RECEIVER OUTPUT VOH Logic ‘‘1’’ Output Voltage VCC e Min IOUT e b2.0 mA DS7833, DS7835 2.4 3.0 IOUT e b5.2 mA DS8833, DS8835 2.4 2.9 VOL Logic ‘‘0’’ Output Voltage VCC e Min, IOUT e 16 mA IOT Output Disabled Current VCC e Max, Disable VOUT e 2.4V Inputs e 2.0V http://www.national.com VOUT e 0.4V 2 0.22 V V 0.4 V 40 mA b 40 mA Electrical Characteristics (Notes 2 and 3) (Continued) Symbol Parameter Conditions Min Typ Max Units DS7833, DS7835 28 b 40 b 70 mA DS8833, DS8835 b 30 b 70 mA RECEIVER OUTPUT (Continued) IOS ICC Output Short Circuit Current Supply Current VCC e Max, (Note 4) VCC e Max DS7833, DS8833 84 116 mA DS7835, DS8835 75 95 mA Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’ they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device operation. Note 2: Unless otherwise specified min/max limits apply across the b 55§ C to a 125§ C temperature range for the DS7833, DS7835 and across the 0§ C to a 70§ C range for the DS8833, DS8835. All typicals are given for VCC e 5.0V and TA e 25§ C. Note 3: All currents into device pins shown as positive, out of device pins as negative, all voltages referenced to ground unless otherwise noted. All values shown as max or min on absolute value basis. Note 4: Only one output at a time should be shorted. Switching Characteristics VCC e 5.0V, TA e 25§ C Symbol Parameter Conditions Min Typ Max Units DS7833/DS8833 14 30 ns DS7835/DS8835 10 20 ns DS7833/DS8833 14 30 ns DS7835/DS8835 11 30 ns DS7833/DS8833 24 45 ns DS7835/DS8835 16 35 ns 12 30 ns Propagation Delay to a Logic ‘‘0’’ from Input to Bus (Figure 1) Propagation Delay to a Logic ‘‘1’’ from Input to Bus (Figure 1) Propagation Delay to a Logic ‘‘0’’ from Bus to Input (Figure 2) tpd1 Propagation Delay to a Logic ‘‘1’’ from Bus to Input (Figure 2) DS7833/DS8833 DS7835/DS8835 18 30 ns tPHZ Delay from Disable Input to High Impedance State (from Logic ‘‘1’’ Level) CL e 5.0 pF, (Figures 1 and 2 ) Driver 8.0 20 ns Receiver 6.0 15 ns tPLZ Delay from Disable Input to High Impedance State (from Logic ‘‘0’’ Level) CL e 5.0 pF, (Figures 1 and 2 ) Driver 20 35 ns Receiver 13 25 ns tPZH Delay from Disable Input to Logic ‘‘1’’ Level (from High Impedance State) CL e 5.0 pF, (Figures 1 and 2 ) Driver 24 40 ns Receiver 16 35 ns tPZL Delay from Disable Input to Logic ‘‘0’’ Level (from High Impedance State) CL e 5.0 pF, (Figures 1 and 2 ) Driver 19 35 ns Receiver DS7833/DS8833 15 30 ns Receiver DS7835/DS8835 33 50 ns tpd0 tpd1 tpd0 AC Test Circuits TL/F/5808 – 3 TL/F/5808 – 4 FIGURE 1. Driver Output Load FIGURE 2. Receiver Output Load 3 http://www.national.com Switching Time Waveforms tpd1 & tpd0 tPLZ TL/F/5808 – 6 TL/F/5808 – 5 f e 1 MHz tr e tf s 10 ns (10% to 90%) DUTY CYCLE e 50% tPHZ tPZL TL/F/5808 – 8 TL/F/5808 – 7 tPZH TL/F/5808 – 9 http://www.national.com 4 Physical Dimensions inches (millimeters) Ceramic Dual-In-Line Package (J) Order Number DS7833J or DS7835J NS Package Number J16A 5 http://www.national.com DS7833/DS8833/DS7835/DS8835 Quad TRI-STATE Bus Transceivers Physical Dimensions inches (millimeters) (Continued) Molded Dual-In-Line Package (N) Order Number DS8833N or DS8835N NS Package Number N16A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. 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