CD4043BM/CD4043BC Quad TRI-STATEÉ NOR R/S Latches CD4044BM/CD4044BC Quad TRI-STATE NAND R/S Latches General Description Features CD4043BM/CD4043BC are quad cross-couple TRI-STATE CMOS NOR latches, and CD4044BM/CD4044BC are quad cross-couple TRI-STATE CMOS NAND latches. Each latch has a separate Q output and individual SET and RESET inputs. There is a common TRI-STATE ENABLE input for all four latches. A logic ‘‘1’’ on the ENABLE input connects the latch states to the Q outputs. A logic ‘‘0’’ on the ENABLE input disconnects the latch states from the Q outputs resulting in an open circuit condition on the Q output. The TRI-STATE feature allows common bussing of the outputs. Y Y Y Y Y Y Wide supply voltage range 3V to 15V Low power 100 nW (typ.) High noise immunity 0.45 VDD (typ.) Separate SET and RESET inputs for each latch NOR and NAND configuration TRI-STATE output with common output enable Applications Y Y Y Y Multiple bus storage Strobed register Four bits of independent storage with output enable General digital logic Connection Diagrams CD4044BM/CD4044BC Dual-In-Line and Flat Packages CD4043BM/CD4043BC Dual-In-Line and Flat Packages TL/F/5967 – 4 TL/F/5967 – 3 Top View Top View Order Number CD4043B or CD4044B Truth Table CD4043BM/CD4043BC CD4044BM/CD4044BC S R E Q S R E Q X 0 1 0 1 X 0 0 1 1 0 1 1 1 1 OC NC 1 0 D X 1 0 1 0 X 1 1 0 0 0 1 1 1 1 OC NC 1 0 DD C1995 National Semiconductor Corporation TL/F/5967 OC Ð TRI-STATE NC Ð No change X Ð Don’t care D Ð Dominated by S e 1 input DD Ð Dominated by R e 0 input RRD-B30M105/Printed in U. S. A. CD4043BM/CD4043BC Quad TRI-STATEÉ NOR R/S Latches CD4044BM/CD4044BC Quad TRI-STATE NAND R/S Latches February 1988 Absolute Maximum Ratings (Notes 1 and 2) Recommended Operating Conditions (Note 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage (VDD) Input Voltage (VIN) Storage Temperature Range (TS) Power Dissipation (PD) Dual-In-Line Small Outline Lead Temperature (TL) (Soldering, 10 seconds) Supply Voltage (VDD) Input Voltage (VIN) Operating Temperature Range (TA) CD4043BM, CD4044BM CD4043BC, CD4044BC b 0.5V to a 18V b 0.5V to VDD a 0.5V b 65§ C to a 150§ C 3.0V to 15V 0 to VDD V b 55§ C to a 125§ C b 40§ C to a 85§ C 700 mW 500 mW 260§ C DC Electrical Characteristics CD4043BM/CD4044BM (Note 2) Symbol Parameter b 55§ C Conditions Min IDD Quiescent Device Current VOL Low Level Output Voltage VOH VIL VIH IOL IOH IIN a 25§ C Max VDD e 5V, VIN e VDD or VSS VDD e 10V, VIN e VDD or VSS VDD e 15V, VIN e VDD or VSS lIOl s 1 mA, VIL e 0V, VIH e VDD VDD e 5.0V VDD e 10V VDD e 15V Min a 125§ C Min Units Typ Max Max 5.0 10 20 0.01 0.01 0.02 5.0 10 20 150 300 600 mA mA mA 0.05 0.05 0.05 0 0 0 0.05 0.05 0.05 0.05 0.05 0.05 V V V High Level Output Voltage lIOl s 1 mA, VIL e 0V, VIH e VDD VDD e 5.0V VDD e 10V VDD e 15V Low Level Input Voltage lIOl s 1 mA VDD e 5.0V, VO e 0.5V or 4.5V VDD e 10V, VO e 1.0V or 9.0V VDD e 15V, VO e 1.5V or 13.5V High Level Input Voltage lIOl s 1 mA VDD e 5.0V, VO e 0.5V or 4.5V VDD e 5.0V, VO e 1.0V or 9.0V VDD e 15V, VO e 1.5V or 13.5V 3.5 7.0 11 3.5 7.0 11 2.75 5.5 8.25 3.5 7.0 11 V V V Low Level Output Current VIL e 0V, VIH e VDD VDD e 5.0V, VO e 0.4V VDD e 10V, VO e 0.5V VDD e 15V, VO e 1.5V 0.64 1.6 4.2 0.51 1.3 3.4 1.0 2.6 6.8 0.36 0.9 2.4 mA mA mA High Level Output Current VIL e 0V, VIH e VDD VDD e 5.0V, VO e 4.6V VDD e 10V, VO e 9.5V VDD e 15V, VO e 13.5V b 0.64 b 1.6 b 4.2 b 0.51 b 1.3 b 3.4 b 0.4 b 1.0 b 3.0 b 0.36 b 0.9 b 2.4 mA mA mA Input Current VDD e 15V, VIN e 0V VDD e 15V, VIN e 15V 4.95 9.95 14.95 4.95 9.95 14.95 1.5 3.0 4.0 5.0 10 15 2.25 4.5 6.75 4.95 9.95 14.95 1.5 3.0 4.0 V V V 1.5 3.0 4.0 b 0.1 b 10-5 b 0.1 b 1.0 0.1 10-5 0.1 1.0 V V V mA mA DC Electrical Characteristics CD4043BC/CD4044BC (Note 2) Symbol Parameter b 40§ C Conditions Min IDD Quiescent Device Current VOL Low Level Output Voltage VOH High Level Output Voltage VDD e 5V, VIN e VDD or VSS VDD e 10V, VIN e VDD or VSS VDD e 15V, VIN e VDD or VSS lIOl s 1 mA, VIL e 0V, VIH e VDD VDD e 5.0V VDD e 10V VDD e 15V lIOl s 1 mA, VIL e 0V, VIH e VDD VDD e 5.0V VDD e 10V VDD e 15V 4.95 9.95 14.95 2 Max a 25§ C Min a 85§ C Max 20 40 80 0.01 0.01 0.02 20 40 80 150 300 600 mA mA mA 0.05 0.05 0.05 0 0 0 0.05 0.05 0.05 0.05 0.05 0.05 V V V 4.95 9.95 14.95 5.0 10 15 Min Units Typ 4.95 9.95 14.95 Max V V V DC Electrical Characteristics CD4043BC/CD4044BC (Continued) Symbol Parameter b 40§ C Conditions Min VIL VIH IOL IOH IIN Max a 25§ C Min Low Level Input Voltage lIOl s 1 mA VDD e 5.0V, VO e 0.5V or 4.5V VDD e 10V, VO e 1.0V or 9.0V VDD e 15V, VO e 1.5V or 13.5V High Level Input Voltage lIOl s 1 mA VDD e 5.0V, VO e 0.5V or 4.5V VDD e 5.0V, VO e 1.0V or 9.0V VDD e 15V, VO e 1.5V or 13.5V 3.5 7.0 11 3.5 7.0 11 Low Level Output Current (Note 3) VIL e 0V, VIH e VDD VDD e 5.0V, VO e 0.4V VDD e 10V, VO e 0.5V VDD e 15V, VO e 1.5V 0.52 1.3 3.6 0.44 1.1 3.0 High Level Output Current (Note 3) VIL e 0V, VIH e VDD VDD e 5.0V, VO e 4.6V VDD e 10V, VO e 9.5V VDD e 15V, VO e 13.5V b 0.52 b 1.3 b 3.6 b 0.44 b 1.1 b 3.0 Input Current VDD e 15V, VIN e 0V VDD e 15V, VIN e 15V 1.5 3.0 4.0 a 85§ C Typ Max 2.25 4.5 6.75 1.5 3.0 4.0 Min Units Max 1.5 3.0 4.0 V V V 3.5 7.0 11 V V V 0.88 2.2 6.0 0.36 0.9 2.4 mA mA mA b 0.32 b 0.8 b 2.4 b 0.36 b 0.9 b 2.4 mA mA mA b 0.3 b 0.3 b 1.0 0.3 0.3 1.0 mA mA AC Electrical Characteristics* TA e 25§ C, CL e 50 pF, RL e 200k, input tr e tf e 20 ns, unless otherwise noted Typ Max Units tPLH, tPHL Symbol Propagation Delay S or R to Q Parameter VDD e 5.0V VDD e 10V VDD e 15V Conditions Min 175 75 60 350 175 120 ns ns ns tPZH, tPHZ Propagation Delay Enable to Q (High) VDD e 5.0V VDD e 10V VDD e 15V 115 55 40 230 110 80 ns ns ns tPZL, tPLZ Propagation Delay Enable to Q (Low) VDD e 5.0V VDD e 10V VDD e 15V 100 50 40 200 100 80 ns ns ns tTHL, tTLH Transition Time VDD e 5.0V VDD e 10V VDD e 15V 100 50 40 200 100 80 ns ns ns tWO Minimum SET or RESET Pulse Width VDD e 5.0V VDD e 10V VDD e 15V 80 40 20 160 80 40 ns ns ns CIN Input Capacitance 5.0 7.5 pF *AC Parameters are guaranteed by DC correlated testing. Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed; they are not meant to imply that the devices should be operated at these limits. The tables of ‘‘Recommended Operating Conditions’’ and ‘‘Electrical Characteristics’’ provide conditions for actual device operation. Note 2: VSS e 0V unless otherwise specified. Note 3: IOH and IOL are tested one output at a time. 3 Schematic Diagrams CD4043BM/CD4043BC CD4044BM/CD4044BC TL/F/5967 – 1 TL/F/5967 – 2 Timing Waveforms CD4043B CD4044B TL/F/5967 – 5 TL/F/5967 – 6 Enable Timing TL/F/5967 – 7 4 Physical Dimensions inches (millimeters) Ceramic Dual-In-Line Package (J) Order Number CD4043BMJ, CD4043BCJ, CD4044BMJ or CD4044BCJ NS Package Number J16A 5 CD4043BM/CD4043BC Quad TRI-STATEÉ NOR R/S Latches CD4044BM/CD4044BC Quad TRI-STATE NAND R/S Latches Physical Dimensions inches (millimeters) (Continued) Molded Dual-In-Line Package (N) Order Number CD4043BMN, CD4043BCN, CD4044BMN or CD4044BCN NS Package Number N16E LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. 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