LM2698 SIMPLE SWITCHER ® 1.35A Boost Regulator General Description Features The LM2698 is a general purpose PWM boost converter. The 1.9A, 18V, 0.2ohm internal switch enables the LM2698 to provide efficient power conversion to outputs ranging from 2.2V to 17V. It can operate with input voltages as low as 2.2V and as high as 12V. Current-mode architecture provides superior line and load regulation and simple frequency compensation over the device’s 2.2V to 12V input voltage range. The LM2698 sets the standard in power density and is capable of supplying 12V at 400mA from a 5V input. The LM2698 can also be used in flyback or SEPIC topologies. The LM2698 SIMPLE SWITCHER ® features a pin selectable switching frequency of either 600kHz or 1.25MHz. This promotes flexibility in component selection and filtering techniques. A shutdown pin is available to suspend the device and decrease the quiescent current to 5µA. An external compensation pin gives the user flexibility in setting frequency compensation, which makes possible the use of small, low ESR ceramic capacitors at the output. Switchers Made Simple ® software is available to insure a quick, easy and guaranteed design. The LM2698 is available in a low profile 8-lead MSOP package. n n n n n 1.9A, 0.2Ω, internal switch (typical) Operating voltage as low as 2.2V 600kHz/1.25MHz adjustable frequency operation Switchers Made Simple ® software 8-Lead MSOP package Applications n n n n n n n n 3.3V to 5V, 5V to 12V conversion Distributed Power Set-Top Boxes DSL Modems Diagnostic Medical Instrumentation Boost Converters Flyback Converters SEPIC Converters Typical Application Circuit 20012658 SIMPLE SWITCHER ® is a registered trademark of National Semiconductor Corporation. © 2001 National Semiconductor Corporation DS200126 www.national.com LM2698 SIMPLE SWITCHER ® 1.35A Boost Regulator October 2001 LM2698 Connection Diagram Top View 20012604 8-Lead Plastic MSOP NS Package Number MUA08A Ordering Information Order Number Package Type NSC Package Drawing Supplied As Package ID LM2698MM-ADJ MSOP-8 MUA08A 1000 Units, Tape and Reel S22B LM2698MMX-ADJ MSOP-8 MUA08A 3500 Units, Tape and Reel S22B Pin Description Pin Name Function 1 VC Compensation network connection. Connected to the output of the voltage error amplifier. 2 FB Output voltage feedback input. 3 SHDN 4 GND Analog and power ground. 5 VSW Power switch input. Switch connected between SW pin and GND pin. 6 VIN Analog power input. 7 FSLCT 8 NC www.national.com Shutdown control input, active low. Switching frequency select input. VIN = 1.25MHz. Ground = 600kHz. Connect to ground. 2 LM2698 Block Diagram 20012603 3 www.national.com LM2698 Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. FB Voltage −0.3V ≤ VFB ≤ 7V VC Voltage 0.965 < VC < 1.565 SHDN Voltage (Note 2) −0.3V ≤ VSHDN ≤ 7V FSLCT (Note 2) Operating Junction Temperature Range (Note 6) −40˚C to +125˚C Storage Temperature −65˚C to +150˚C Supply Voltage Internally Limited Lead Temperature 2kV 200V Operating Conditions 150˚C Power Dissipation (Note 3) 220˚C Machine Model −0.3V ≤ VFSLCT ≤ 12V Maximum Junction Temperature Infrared (15 sec.) Human Body Model (Note 5) −0.3V ≤ VSW ≤ 18V SW Voltage 215˚C ESD Susceptibility (Note 4) −0.3V ≤ VIN ≤ 12V VIN Vapor Phase (60 sec.) 2.2V to 12V 0 ≤ VSW ≤ 17.5V SW Voltage 300˚C Electrical Characteristics Specifications in standard type face are for TJ = 25˚C and those with boldface type apply over the full Operating Temperature Range ( TJ = −40˚C to +125˚C)Unless otherwise specified. VIN =2.2V and IL = 0A, unless otherwise specified. Symbol IQ Parameter Quiescent Current Conditions Min (Note 6) FB = 0V (Not Switching) VSHDN = 0V VFB Feedback Voltage ICL Switch Current Limit VIN = 2.7V (Note 8) %VFB/∆VIN Feedback Voltage Line Regulation 2.2V ≤ VIN ≤ 12.0V IB FB Pin Bias Current (Note 9) VIN Input Voltage Range 2.2 gm Error Amp Transconductance ∆I = 5µA 40 AV Error Amp Voltage Gain DMAX Maximum Duty Cycle FSLCT = Ground DMIN Minimum Duty Cycle FSLCT = Ground fS Switching Frequency ISHDN Shutdown Pin Current 1.2285 1.35 Typ (Note 7) Max (Note 6) Units 1.3 2.0 mA 5 10 µA 1.26 1.2915 V 1.9 2.4 A 0.013 0.1 %/V 0.5 20 nA 12 V 135 290 µmho 120 78 FSLCT = VIN V/V 85 % 15 % 30 FSLCT = Ground FSLCT = VIN 480 600 720 kHz 1 1.25 1.5 MHz VSHDN = VIN 0.01 0.1 µA VSHDN = 0V −0.5 -1 IL Switch Leakage Current VSW = 18V 0.01 3 µA RDS(ON) Switch RDS(ON) VIN = 2.7V, ISW = 1A 0.2 0.4 Ω THSHDN SHDN Threshold Voltage Output High 0.6 0.9 V Output Low UVP www.national.com 0.3 0.6 On Threshold 1.95 2.05 2.2 V Off Threshold 1.85 1.95 2.1 V 4 V (Continued) Specifications in standard type face are for TJ = 25˚C and those with boldface type apply over the full Operating Temperature Range ( TJ = −40˚C to +125˚C)Unless otherwise specified. VIN =2.2V and IL = 0A, unless otherwise specified. Symbol θJA Parameter Thermal Resistance Conditions Min (Note 6) Typ (Note 7) Junction to Ambient (Note 10) 235 Junction to Ambient (Note 11) 225 Junction to Ambient (Note 12) 220 Junction to Ambient (Note 13) 200 Junction to Ambient (Note 14) 195 Max (Note 6) Units ˚C/W Note 1: Absolute maximum ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the device is intended to be functional, but device parameter specifications may not be guaranteed. For guaranteed specifications and test conditions, see the Electrical Characteristics. Note 2: Shutdown and voltage frequency select should not exceed VIN. Note 3: The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-to-ambient thermal resistance, θJA, and the ambient temperature, TA. See the Electrical Characteristics table for the thermal resistance of various layouts. The maximum allowable power dissipation at any ambient temperature is calculated using: PD (MAX) = (TJ(MAX) − TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Note 4: The human body model is a 100 pF capacitor discharged through a 1.5kΩ resistor into each pin. The machine model is a 200pF capacitor discharged directly into each pin. Note 5: ESD susceptibility using the human body model is 500V for VC. Note 6: All limits guaranteed at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are 100% tested or guaranteed through statistical analysis. All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL). Note 7: Typical numbers are at 25˚C and represent the most likely norm. Note 8: This is the switch current limit at 0% duty cycle. The switch current limit will change as a function of duty cycle. See Typical performance Characteristics section for ICL vs. VIN Note 9: Bias current flows into FB pin. Note 10: Junction to ambient thermal resistance (no external heat sink) for the MSO8 package with minimal trace widths (0.010 inches) from the pins to the circuit. See ’Scenario ’A’’ in the Power Dissipation section. Note 11: Junction to ambient thermal resistance for the MSO8 package with minimal trace widths (0.010 inches) from the pins to the circuit and approximately 0.0191 sq. in. of copper heat sinking. See ’Scenario ’B’’ in the Power Dissipation section. Note 12: Junction to ambient thermal resistance for the MSO8 package with minimal trace widths (0.010 inches) from the pins to the circuit and approximately 0.0465 sq. in. of copper heat sinking. See ’Scenario ’C’’ in the Power Dissipation section. Note 13: Junction to ambient thermal resistance for the MSO8 package with minimal trace widths (0.010 inches) from the pins to the circuit and approximately 0.2523 sq. in. of copper heat sinking. See ’Scenario ’D’’ in the Power Dissipation section. Note 14: Junction to ambient thermal resistance for the MSO8 package with minimal trace widths (0.010 inches) from the pins to the circuit and approximately 0.0098 sq. in. of copper heat sinking on the top layer and 0.0760 sq. in. of copper heat sinking on the bottom layer, with three 0.020 in. vias connecting the planes. See ’Scenario ’E’’ in the Power Dissipation section. 5 www.national.com LM2698 Electrical Characteristics LM2698 Typical Performance Characteristics Efficiency vs Load Current (VOUT = 8V, fS = 600kHz) Efficiency vs Load Current (VOUT = 8V, fS = 1.25MHz) 20012667 20012666 Iq vs VIN (600 kHz, non-switching) Iq vs VIN (600 kHz, switching) 20012619 20012618 Iq vs. VIN (1.25MHz, non-switching) Iq vs VIN (1.25MHz, switching) 20012617 20012622 www.national.com 6 LM2698 Typical Performance Characteristics (Continued) Iq(SHDN) vs VIN RDS(ON) vs VIN 20012616 20012621 Switching Frequency vs VIN (600kHz) Switching Frequency vs VIN (1.25MHz) 20012620 20012623 ICL vs. Ambient Temperature VIN = 3.3V, VOUT = 8V ICL vs. VIN 20012641 20012642 7 www.national.com LM2698 Operation Continuous Conduction Mode 20012602 FIGURE 1. Simplified Boost Converter Diagram (a) First Cycle of Operation (b) Second Cycle Of Operation The LM2698 is a current-mode, PWM boost regulator. A boost regulator steps the input voltage up to a higher output voltage. In continuous conduction mode (when the inductor current never reaches zero at steady state), the boost regulator operates in two cycles. In the first cycle of operation, shown in Figure 1 (a), the transistor is closed and the diode is reverse biased. Energy is collected in the inductor and the load current is supplied by COUT. The second cycle is shown in Figure 1 (b). During this cycle, the transistor is open and the diode is forward biased. The energy stored in the inductor is transferred to the load and output capacitor. The ratio of these two cycles determines the output voltage. The output voltage is defined as: Inductor where D is the duty cycle of the switch. 20012605 FIGURE 2. (a) Inductor Current (b) Diode Current The inductor is one of the two energy storage elements in a boost converter. Figure 2 shows how the inductor current varies during a switching cycle. The current through an inductor is quantified as: www.national.com 8 Current Limit (Continued) The current limit in the LM2698 is referenced to the peak switch current. The peak currents in the switch of a boost converter will always be higher than the average current supplied to the load. To determine the maximum average output current that the LM2698 can supply, use: IOUT(MAX) = (ICL − ∆iL)*(1−D) = (ICL − ∆iL)*VIN/VOUT If VL(t) is constant, diL / dt must be constant, thus the current in the inductor changes at a constant rate. This is the case in DC/DC converters since the voltages at the input and output can be approximated as a constant. The current through the inductor of the LM2698 boost converter is shown in Figure 2(a). The important quantities in determining a proper inductance value are IL(AVG) (the average inductor current) and ∆iL (the inductor current ripple). If ∆iL is larger than IL(AVG), the inductor current will drop to zero for a portion of the cycle and the converter will operate in discontinuous conduction mode. If ∆iL is smaller than IL(AVG), the inductor current will stay above zero and the converter will operate in continuous conduction mode (CCM). All the analysis in this datasheet assumes operation in continuous conduction mode. To operate in CCM: IL(AVG) > ∆iL Where ICL is the switch current limit (see Electrical Charateristics table and Typical Performance Curves). Hence, as VIN increases, the maximum current that can be supplied to the load increases, as shown in Figure 3. 20012673 FIGURE 3. Maximum Output Current vs Input Voltage Choose the minimum IOUT to determine the minimum L for CCM operation. A common choice is to set ∆iL to 30% of IL(AVG). The inductance value will also affect the stability of the converter. Because the LM2698 utilizes current mode control, the inductor value must be carefully chosen. See the COMPENSATION section for recommended inductance values. Choosing an appropriate core size for the inductor involves calculating the average and peak currents expected through the inductor. In a boost converter, Diode The diode in a boost converter such as the LM2698 acts as a switch to the output. During the first cycle, when the transistor is closed, the diode is reverse biased and current is blocked; the load current is supplied by the output capacitor. In the second cycle, the transistor is open and the diode is forward biased; the load current is supplied by the inductor. Observation of the boost converter circuit shows that the average current through the diode is the average load current, and the peak current through the diode is the peak current through the inductor. The diode should be rated to handle more than its peak current. To improve efficiency, a low forward drop Schottky diode is recommended. Input Capacitor Due to the presence of an inductor at the input of a boost converter, the input current waveform is continuous and triangular. The inductor ensures that the input capacitor sees fairly low ripple currents. However, as the inductor gets smaller, the input ripple increases. The rms current in the input capacitor is given by: and IL(Peak) = IL(AVG) + ∆iL, where A core size with ratings higher than these values should be chosen. If the core is not properly rated, saturation will dramatically reduce overall efficiency. The input capacitor should be capable of handling the rms current. Although the input capacitor is not so critical in boost applications, a 10 µF or higher value, good quality capacitor prevents any impedance interactions with the input supply. A 0.1µF or 1µF ceramic bypass capacitor is also recommended on the VIN pin (pin 6) of the IC. This capacitor must 9 www.national.com LM2698 Operation LM2698 Operation There is a minimum inductance requirement in any current mode converter. This is a function of VOUT, duty cycle, and switching frequency, among other things. The graphs below plot the recommended inductance range vs. duty cycle for VOUT = 12V. The two lines represent the upper and lower bounds of the recommended inductance range. The simplified compensation procedure that follows assumes that the inductance never drops below the Q = 5 line. Figure 4 plots the equation: (Continued) be connected very close to pin 6 to effectively filter high frequency noise. When operating at 1.25 MHz switching frequency, a minimum bypass capacitance of 0.22 µF is recommended. Output Capacitor The output capacitor in a boost converter provides all the output current when the switch is closed and the inductor is charging. As a result, it sees very large ripple currents. The output capacitor should be capable of handling the maximum RMS current. The RMS current in the output capacitor is: (1) where, RDSON = 0.15, Se = 0.072*fS, and Q = 0.5 and 5 Use Q = 5 to calculate the minimum inductance recommended for a stable design. Choosing an inductor between the Q = 0.5 and Q = 5 values provides a good tradeoff between size and stability. Note that as VIN drops less than 5V, RDS(ON) increases, as shown in the Typical Performance Characteristics section (RDS(ON) vs.VIN curve). The worst case RDS(ON) should be used when choosing the inductance. To view plots for different Vout, multiply the Y axis by a factor of VOUT/12, or plot Equation (1) for the respective output voltage. where, and D = (VOUT - VIN)/VOUT The ESR and ESL of the output capacitor directly control the output ripple. Use capacitors with low ESR and ESL at the output for high efficiency and low ripple voltage. Surface mount tantalums, surface mount polymer electrolytic, and polymer tantalum, Sanyo OS-CON, or multi-layer ceramic capacitors are recommended at the output. Compensation This section presents a step-by-step procedure to design the compensation network at pin 1 (Vc) of the LM2698. These design methods will produce a conservative and stable control loop. 20012654 20012653 FIGURE 4. Minimum Inductance Requirements for (a) fS = 600kHz and (b) fS = 1.25MHz www.national.com 10 performance can be best analyzed by plotting the magnitude and phase of the open loop frequency response in the form of a bode plot. A typical bode plot of the LM2698 open loop frequency response is shown in Figure 5. (Continued) The goal of the compensation network is to provide the best static and dynamic performance while insuring stability over line and load variations. The relationship of stability and 20012657 FIGURE 5. Bode plot of the LM2698 Frequency Response using the Typical Application Circuit Poles are marked with an ’X’, and zeros are marked with a ’O’. The bolded ’O’ labeled ’fRHP’ is a right-half plane zero. Right half plane zeros act like normal zeros to the magnitude (+20dB/decade slope influence) and like poles to the phase (−90˚ shift). Three curves are shown. The powerstage curve is the frequency response of the powerstage, which includes the switch, diode, inductor, output capacitor, and load. The compensator curve is the frequency response of the compensator, which is the error amp combined with the compensation network. T is the product of the powerstage and the compensator and is the complete open loop frequency response. The power stage response is fixed by line and load constraints, while the compensator is set by the external compensation network at pin 1. The compensator can be designed in a few simple steps as follows. Quick Compensator Design Calculate: where ROUT = 875kΩ Choose CC1 = 4.7nF Choose where, Where, 11 www.national.com LM2698 Operation LM2698 Operation ever the loop phase margin will become progressively lower as CC1 is decreased. When optimizing the loop gain for transient response time, it is recommended to keep the phase margin above 40˚. (Continued) If the output capacitor is of high ESR (0.1Ω or higher), it may be necessary to use CC2. A rule of thumb is that if 1/(2πCOUTESR) (Hz) is lower than fS/2 (Hz), CC2 should be used. Choose CC2 such that: (RC + ROUT)(COUTESR) / (RCROUT) (F) where ROUT = output impedance of the error amp (875 kΩ). Improving Transient Response Time The above compensator design provides a loop gain with high phase margin for a large stability margin. The transient response time of this loop is limited by the lower mid-frequency gain necessary to achieve a high phase margin. If it is desired to increase the transient response time, CC1 may be decreased. Decreasing CC1 by 2x, 4x, and 6x will yield increasingly shorter transient response times, how- www.national.com 12 ing table to determine if your design is stable. Remember to use worst case conditions (VIN(MIN), ROUT(MIN), ROUT(MAX)). (Continued) Additional Comments on the Open Loop Frequency Response The procedure used here to pick the compensation network will provide a good starting point. In most cases, these values will be sufficient for a stable design. It is always recommended to check the design in a real test setup. This is easy to do with the aid of a dynamic load. Set the high and low load values to your system requirements and switch between the two at about 1kHz. View the output voltage with an oscilloscope using AC coupling, and zoom in enough to see the waveform react to the load change. Use the follow- Response Conclusion What to Change Underdamped, weak attenuation Nearing instability Make CC1 larger Underdamped, strong attenuation Stable Nothing Critically damped Stable Nothing Overdamped Stable Nothing Application Information 20012668 FIGURE 6. 3.3V to 10V Boost Converter ing these values in for Equation (1), it is found that either a 10 µH (1.25MHz operation) or a 22 µH (600kHz operation) is necessary for a stable design. The circuit is operated at 1.25MHz to allow for a smaller inductance. From the Compensator Design equations, RC is calculated to be 18.6kΩ, and a 20kΩ resistor is used. 1.25MHz Boost Converter Figure 6 shows the LM2698 boosting 3.3V to 10V at 300mA. As discussed in the COMPENSATION section, the RDS(ON) of the internal FET in the LM2698 raises as the input voltage drops below 5V (see Typical Performance Characteristics). The minimum input voltage for this application is 2.5V, at which point the RDS(ON) is approximately 200mΩ. Substitut- 13 www.national.com LM2698 Operation LM2698 Application Information (Continued) 20012631 FIGURE 7. 3.3V SEPIC Converter 3.3V SEPIC The LM2698 can be used to implement a SEPIC technology. The advantages of the SEPIC topology are that it can step up or step down an input voltage, and it has low input current ripple. The conversion ratio for the SEPIC is : I1 = IOUT(VOUT/VIN) ∆i1 = VIND/(2*L1*fs) I2 = IOUT ∆i1 = VIND/(2*L2*fs) The switch sees a maximum current of I1 + I2 + ∆i1 + ∆i2. If L1 = L2 = L, the maximum switch current is given by: IOUT(1 + VOUT/VIN) + VIND/(L*fs) The maximum load current is limited by this relationship to the switch current. The polarity of CSEPIC will change between each cycle, so a ceramic capacitor should be used here. A high quality, low ESR capacitor will directly improve efficiency because all the load current passes through CSEPIC. CIN should be chosen using the same relationship as in the boost converter (see the CIN section). CIN must be able to provide the necessary RMS current. where D’ = 1−D Solving for D yeilds: To avoid subharmonic oscillations, it is recommended that inductors L1 and L2 be the same inductance. Currents conducted by the inductors are: www.national.com 14 LM2698 Application Information (Continued) 20012643 FIGURE 8. Level-Shifted SEPIC Converter Level-Shifted SEPIC The circuit shown in Figure 8 is similar to the SEPIC shown in Figure 7, except that it is level shifted to provide a negative output voltage. This is achieved by connecting the ground of the LM2698 to the output. The circuit analysis for the level-shifted SEPIC is the same as the SEPIC. The voltage at the input of the LM2698 will need to be clamped if the absolute value of the output voltage plus the input voltage exceeds 12V, the absolute maximum rating for the VIN pin. The simplest way to do this is with a zener diode, as shown in Figure 8. Likewise, if the FSLCT pin is pulled high to operate at 1.25 MHz, its voltage must not exceed 12V. To prevent any high frequency noise from entering the LM2698’s internal circuitry, a high frequency bypass capacitor must be placed as close to pin 6 as possible. A good choice for this capacitor is a 0.1µF ceramic capacitor. 20012611 Power Dissipation The output power of the LM2698 is limited by its maximum power dissipation. The maximum power dissipation is determined by the formula PD = (Tjmax - TA)/θJA where Tjmax is the maximum specified junction temperature (125˚C), TA is the ambient temperature, and θJA is the thermal resistance of the package. θJA is dependant on the layout of the board as shown below. 20012612 15 www.national.com LM2698 Application Information (Continued) 20012615 20012613 20012614 www.national.com 16 LM2698 SIMPLE SWITCHER ® 1.35A Boost Regulator Physical Dimensions inches (millimeters) unless otherwise noted 8-Lead Plastic MSOP NS Package Number MUA08A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation Americas Email: [email protected] www.national.com National Semiconductor Europe Fax: +49 (0) 180-530 85 86 Email: [email protected] Deutsch Tel: +49 (0) 69 9508 6208 English Tel: +44 (0) 870 24 0 2171 Français Tel: +33 (0) 1 41 91 8790 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Asia Pacific Customer Response Group Tel: 65-2544466 Fax: 65-2504466 Email: [email protected] National Semiconductor Japan Ltd. Tel: 81-3-5639-7560 Fax: 81-3-5639-7507 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.