LINEAR_DIMENSIONS LT1158CSW

LT1158
Half Bridge N-Channel
Power MOSFET Driver
FEATURES
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DESCRIPTION
Drives Gate of Top Side MOSFET Above V+
Operates at Supply Voltages from 5V to 30V
150ns Transition Times Driving 3000pF
Over 500mA Peak Driver Current
Adaptive Non-Overlap Gate Drives
Continuous Current Limit Protection
Auto Shutdown and Retry Capability
Internal Charge Pump for DC Operation
Built-In Gate Voltage Protection
Compatible with Current-Sensing MOSFETs
TTL/CMOS Input Levels
Fault Output Indication
A single input pin on the LT®1158 synchronously controls
two N-channel power MOSFETs in a totem pole configuration. Unique adaptive protection against shoot-through
currents eliminates all matching requirements for the two
MOSFETs. This greatly eases the design of high efficiency
motor control and switching regulator systems.
A continuous current limit loop in the LT1158 regulates
short-circuit current in the top power MOSFET. Higher
start-up currents are allowed as long as the MOSFET VDS
does not exceed 1.2V. By returning the FAULT output to
the enable input, the LT1158 will automatically shut down
in the event of a fault and retry when an internal pull-up
current has recharged the enable capacitor.
APPLICATIONS
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An on-chip charge pump is switched in when needed to
turn on the top N-channel MOSFET continuously. Special
circuitry ensures that the top side gate drive is safely
maintained in the transition between PWM and DC operation. The gate-to-source voltages are internally limited to
14.5V when operating at higher supply voltages.
PWM of High Current Inductive Loads
Half Bridge and Full Bridge Motor Control
Synchronous Step-Down Switching Regulators
Three-Phase Brushless Motor Drive
High Current Transducer Drivers
Battery-Operated Logic-Level MOSFETs
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other
trademarks are the property of their respective owners. Protected by U.S. Patents including
5365118.
TYPICAL APPLICATION
24V
Top and Bottom Gate Waveforms
1N4148
BOOST DR
+
10μF
BOOST
V+
T GATE DR
V+
T GATE FB
0.1μF
IRFZ34
+
500μF
LOW
ESR
T SOURCE
PWM
0Hz TO
100kHz
SENSE+
INPUT
+
LT1158
+
1μF
ENABLE
FAULT
B GATE DR
BIAS
0.01μF
RSENSE
0.015Ω
SENSE–
–
LOAD
VIN = 24V
RL = 12Ω
IRFZ34
1158 TA02
B GATE FB
GND
LT1158 TA01
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LT1158
ABSOLUTE MAXIMUM RATINGS
(Note 1)
Supply Voltage (Pins 2, 10) ......................................36V
Boost Voltage (Pin 16) ..............................................56V
Continuous Output Currents (Pins 1, 9, 15) .........100mA
Sense Voltages (Pins 11, 12) .................. –5V to V+ + 5V
Top Source Voltage (Pin 13) ................... –5V to V+ + 5V
Boost to Source Voltage (V16 – V13) ........ –0.3V to 20V
Operating Temperature Range
LT1158C................................................... 0°C to 70°C
LT1158I ................................................ –40°C to 85°C
Junction Temperature (Note 2)
LT1158C............................................................ 125°C
LT1158I ............................................................. 150°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec.) ................. 300°C
PIN CONFIGURATION
TOP VIEW
BOOST DR
1
TOP VIEW
BOOST DR 1
16 BOOST
V+
2
15 T GATE DR
16 BOOST
V+ 2
15 T GATE DR
BIAS
3
14 T GATE FB
BIAS 3
14 T GATE FB
ENABLE
4
13 T SOURCE
ENABLE 4
13 T SOURCE
FAULT
5
12 SENSE+
FAULT 5
12 SENSE+
INPUT
6
11 SENSE–
INPUT 6
11 SENSE–
GND
7
10
V+
B GATE FB
8
9
B GATE DR
GND 7
B GATE FB 8
10 V+
9
B GATE DR
SW PACKAGE
16-LEAD PLASTIC (WIDE) SO
θJA = 110°C/W
N PACKAGE
16-LEAD PLASTIC DIP
θJA = 70°C/W
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
LT1158CN#PBF
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT1158CN#TRPBF
16-Lead Plastic DIP
0°C to 70°C
LT1158IN#PBF
LT1158IN#TRPBF
16-Lead Plastic DIP
–40°C to 85°C
LT1158CSW#PBF
LT1158CSW#TRPBF
16-Lead Plastic (Wide) SO
0°C to 70°C
LT1158ISW#PBF
LT1158ISW#TRPBF
16-Lead Plastic (Wide) SO
–40°C to 85°C
LEAD BASED FINISH
TAPE AND REEL
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT1158CN
LT1158CN#TR
16-Lead Plastic DIP
0°C to 70°C
LT1158IN
LT1158IN#TR
16-Lead Plastic DIP
–40°C to 85°C
PART MARKING*
LT1158CSW
LT1158CSW#TR
16-Lead Plastic (Wide) SO
0°C to 70°C
LT1158ISW
LT1158ISW#TR
16-Lead Plastic (Wide) SO
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
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LT1158
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. Test Circuit, V+ = V16 = 12V, V11 = V12 = V13 = 0V, Pins 1 and 4 open,
Gate Feedback pins connected to Gate Drive pins unless otherwise specified.
LT1158I
SYMBOL
I2 + I10
LT1158C
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
DC Supply Current (Note 2)
V+ = 30V, V16 = 15V, V4 = 0.5V
V+ = 30V, V16 = 15V, V6 = 0.8V
V+ = 30V, V16 = 15V, V6 = 2V
4.5
8
2.2
7
13
3
10
18
4.5
8
2.2
7
13
3
10
18
mA
mA
mA
3
4.5
3
4.5
mA
0.8
1.4
2
0.8
1.4
2
V
5
15
5
15
μA
V+ = V13 = 30V, V16 = 45V, V6 = 0.8V
UNITS
I16
Boost Current
V6
Input Threshold
I6
Input Current
V6 = 5V
l
V4
Enable Low Threshold
V6 = 0.8V, Monitor V9
l
0.9
1.15
1.4
0.85
1.15
1.4
V
ΔV4
Enable Hysteresis
V6 = 0.8V, Monitor V9
l
1.3
1.5
1.7
1.2
1.5
1.8
V
l
I4
Enable Pullup Current
V4 = 0V
l
15
25
35
15
25
35
μA
V15
Charge Pump Voltage
V+ = 5V, V6 = 2V, Pin 16 open, V13 → 5V
V+ = 30V, V6 = 2V, Pin16 open, V13 → 30V
l
l
9
40
11
43
47
9
40
11
43
47
V
V
V9
Bottom Gate “ON” Voltage
V+ = V16 = 18V, V6 = 0.8V
l
12
14.5
17
12
14.5
17
V
V1
Boost Drive Voltage
V+ = V16 = 18V, V6 = 0.8V, 100mA Pulsed Load
l
12
14.5
17
12
14.5
17
V
V14 – V13 Top Turn-Off Threshold
V+ = V16 = 5V, V6 = 0.8V
1
1.75
2.5
1
1.75
2.5
V
V8
Bottom Turn-Off Threshold
V+ = V16 = 5V, V6 = 2V
1
1.5
2
1
1.5
2
V
Fault Output Leakage
V+ = 30V, V16 = 15V, V6 = 2V
0.1
1
0.1
1
μA
Fault Output Saturation
V12 – V11 Current Limit Threshold
V+ = 30V, V16 = 15V, V6 = 2V, I5 = 10mA
V+ = 30V, V16 = 15V, V6 = 2V, I5 = 100μA
V+ = 30V, V16 = 15V, V6 = 2V, Closed Loop
V12 – V11 Current Limit Inhibit
VDS Threshold
V+ = V12 = 12V, V6 = 2V, Decrease V11
Until V15 Goes Low
tR
Top Gate Rise Time
Pin 6 (+) Transition, Meas. V15 – V13 (Note 4)
tD
Top Gate Turn-Off Delay
tF
I5
l
0.5
1
0.5
1
90
110
130
85
110
135
mV
130
120
150
170
180
120
120
150
180
180
mV
mV
1.1
1.25
1.4
1.1
1.25
1.4
V
l
130
250
130
250
ns
Pin 6 (–) Transition, Meas. V15 – V13 (Note 4)
l
350
550
350
550
ns
Top Gate Fall Time
Pin 6 (–) Transition, Meas. V15 – V13 (Note 4)
l
120
250
120
250
ns
tR
Bottom Gate Rise Time
Pin 6 (–) Transition, Meas. V9 (Note 4)
l
130
250
130
250
ns
tD
Bottom Gate Turn-Off Delay
Pin 6 (+) Transition, Meas. V9 (Note 4)
l
200
400
200
400
ns
tF
Bottom Gate Fall Time
Pin 6 (+) Transition, Meas. V9 (Note 4)
l
100
200
100
200
ns
V5
V12 – V11 Fault Conduction Threshold
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: TJ is calculated from the ambient temperature TA and power
dissipation PD according to the following formulas:
LT1158IN, LT1158CN: TJ = TA + (PD × 70°C/W)
LT1158ISW, LT1158CSW: TJ = TA + (PD × 110°C/W)
l
V
Note 3: Dynamic supply current is higher due to the gate charge
being delivered at the switching frequency. See typical performance
characteristics and applications information.
Note 4: Gate rise times are measured from 2V to 10V, delay times are
measured from the input transition to when the gate voltage has decreased
to 10V, and fall times are measured from 10V to 2V.
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LT1158
TYPICAL PERFORMANCE CHARACTERISTICS
DC Supply Current
30
14
I2 + I10 + I16
V+ = 12V
V13 = 0V
12
V13 = V+
SUPPLY CURRENT (mA)
INPUT HIGH
10
INPUT LOW
8
6
4
ENABLE LOW
2
0
5
10
INPUT HIGH
10
8
INPUT LOW
6
4
ENABLE LOW
2
0
–50 –25
0
15 20 25 30
SUPPLY VOLTAGE (V)
35
40
50
25
75
0
TEMPERATURE (°C)
Dynamic Supply Current
100
50% DUTY CYCLE
V+ = 12V
V+ = 6V
1
10
INPUT FREQUENCY (kHz)
100
LT1158 G03
Input Thresholds
2.0
INPUT THRESHOLD VOLTAGE (V)
45
40
30
TOP GATE VOLTAGE (V)
25
CGATE = 10000pF
CGATE = 3000pF
10
CGATE = 1000pF
35
30
NO LOAD
25
20
10μA LOAD
15
10
1.8
V(HIGH)
1.6
–40°C
+25°C
+85°C
1.4
–40°C
+25°C
+85°C
1.2
V(LOW)
1.0
5
0
1
10
INPUT FREQUENCY (kHz)
0.8
0
100
0
5
10 15 20 25 30
SUPPLY VOLTAGE (V)
LT1158 G04
35
0
40
Enable Thresholds
Fault Conduction Threshold
FAULT CONDUCTION THRESHOLD (mV)
V(HIGH)
–40°C
+25°C
2.5
+85°C
2.0
1.5
–40°C
+25°C
1.0
V(LOW)
+85°C
0.5
0
0
5
10
15 20 25 30
SUPPLY VOLTAGE (V)
35
40
LT1158 G07
10 15 20 25 30
SUPPLY VOLTAGE (V)
35
40
LT1158 G06
Current Limit Threshold
160
3.5
3.0
5
LT1158 G05
200
V11 = 0V
150
CURRENT LIMIT THRESHOLD (mV)
SUPPLY CURRENT (mA)
10
Charge Pump Output Voltage
5
ENABLE THRESHOLD VOLTAGE (V)
V+ = 12V
15
0
125
50
15
V+ = 24V
LT1158 G02
40
20
20
5
LT1158 G01
35
50% DUTY CYCLE
CGATE = 3000pF
25
SUPPLY CURRENT (mA)
I2 + I10 + I16
12
SUPPLY CURRENT (mA)
Dynamic Supply Current (V +)
DC Supply Current
14
140
130
120
110
+85°C
+25°C
100
–40°C
90
80
180
170
160
150
130
120
110
60
100
5
10 15 20 25 30
SUPPLY VOLTAGE (V)
35
40
LT1158 G08
+85°C
+25°C
–40°C
140
70
0
CLOSED LOOP
190
0
5
10 15 20 25 30
SUPPLY VOLTAGE (V)
35
40
LT1158 G09
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LT1158
TYPICAL PERFORMANCE CHARACTERISTICS
Current Limit Inhibit
VDS Threshold
Bottom Gate Rise Time
1.40
1.35
1.30
–40°C
1.25
+25°C
1.20
+85°C
1.15
1.10
400
350
350
300
CGATE = 10000pF
250
200
150
CGATE = 3000pF
100
CGATE = 1000pF
50
1.05
0
1.00
0
5
10 15 20 25 30
SUPPLY VOLTAGE (V)
35
40
0
5
10 15 20 25 30
SUPPLY VOLTAGE (V)
35
300
200
Top Gate Rise Time
100
50
0
40
Top Gate Fall Time
350
700
TOP GATE FALL TIME (ns)
CGATE = 3000pF
150
100
0
0
5
10 15 20 25 30
SUPPLY VOLTAGE (V)
5
10 15 20 25 30
SUPPLY VOLTAGE (V)
CGATE = 10000pF
250
200
CGATE = 3000pF
150
35
40
100
V+ = 12V
CGATE = 3000pF
600
500
RISE TIME
400
FALL TIME
300
200
CGATE = 1000pF
CGATE = 1000pF
50
300
TRANSITION TIMES (ns)
350
200
0
Transition Times vs RGate
800
250
CGATE = 1000pF
LT1158 G12
400
CGATE = 10000pF
CGATE = 3000pF
150
400
300
CGATE = 10000pF
250
LT1158 G11
LT1158 G10
TOP GATE RISE TIME (ns)
Bottom Gate Fall Time
400
BOTTOM GATE FALL TIME (ns)
V2 – V11
1.45
BOTTOM GATE RISE TIME (ns)
CURRENT LIMIT INHIBIT THRESHOLD (V)
1.50
100
50
35
40
LT1158 G13
0
0
5
10 15 20 25 30
SUPPLY VOLTAGE (V)
35
40
LT1158 G14
0
0
10 20 30 40 50 60 70 80 90 100
GATE RESISTANCE (Ω)
LT1158 G15
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LT1158
PIN FUNCTIONS
BOOST DR (Pin 1): Recharges and clamps the bootstrap
capacitor to 14.5V higher than pin 13 via an external
diode.
V+ (Pin 2): Main supply pin; must be closely decoupled
to the ground pin 7.
BIAS (Pin 3): Decouple point for the internal 2.6V bias
generator. Pin 3 cannot have any external DC loading.
ENABLE (Pin 4): When left open, the LT1158 operates
normally. Pulling pin 4 low holds both MOSFETs off regardless of the input state.
FAULT (Pin 5): Open collector NPN output which turns
on when V12 – V11 exceeds the fault conduction threshold.
INPUT (Pin 6): Taking pin 6 high turns the top MOSFET on
and bottom MOSFET off; pin 6 low reverses these states.
An input latch captures each low state, ignoring an ensuing
high until pin 13 has gone below 2.6V.
B GATE FB (Pin 8): Must connect directly to the bottom
power MOSFET gate. The top MOSFET turn-on is inhibited
until pin 8 has discharged to 1.5V. A hold-on current source
also feeds the bottom gate via pin 8.
B GATE DR (Pin 9): The high current drive point for the
bottom MOSFET. When a gate resistor is used, it is inserted
between pin 9 and the gate of the MOSFET.
V+ (Pin 10): Bottom side driver supply; must be connected
to the same supply as pin 2.
SENSE– (Pin 11): The floating reference for the current
limit comparator. Connects to the low side of a current
shunt or Kelvin lead of a current-sensing MOSFET. When
pin 11 is within 1.2V of V+, current limit is inhibited.
SENSE+ (Pin 12): Connects to the high side of the current
shunt or sense lead of a current-sensing MOSFET. A built-in
offset between pins 11 and 12 in conjunction with RSENSE
sets the top MOSFET short-circuit current.
T SOURCE (Pin 13): Top side driver return; connects to
MOSFET source and low side of the bootstrap capacitor.
T GATE FB (Pin 14): Must connect directly to the top power
MOSFET gate. The bottom MOSFET turn-on is inhibited
until V14 – V13 has discharged to 1.75V. An on-chip charge
pump also feeds the top gate via pin 14.
T GATE DR (Pin 15): The high current drive point for the
top MOSFET. When a gate resistor is used, it is inserted
between pin 15 and the gate of the MOSFET.
BOOST (Pin 16): Top side driver supply; connects to the
high side of the bootstrap capacitor and to a diode either
from supply (V+ < 10V) or from pin 1 (V+ > 10V).
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LT1158
BLOCK DIAGRAM
V+
V+
16 BOOST
CHG
PUMP
BOOST DR 1
15 T GATE DR
V+
V+ 2
15V
14 T GATE FB
LOGIC
INPUT
BIAS 3
–
BIAS
GEN
T
+
25μA
7.5V
FAULT
1.75V
+
ENABLE 4
13 T SOURCE
2.7V
–
1.2V
110mV
5
SENSE+
+
12
–
11 SENSE–
S
–
O
2.6V
+
7.5V
10 V+
1-SHOT
R
INPUT 6
1.4V
+
–
S
R
Q
Q
15V
9
B GATE DR
1-SHOT
R
–
B
1.5V
+
GND 7
8
1158 FD
B GATE FB
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LT1158
TEST CIRCUIT
150Ω
2W
1
2
+
V+
+
10μF
0.01μF
3
4
+
5
V4
3k
1/2W
V6
50Ω
6
7
8
BOOST DR
BOOST
+
T GATE DR
BIAS
T GATE FB
V
ENABLE
FAULT
T SOURCE
LT1158
INPUT
GND
B GATE FB
16
+
15
V16
14
2k
1/2W
3000pF
+
13
V14 – V13
12
SENSE+
SENSE–
V+
B GATE DR
+
VN2222LL
1μF
CLOSED
LOOP
+
100Ω
11
V12
+
10
V11
9
3000pF
+
V8
LT1158 TC01
OPERATION
(Refer to Functional Diagram)
The LT1158 self-enables via an internal 25μA pull-up on
the enable pin 4. When pin 4 is pulled down, much of the
input logic is disabled, reducing supply current to 2mA.
With pin 4 low, the input state is ignored and both MOSFET
gates are actively held low. With pin 4 enabled, one or the
other of the 2 MOSFETs is turned on, depending on the
state of the input pin 6: high for top side on, and low for
bottom side on. The 1.4V input threshold is regulated and
has 200mV of hysteresis.
Whenever there is an input transition on pin 6, the LT1158
follows a logical sequence to turn off one MOSFET and turn
on the other. First, turn-off is initiated, then VGS is monitored until it has decreased below the turn-off threshold,
and finally the other gate is turned on. An input latch gets
reset by every low state at pin 6, but can only be set if the
top source pin has gone low, indicating that there will be
sufficient charge in the bootstrap capacitor to safely turn
on the top MOSFET.
In order to allow operation over 5V to 30V nominal supply
voltages, an internal bias generator is employed to furnish
constant bias voltages and currents. The bias generator is
decoupled at pin 3 to eliminate any effects from switching
transients. No DC loading is allowed on pin 3.
In order to conserve power, the gate drivers only provide
turn-on current for up to 2μs, set by internal one-shot
circuits. Each LT1158 driver can deliver 500mA for 2μs,
or 1000nC of gate charge––more than enough to turn on
multiple MOSFETs in parallel. Once turned on, each gate
is held high by a DC gate sustaining current: the bottom
gate by a 100μA current source, and the top gate by an
on-chip charge pump running at approximately 500kHz.
The top and bottom gate drivers in the LT1158 each utilize
two gate connections: 1) A gate drive pin, which provides
the turn-on and turn-off currents through an optional series
gate resistor; and 2) A gate feedback pin which connects
directly to the gate to monitor the gate-to-source voltage
and supply the DC gate sustaining current.
The floating supply for the top side driver is provided by
a bootstrap capacitor between the boost pin 16 and top
source pin 13. This capacitor is recharged each time pin 13
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8
LT1158
OPERATION
(Refer to Functional Diagram)
goes low in PWM operation, and is maintained by the charge
pump when the top MOSFET is on DC. A regulated boost
driver at pin 1 employs a source-referenced 15V clamp
that prevents the bootstrap capacitor from overcharging
regardless of V+ or output transients.
The LT1158 provides a current-sense comparator and fault
output circuit for protection of the top power MOSFET. The
comparator input pins 11 and 12 are normally connected
across a shunt in the source of the top power MOSFET
(or to a current-sensing MOSFET). When pin 11 is more
than 1.2V below V+ and V12 – V11 exceeds the 110mV
offset, FAULT pin 5 begins to sink current. During a short
circuit, the feedback loop regulates V12 – V11 to 150mV,
thereby limiting the top MOSFET current.
APPLICATIONS INFORMATION
Power MOSFET Selection
Since the LT1158 inherently protects the top and bottom
MOSFETs from simultaneous conduction, there are no size
or matching constraints. Therefore selection can be made
based on the operating voltage and RDS(ON) requirements.
The MOSFET BVDSS should be at least 2 • VSUPPLY, and
should be increased to 3 • VSUPPLY in harsh environments
with frequent fault conditions. For the LT1158 maximum
operating supply of 30V, the MOSFET BVDSS should be
from 60V to 100V.
The MOSFET RDS(ON) is specified at TJ = 25°C and is generally chosen based on the operating efficiency required as
long as the maximum MOSFET junction temperature is not
exceeded. The dissipation in each MOSFET is given by:
P =D (IDS ) (1+ ∂ ) RDS(ON)
and the available heat sinking has a thermal resistance of
20°C/W, the MOSFET junction temperature will be 125°C,
and ∂ = 0.007(125 – 25) = 0.7. This means that the required
RDS(ON) of the MOSFET will be 0.089Ω/1.7 = 0.0523Ω,
which can be satisfied by an IRFZ34.
Note that these calculations are for the continuous operating
condition; power MOSFETs can sustain far higher dissipations during transients. Additional RDS(ON)) constraints are
discussed under Starting High In-Rush Current Loads.
GATE DR
LT1158
RG
RG
GATE FB
2
RG: OPTIONAL 10Ω
where D is the duty cycle and ∂ is the increase in RDS(ON)
at the anticipated MOSFET junction temperature. From this
equation the required RDS(ON) can be derived:
RDS(ON) =
P
D (IDS ) (1+ ∂ )
2
For example, if the MOSFET loss is to be limited to 2W
when operating at 5A and a 90% duty cycle, the required
RDS(ON) would be 0.089Ω/(1 + ∂). (1 + ∂) is given for
each MOSFET in the form of a normalized RDS(ON) vs
temperature curve, but ∂ = 0.007/°C can be used as an
approximation for low voltage MOSFETs. Thus if TA = 85°C
1158 F01
Figure 1. Paralleling MOSFETs
Paralleling MOSFETs
MOSFETs can be paralleled. The MOSFETs will inherently
share the currents according to their RDS(ON) ratio. The
LT1158 top and bottom drivers can each drive four power
MOSFETs in parallel with only a small loss in switching
speeds (see Typical Performance Characteristics). Individual gate resistors may be required to “decouple” each
MOSFET from its neighbors to prevent high frequency
oscillations—consult manufacturer’s recommendations.
1158fb
9
LT1158
APPLICATIONS INFORMATION
If individual gate decoupling resistors are used, the gate
feedback pins can be connected to any one of the gates.
Driving multiple MOSFETs in parallel may restrict the
operating frequency at high supply voltages to prevent
over-dissipation in the LT1158 (see Gate Charge and
Driver Dissipation below). When the total gate capacitance
exceeds 10,000pF on the top side, the bootstrap capacitor
should be increased proportionally above 0.1μF.
Gate Charge and Driver Dissipation
A useful indicator of the load presented to the driver by a
power MOSFET is the total gate charge QG, which includes
the additional charge required by the gate-to-drain swing. QG
is usually specified for VGS = 10V and VDS = 0.8VDS(MAX).
When the supply current is measured in a switching application, it will be larger than given by the DC electrical
characteristics because of the additional supply current
associated with sourcing the MOSFET gate charge:
⎛ dQ ⎞
⎛ dQ ⎞
ISUPPLY = IDC + ⎜ G ⎟
+⎜ G⎟
⎝ dt ⎠ TOP ⎝ dt ⎠ BOTTOM
The actual increase in supply current is slightly higher
due to LT1158 switching losses and the fact that the gates
are being charged to more than 10V. Supply current vs
switching frequency is given in the Typical Performance
Characteristics.
The LT1158 junction temperature can be estimated by
using the equations given in Note 1 of the electrical characteristics. For example, the LT1158SI is limited to less
than 25mA from a 24V supply:
TJ
= 85°C + (25mA • 24V • 110°C/W)
= 151°C exceeds absolute maximum
In order to prevent the maximum junction temperature
from being exceeded, the LT1158 supply current must
be checked with the actual MOSFETs operating at the
maximum switching frequency.
MOSFET Gate Drive Protection
For supply voltages of over 8V, the LT1158 will protect
standard N-channel MOSFETs from under or overvoltage
gate drive conditions for any input duty cycle including
DC. Gate-to-source Zener clamps are not required and
not recommended since they can reduce operating
efficiency.
A discontinuity in tracking between the output pulse
width and input pulse width may be noted as the top side
MOSFET approaches 100% duty cycle. As the input low
signal becomes narrower, it may become shorter than
the time required to recharge the bootstrap capacitor to
a safe voltage for the top side driver. Below this duty cycle
the output pulse width will stop tracking the input until
the input low signal is <100ns, at which point the output
will jump to the DC condition of top MOSFET “on” and
bottom MOSFET “off.”
Low Voltage Operation
The LT1158 can operate from 5V supplies (4.5V min) and
in 6V battery-powered applications by using logic-level
N-channel power MOSFETs. These MOSFETs have 2V
maximum threshold voltages and guaranteed RDS(ON) limits
at VGS = 4V. The switching speed of the LT1158, unlike
CMOS drivers, does not degrade at low supply voltages.
For operation down to 4.5V, the boost pin should be connected as shown in Figure 2 to maximize gate drive to the
top side MOSFET. Supply voltages over 10V should not
be used with logic-level MOSFETs because of their lower
maximum gate-to-source voltage rating.
5V
N.C.
BOOST DR
BOOST
T GATE DR
LT1158
T GATE FB
D1
+
0.1μF
LOGIC-LEVEL
MOSFET
T SOURCE
D1: LOW-LEAKAGE SCHOTTKY
BAT85 OR EQUIVALENT
LT1158 F02
Figure 2. Low Voltage Operation
1158fb
10
LT1158
APPLICATIONS INFORMATION
Ugly Transient Issues
In PWM applications the drain current of the top MOSFET
is a square wave at the input frequency and duty cycle.
To prevent large voltage transients at the top drain, a low
ESR electrolytic capacitor must be used and returned to
the power ground. The capacitor is generally in the range
of 250μF to 5000μF and must be physically sized for
the RMS current flowing in the drain to prevent heating
and premature failure. In addition, the LT1158 requires a
separate 10μF capacitor connected closely between pins
2 and 7.
The LT1158 top source and sense pins are internally
protected against transients below ground and above
supply. However, the gate drive pins cannot be forced
below ground. In most applications, negative transients
coupled from the source to the gate of the top MOSFET
do not cause any problems. However, in some high current (10A and above) motor control applications, negative
transients on the top gate drive may cause early tripping
of the current limit. A small Schottky diode (BAT85) from
pin 15 to ground avoids this problem.
Switching Regulator Applications
The LT1158 is ideal as a synchronous switch driver to
improve the efficiency of step-down (buck) switching
regulators. Most step-down regulators use a high current
Schottky diode to conduct the inductor current when the
switch is off. The fractions of the oscillator period that the
switch is on (switch conducting) and off (diode conducting) are given by:
⎛V ⎞
SWITCH “ON” = ⎜ OUT ⎟ • TOTAL PERIOD
⎝ VIN ⎠
⎛V −V ⎞
SWITCH “OFF” = ⎜ IN OUT ⎟ • TOTAL PERIOD
VIN
⎝
⎠
Note that for VIN > 2VOUT, the switch is off longer than it
is on, making the diode losses more significant than the
switch. The worst case for the diode is during a short circuit, when VOUT approaches zero and the diode conducts
the short-circuit current almost continuosly.
Figure 3 shows the LT1158 used to synchronously drive a
pair of power MOSFETs in a step-down regulator application, where the top MOSFET is the switch and the bottom
MOSFET replaces the Schottky diode. Since both conduction paths have low losses, this approach can result in very
high efficiency—from 90% to 95% in most applications.
And for regulators under 5A, using low RDS(ON) N-channel
MOSFETs eliminates the need for heatsinks.
VIN
+
T GATE DR
T GATE FB
RGS
RSENSE
VOUT
T SOURCE
LT1158
FAULT
REF
PWM
SENSE+
+
SENSE–
B GATE DR
INPUT
B GATE FB
1158 F03
Figure 3. Adding Synchronous Switching to a Step-Down Switching Regulator
1158fb
11
LT1158
APPLICATIONS INFORMATION
Current Limit in Switching Regulator Applications
100
EFFICIENCY (%)
90
FIGURE 12 CIRCUIT
VIN = 12V
80
70
60
0
0.5
1.0 1.5 2.0 2.5 3.0
OUTPUT CURRENT (A)
3.5 4.0
LT1158 F04
Figure 4. Typical Efficiency Curve for Step-Down
Regulator with Synchronous Switch
One fundamental difference in the operation of a stepdown regulator with synchronous switching is that it
never becomes discontinuous at light loads. The inductor current doesn’t stop ramping down when it reaches
zero, but actually reverses polarity resulting in a constant
ripple current independent of load. This does not cause
any efficiency loss as might be expected, since the negative inductor current is returned to VIN when the switch
turns back on.
The LT1158 performs the synchronous MOSFET drive
and current sense functions in a step-down switching
regulator. A reference and PWM are required to complete
the regulator. Any voltage-mode PWM controller may be
used, but the LT3525 is particularly well suited to high
power, high efficiency applications such as the 10A circuit
shown in Figure 13. In higher current regulators a small
Schottky diode across the bottom MOSFET helps to reduce
reverse-recovery switching losses.
The LT1158 input pin can also be driven directly with a
ramp or sawtooth. In this case, the DC level of the input
waveform relative to the 1.4V threshold sets the LT1158
duty cycle. In the 5V to 3.3V converter circuit shown in
Figure 11, an LT1431 controls the DC level of a triangle wave
generated by a CMOS 555. The Figure 10 and 12 circuits
use an RC network to ramp the LT1158 input back up to
its 1.4V threshold following each switch cycle, setting a
constant off time. Figure 4 shows the efficiency vs output
current for the Figure 12 regulator with VIN = 12V.
Current is sensed by the LT1158 by measuring the voltage
across a current shunt (low valued resistor). Normally, this
shunt is placed in the source lead of the top MOSFET (see
Short-Circuit Protection in Bridge Applications). However,
in step-down switching regulator applications, the remote
current sensing capability of the LT1158 allows the actual
inductor current to be sensed. This is done by placing
the shunt in the output lead of the inductor as shown in
Figure 3. Routing of the SENSE+ and SENSE– PC traces
is critical to prevent stray pickup. These traces must be
routed together at minimum spacing and use a Kelvin
connection at the shunt.
When the voltage across RSENSE exceeds 110mV, the
LT1158 FAULT pin begins to conduct. By feeding the FAULT
signal back to a control input of the PWM, the LT1158 will
assume control of the duty cycle forming a true current
mode loop to limit the output current:
IOUT =
110mV
in current limit
RSENSE
In LT3525 based circuits, connecting the FAULT pin to
the LT3525 soft-start pin accomplishes this function. In
circuits where the LT1158 input is being driven with a ramp
or sawtooth, the FAULT pin is used to pull down the DC
level of the input.
The constant off-time circuits shown in Figures 10 and 12
are unique in that they also use the current sense during
normal operation. The LT1431 output reduces the normal
LT1158 110mV fault conduction threshold such that the
FAULT pin conducts at the required load current, thus
discharging the input ramp capacitor. In current limit the
LT1431 output turns off, allowing the fault conduction
threshold to reach its normal value.
The resistor RGS shown in Figure 3 is necessary to prevent
output voltage overshoot due to charge coupled into the
gate of the top MOSFET by a large start-up dv/dt on VIN.
If DC operation of the top MOSFET is required, RGS must
be 330k or greater to prevent loading the charge pump.
1158fb
12
LT1158
APPLICATIONS INFORMATION
Low Current Shutdown
The LT1158 may be shutdown to a current level of 2mA by
pulling the enable pin 4 low. In this state both the top and
bottom MOSFETs are actively held off against any transients
which might occur on the output during shutdown. This
is important in applications such as 3-phase DC motor
control when one of the phases is disabled while the other
two are switching.
If zero standby current is required and the load returns to
ground, then a switch can be inserted into the supply path
of the LT1158 as shown in Figure 5. Resistor RGS ensures
that the top MOSFET gate discharges, while the voltage
across the bottom MOSFET goes to zero. The voltage drop
across the P-channel supply switch must be less than
300mV, and RGS must be 330k or greater for DC operation.
This technique is not recommended for applications which
require the LT1158 VDS sensing function.
(Figure 6). For the current-sensing MOSFET shown in
Figure 7, the sense resistor is inserted between the sense
and Kelvin leads.
The SENSE+ and SENSE– PC traces must be routed together
at minimum spacing to prevent stray pickup, and a Kelvin
connection must be used at the current shunt for the 3-lead
MOSFET. Using a twisted pair is the safest approach and
is recommended for sense runs of several inches.
When the voltage across RSENSE exceeds 110mV, the
LT1158 FAULT pin begins to conduct, signaling a fault
condition. The current in a short circuit ramps very rapidly,
limited only by the series inductance and ultimately the
MOSFET and shunt resistance. Due to the response time
V+
+
T GATE DR
T GATE FB
+
V
T SOURCE
5V
+
100k
T GATE DR
VP0300
V+
2N2222
SENSE+
RSENSE
10k
SENSE–
FAULT
T GATE FB
RGS
V+
100k
LT1158
T SOURCE
+
CMOS
ON/OFF
TO OTHER
CONTROL
CIRCUITS
1158 F06
LT1158
LOAD
GND
Figure 6. Short-Circuit Protection with Standard MOSFET
B GATE DR
V+
B GATE FB
+
1158 F05
T GATE DR
Figure 5. Adding Zero Current Shutdown
T GATE FB
SENSE
Short-Circuit Protection in Bridge Applications
The LT1158 protects the top power MOSFET from output
shorts to ground, or in a full bridge application, shorts
across the load. Both standard 3-lead MOSFETs and current-sensing 5-lead MOSFETs can be protected. The bottom
MOSFET is not protected from shorts to supply.
KELVIN
T SOURCE
5V
LT1158
SENSE+
RSENSE
OUTPUT
10k
FAULT
SENSE–
1158 F07
Current is sensed by measuring the voltage across a current shunt in the source lead of a standard 3-lead MOSFET
Figure 7. Short-Circuit Protection with Current-Sensing MOSFET
1158fb
13
LT1158
APPLICATIONS INFORMATION
5A/DIV
of the LT1158 current limit loop, an initial current spike of
from 2 to 5 times the final value will be present for a few
μs, followed by an interval in which IDS = 0. The current
spike is normally well within the safe operating area (SOA)
of the MOSFET, but can be further reduced with a small
(0.5μH) inductor in series with the output.
the value of RSENSE for the 5-lead MOSFET increases by
the current sensing ratio (typically 1000 – 3000), thus
eliminating the need for a low valued shunt. ΔV is in the
range of 1V to 3V in most applications.
Assuming a dead short, the MOSFET dissipation will rise
to VSUPPLY • ISC. For example, with a 24V supply and ISC
= 10A, the dissipation would be 240W. To determine how
long the MOSFET can remain at this dissipation level before
it must be shut down, refer to the SOA curves given in
the MOSFET data sheet. For example, an IRFZ34 would
be safe if shut down within 10ms.
A Tektronix A6303 current probe is highly recommended
for viewing output fault currents.
ISC
If Short-Circuit Protection is Not Required
5μs/DIV
LT1158 F08
Figure 8. Top MOSFET Short-Circuit Turn-On current
If neither the enable nor input pins are pulled low in
response to the fault indication, the top MOSFET current
will recover to a steady-state value ISC regulated by the
LT1158 as shown in Figure 8:
ISC =
150mV
RSENSE
RSENSE =
150mV
ISC
r (150mV ) ⎛ 150mV ⎞ −2
ISC =
1−
RSENSE ⎜⎝
ΔV ⎟⎠
r (150mV ) ⎛ 150mV ⎞ −2
RSENSE =
⎜⎝ 1− ΔV ⎟⎠
ISC
r = current sense ratio, ΔV = VGS = VGS − VT
The time for the current to recover to ISC following the
initial current spike is approximately QGS/0.5mA, where
QGS is the MOSFET gate-to-source charge. ISC need not
be set higher than the required start-up current for motors (see Starting High In-Rush Current Loads). Note that
In applications which do not require the current sense
capability of the LT1158, the sense pins 11 and 12 should
both be connected to pin 13, and the FAULT pin 5 left
open. The enable pin 4 may still be used to shut down
the device. Note, however, that when unprotected the top
MOSFET can be easily (and often dramatically) destroyed
by even a momentary short.
Self-Protection with Automatic Restart
When using the current sense circuits of Figures 6 and 7,
local shutdown can be achieved by connecting the FAULT
pin through resistor RF to the enable pin as shown in
Figure 9. An optional thermostat mounted to the load or
MOSFET heatsink can also be used to pull enable low.
An internal 25μA current source normally keeps the enable
capacitor CEN charged to the 7.5V clamp voltage (or to V+,
for V+ < 7.5V). When a fault occurs, CEN is discharged to
below the enable low threshold (1.15V typ) which shuts
down both MOSFETs. When the FAULT pin or thermostat
releases, CEN recharges to the upper enable threshold
where restart is attempted. In a sustained short circuit,
FAULT will again pull low and the cycle will repeat until the
short is removed. The time to shut down for a DC input
or thermal fault is given by:
tSHUTDOWN = (100 + 0.8RF) CEN
DC input
1158fb
14
LT1158
APPLICATIONS INFORMATION
Note that for the first event only, tSHUTDOWN is approximately
twice the above value since CEN is being discharged all
the way from its quiescent voltage. Allowable values for
RF are from zero to 10k.
7.5V
1.15V
25μA
ENABLE
CEN
1μF
SENSE– pin is within 1.2V of supply. Under these conditions the current is limited only by the RDS(ON) in series
with RSENSE. For a 5-lead MOSFET the current is limited
by RDS(ON) alone, since RSENSE is not in the output path
(see Figure 7). Again adjusting RDS(ON) for temperature,
the worst-case start currents are:
(1+ ∂) RDS(ON) + RSENSE
ISTART =
1.2V
(1+ ∂) RDS (ON)
+
7.5V
RF
1k
LT1158
1.2V
ISTART =
3-Lead MOSFET
5-Lead MOSFET
FAULT
Properly sizing the MOSFET for ISTART allows inductive
loads with long time constants, such as motors with high
mechanical inertia, to be started.
OPTIONAL THERMOSTAT
CLOSE ON RISE
AIRPAX #67FXXX
1158 F09
Figure 9. Self-Protection with Auto Restart
tSHUTDOWN becomes more difficult to analyze when the
output is shorted with a PWM input. This is because the
FAULT pin only conducts when fault currents are actually
present in the MOSFET. FAULT does not conduct while the
input is low in Figures 6 and 7 or during the interval IDS =
0 in Figure 8. Thus tSHUTDOWN will safely increase when
the duty cycle of the current in the top MOSFET is low,
maintaining the average MOSFET current at a relatively
constant level.
The length of time following shutdown before restart is
attempted is given by:
(
)
⎛ 1.5V ⎞
t RESTART = ⎜
C = 6 × 10 4 CEN
⎝ 25μA ⎟⎠ EN
In Figure 9, the top MOSFET would shut down after being
in DC current limit for 0.9ms and try to restart at 60ms
intervals, thus producing a duty cyle of 1.5% in short
circuit. The resulting average top MOSFET dissipation
during a short is easily measured by taking the product of
the supply voltage and the average supply current.
Starting High In-Rush Current Loads
The LT1158 has a VDS sensing function which allows more
than ISC to flow in the top MOSFET providing that the
Returning to the example used in Power MOSFET Selection, an IRFZ34 (RDS(ON) = 0.05Ω max) was selected for
operation at 5A. If the short-circuit current is also set at 5A,
what start current can be supported? From the equation
for RSENSE, a 0.03Ω shunt would be required, allowing
the worst-case start current to be calculated:
ISTART =
1 .2V
= 10 A
(1.7) 0.05 Ω +0.03Ω
This calculation gives the minimum current which could
be delivered with the IRFZ34 at TJ = 125°C without activating the FAULT pin on the LT1158. If more start current is
required, using an IRFZ44 (RDS(ON) = 0.028Ω max) would
increase ISTART to over 15A at TJ = 110°C, even though
the short-circuit current remains at 5A.
In order for the VDS sensing function to work properly, the
supply pins for the LT1158 must be connected at the drain
of the top MOSFET, which must be properly decoupled
(see Ugly Transient Issues).
Driving Lamps
Incandescent lamps represent a challenging load because
they have much in common with a short circuit when cold.
The top gate driver in the LT1158 can be configured to turn
on large lamps while still protecting the power MOSFET
1158fb
15
LT1158
APPLICATIONS INFORMATION
from a true short. This is done by using the current limit to
control cold filament current in conjunction with the selfprotection circuit of Figure 9. The reduced cold filament
current also extends the life of the filament.
down the top MOSFET. The LT1158 will then go into the
automatic restart mode described in Self-Protection with
Automatic Restart above.
The time constant for an incandescent filament is tens
of milliseconds, which means that tSHUTDOWN will have
to be longer than in most other applications. This places
increased SOA demands on the MOSFET during a short
circuit, requiring that a larger than normal device be used.
A protected high current lamp driver application is shown
in Figure 18.
A good guideline is to choose RSENSE to set ISC at approximately twice the steady state “on” current of the
lamp(s). tSHUTDOWN is then made long enough to guarantee that the lamp filaments heat and drop out of current
limit before the enable capacitor discharges to the enable
low threshold. For a short-circuit, the enable capacitor
will continue to discharge below the threshold, shutting
TYPICAL APPLICATIONS
5V TO 10V INPUT (USE LOGIC-LEVEL Q1, Q2)
8V TO 20V INPUT (USE STANDARD Q1, Q2
AND CONNECT BOOST DIODE TO PIN 1)
1N4148
100k
s
1
VP0300
2
0.01μF
3
INSERT FOR
ZERO POWER
SHUTDOWN
4
+
100k
10μF
2N2222
5
CMOS
ON/OFF
6
7
8
Q1, Q2: IRLZ44 (LOGIC-LEVEL)
IRFZ44 (STANDARD)
BOOST
+
T GATE DR
BIAS
T GATE FB
ENABLE
T SOURCE
V
FAULT
INPUT
GND
B GATE FB
LT1158
SENSE
16
500μF
LOW ESR
15
14
0.1μF
680k
L1
22μH
13
+
+ 12
100Ω
11
100Ω
SENSE–
+
Q1
SHORT-CIRCUIT
RS CURRENT = 8A
0.015Ω
+3.3V/6A
OUTPUT
–
+
Q2
B GATE DR
9
510Ω
1.62k
1%
1N4148
CONSTANT OFF TIME CURRENT MODE CONTROL LOOP
8
1
1000pF
RS: VISHAY/DALE TYPE LVR-3
VISHAY/ULTRONIX RCS01, SM1
ISOTEK CORP. ISA-PLAN SMR
0.05μF
1k
7
2
3
4
LT1431
6
4.99k
1%
200pF
5
V
1
1 – OUT WHERE tOFF ≈ 10μs
tOFF
VIN
(
1000μF
LOW ESR
10
V+
24k
L1: HURRICANE LAB
HL-KK122T/BB
FREQUENCY =
BOOST DR
)
LT1158 F10
Figure 10. High Efficiency 3.3V Step-Down Switching Regulator (Requires No Heatsinks)
1158fb
16
LT1158
TYPICAL APPLICATIONS
DRIVER SUPPLY 10V TO 15V
(CAN BE POWERED FROM VIN
WITH LOGIC-LEVEL Q1, Q2)
0.33μF
16k
0.01μF
+
10μF
1
8
2
7
LT1431
3
3.3k
1
2
200pF
6
3
4.99k
1%
SHUTDOWN
4
5
1000pF
1
24k
6
8
470pF
7
2
CMOS
555
3
BOOST DR
BOOST
V+
T GATE DR
16
6
RX
1%
7
8
BIAS
T GATE FB
ENABLE
T SOURCE
LT1158
FAULT
INPUT
SENSE–
11
V+
10
220μF
10V
OS-CON s 4
Q1
0.22μF
500k
L1
8μH
13
12
B GATE DR
B GATE FB
14
SENSE+
GND
+
BAS16
15
0.01μF
5
4
VIN 4.5V TO 6V
SHORT-CIRCUIT
CURRENT = 22A
RS
+
–
+
0.01Ω
EA
9
VOUT
15A
330μF
6.3V
AVX s 4
Q2
5
4
LT1158 F11
VOUT
2.90V 3.05V
3.30V
3.45V 3.60V
RX (1%)
806Ω
1.62k
1.91k
1.10k
L1: COILTRONICS CTX02-12171-1
RS: KRL/BANTRY SL-1R010J s 2
Q1, Q2: MTB75N05HD (USE WITH 10V TO 15V DRIVER SUPPLY)
MTB75N03HDL (USE WITH VIN DRIVER SUPLY)
CMOS 555: LMC555 OR TLC555
2.21k
Figure 11. 5V to 3.XXV,15A Converter (Uses PC Board Area for Heatsink)
8V TO 20V INPUT
1N4148
100k
s
1
BOOST DR
BOOST
16
IRFZ34
VP0300
2
0.01μF
INSERT FOR
ZERO POWER
SHUTDOWN
3
4
+
100k
10μF
2N2222
CMOS
ON/OFF
5
6
+
T GATE DR
BIAS
T GATE FB
V
ENABLE
FAULT
INPUT
T SOURCE
LT1158
+
500μF
LOW ESR
15
14
SHORT-CIRCUIT
CURRENT = 6A
510k
0.1μF
L1
50μH
13
SENSE+
12
100Ω
SENSE–
11
100Ω
V+
10
RS
20mΩ
+
–
+
+5V/4A
OUTPUT
1000μF
LOW ESR
IRFZ44
7
8
GND
B GATE FB
B GATE DR
9
24k
510Ω
L1: COILTRONICS
CTX50-5-52
1N4148
0.05μF
RS: VISHAY/DALE TYPE LVR-3
VISHAY/ULTRONIX RCS01, SM1
ISOTEK CORP. ISA-PLAN SMR
V
FREQUENCY =
1 – OUT
tOFF
VIN
1
(
) WHERE t
1k
SEE FIGURE 4 FOR EFFICIENCY CURVE
7
2
3
CONSTANT OFF TIME CURRENT MODE CONTROL LOOP
8
1
1000pF
LT1431
4
OFF ≈ 10μs
6
5
LT1158 F12
Figure 12. High Efficiency 5V Step-Down Switching Regulator (Requires No Heatsinks)
1158fb
17
LT1158
TYPICAL APPLICATIONS
INPUT
30V MAX
SHUTDOWN
4.7k
0.01μF
1N4148
4.7k
1μF
16
0.1μF
*3.4k
1
+
1
15
2
2
+
EXT
SYNC
30k
f = 25kHz
3
14 10μF
4
13
2.2nF
0.01μF
3
4
1N4148
BOOST DR
V+
T GATE DR
BIAS
T GATE FB
ENABLE
T SOURCE
LT3525
12
5
0.01μF
6
11
7
10
8
9
5
1N4148
6
BOOST
LT1158
FAULT
SENSE+
+
16
+
500μF EA
LOW ESR
IRFZ44
15
SHORT-CIRCUIT
CURRENT = 15A
0.1μF
14
330k
13
L1
70μH
RS
0.007Ω
+
–
12
+
11
SENSE–
INPUT
5V OR
12V*
1000μF
LOW ESR
27k
+
510Ω
7
1μF
*
330pF
10k
8
V+
GND
B GATE FB
B GATE DR
(2) IRFZ44
10
9
MBR340
LT1158 F13
* ADD THESE COMPONENTS TO IMPLEMENT
RS: DALE TYPE LVR-3
L1: MAGNETICS CORE #55585-A2
ULTRONIX RCS01
30 TURNS 14GA MAGNET WIRE
LOW-DROPOUT 12V REGULATOR
Figure 13. 90% Efficiency 24V to 5V 10A Switching Regulator
95% Efficiency 24V to 12V 10A Low Dropout Switching Regulator
MOTOR SPEED
0 TO 100%
10V TO 30V
5.1k
1N4148
10k
+
1
1N5231A
1μF
BOOST DR
BOOST
16
7.5k
2
+
0.01μF
3
10μF
13k
1
8
2
7
3
4
CMOS
555
0.33μF
1k
6
5
4
5
6
2.2nF
510Ω
7
8
THE CMOS 555 IS USED AS A 25kHz TRIANGLE-WAVE
OSCILLATOR DRIVING THE LT1158 INPUT PIN. THE
D.C. LEVEL OF THE TRIANGLE WAVE IS SET BY THE
POTENTIOMETER ON THE CMOS 555 SUPPLY PIN, AND
ALLOW ADJUSTMENT OF THE LT1158 DUTY CYCLE
FROM 0 TO 100%.
V+
T GATE DR
BIAS
T GATE FB
ENABLE
T SOURCE
FAULT
INPUT
GND
B GATE FB
LT1158
15
+
0.1μF
14
1000μF
LOW ESR
Q1
13
SENSE+
12
SENSE–
11
V+
10
B GATE DR
24Ω
9
+
START CURRENT
= 15A MINIMUM
0.02Ω
–
24Ω
Q2
CMOS 555: LMC555 OR TLC555
Q1, Q2: MTP35N06E
-
LT1158 F14
Figure 14. Potentiometer-Adjusted Open Loop Motor Speed Control with Short-Circuit Protection
1158fb
18
LT1158
TYPICAL APPLICATIONS
7.2V
NOMINAL
+
BAT85
1
2
+
0.01μF
10μF
STOP
(FREE RUN)
3
1N4148
4
+
1k
1μF
5
6
PWM
7
8
BOOST DR
BOOST
V+
T GATE DR
BIAS
T GATE FB
ENABLE
T SOURCE
FAULT
INPUT
LT1158
B GATE FB
15
15Ω
0.1μF
14
Q1
13
+
12
SENSE+
B GATE DR
–
10
9
START CURRENT
= 25A MINIMUM
RS
0.015Ω
11
SENSE–
V+
GND
100μF
16
15Ω
Q2
-
LT1158 F15
Q1, Q2: IRLZ44 (LOGIC-LEVEL)
RS: DALE TYPE LVR-3
ULTRONIX RCS01
Figure 15. High Efficiency 6-Cell NiCd Protected Motor Drive
V+
V+
LT1158
ENABLE
FAULT
5V
INPUT
V+
LT1158
LT1158
ENABLE
FA
FAULT
ENABLE
FB
INPUT
FAULT
FC
INPUT
SHUTDOWN
COMMUTATING LOGIC
PWM CONTROLS
LT1158 INPUTS
POSITION FEEDBACK
CONTROLS LT1158
ENABLE INPUTS
1158 F16
Figure 16. 3-Phase Brushless DC Motor Control
1158fb
19
LT1158
TYPICAL APPLICATIONS
1N4148
1
BOOST DR
2
V
0.01μF
3
ENABLE A
4
+
10μF
FAULT A
5
BOOST
+
T GATE DR
BIAS
T GATE FB
ENABLE
T SOURCE
FAULT
6
INPUT A
LT1158
INPUT
7
14
15Ω
+
Q1
D1
SIDE A: SHOWS
STANDARD MOSFET
CONNECTION
470μF
LOW
ESR
13
12
SENSE–
11
V+
10
B GATE DR
B GATE FB
0.1μF
15
SENSE+
GND
8
10V TO 30V
16
+
RS
0.015Ω
–
9
Q2
2.4k
15Ω
1N4148
1
2
BOOST DR
BOOST
V+
T GATE DR
BIAS
T GATE FB
15
0.01μF
3
4
ENABLE B
+
10μF
5
FAULT B
6
INPUT B
7
8
ENABLE
FAULT
T SOURCE
LT1158
INPUT
GND
B GATE FB
14
470μF
LOW
ESR
Q3
15Ω
SIDE B: SHOWS
CURRENT-SENSING
MOSFET CONNECTION
0.1μF
D2
+
–
13
SENSE+
12
SENSE–
11
V+
10
B GATE DR
+
16
9
2.4k
47Ω
Q4
Q1, Q3: IRF540 (STANDARD)
IRC540 (SENSE FET)
Q2, Q4: IRFZ44
D1, D2: BAT83
RS: DALE TYPE LVR-3
ULTRONIX RCS01
15Ω
LT1158 F17a
Control Logic for Locked Anti-Phase Drive
Motor stops if either side is shorted to ground
Control Logic for Sign/Magnitude Drive
5V
ENABLE A
74HC132
FAULT A
74HC02
5.1k
ENABLE A
0.01μF
INPUT A
FAULT A
INPUT A
PWM
PWM
DIRECTION
STOP
(FREE RUN)
1N4148
ENABLE B
+
1μF
FAULT B
150k
0.1μF
INPUT B
1158F17b
ENABLE B
1N4148
FAULT B
INPUT B
1158F17c
Figure 17. 10A Full Bridge Motor Control
1158fb
20
LT1158
PACKAGE DESCRIPTION
N Package
16-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510)
.770*
(19.558)
MAX
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
.255 ± .015*
(6.477 ± 0.381)
.130 ± .005
(3.302 ± 0.127)
.300 – .325
(7.620 – 8.255)
.020
(0.508)
MIN
.008 – .015
(0.203 – 0.381)
(
+.035
.325 –.015
+0.889
8.255
–0.381
.045 – .065
(1.143 – 1.651)
.065
(1.651)
TYP
.120
(3.048)
MIN
)
.018 ± .003
(0.457 ± 0.076)
.100
(2.54)
BSC
NOTE:
1. DIMENSIONS ARE
INCHES
MILLIMETERS
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
N16 1002
SW Package
16-Lead Plastic Small Outline (Wide .300 Inch)
(Reference LTC DWG # 05-08-1620)
.050 BSC .045 ±.005
.030 ±.005
TYP
.398 – .413
(10.109 – 10.490)
NOTE 4
16
N
15
14
13
12
11
10
9
N
.325 ±.005
.420
MIN
.394 – .419
(10.007 – 10.643)
NOTE 3
1
2
3
N/2
N/2
RECOMMENDED SOLDER PAD LAYOUT
1
.291 – .299
(7.391 – 7.595)
NOTE 4
.010 – .029 × 45°
(0.254 – 0.737)
.005
(0.127)
RAD MIN
2
3
4
5
6
.093 – .104
(2.362 – 2.642)
7
8
.037 – .045
(0.940 – 1.143)
0° – 8° TYP
.009 – .013
(0.229 – 0.330)
NOTE 3
.016 – .050
(0.406 – 1.270)
NOTE:
1. DIMENSIONS IN
.050
(1.270)
BSC
.004 – .012
(0.102 – 0.305)
.014 – .019
(0.356 – 0.482)
TYP
INCHES
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS.
THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS
4. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
S16 (WIDE) 0502
1158fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
21
LT1158
TYPICAL APPLICATION
12V
1N4148
1
2
+
10μF
0.01μF
3
4
+
10μF
6.2k
5
6
ON/OFF
7
8
BOOST DR
BOOST
V+
T GATE DR
BIAS
T GATE FB
ENABLE
T SOURCE
FAULT
INPUT
GND
B GATE FB
LT1158
1000μF
IRCZ44
15
14
0.1μF
+
–
13
SENSE+
12
SENSE–
11
V+
10
B GATE DR
+
16
12V
55W
MBR330
51Ω
9
ISC: 10A
tSHUTDOWN = 50ms
tRESTART = 600ms
LT1158 F18
Figure 18. High Current Lamp Driver with Short-Circuit Protection
1158fb
22 Linear Technology Corporation
LT 0309 REV B • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
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© LINEAR TECHNOLOGY CORPORATION 1994