SY89251V Enhanced Differential Receiver General Description Features The SY89251V is a differential PECL/ECL receiver/buffer • 3.3V and 5V power supply options in a space saving (2mm x 2mm) DFN package. The device • 250ps propagation delay is functionally equivalent to the SY100EL16VC, except for • Very high voltage gain an active HIGH enable pin and a 70% smaller footprint. It • Ideal for pulse amplifier and limiting amplifier is also equivalent to the SY89250V, except for an active applications HIGH enable pin. It provides a VBB output for either • Data synchronous enable/disable (EN) on QHG and single-ended application or as a DC bias for AC-coupling /QHG provides for complete glitchless gating of the to the device. outputs The SY89251V provides an EN input which is • Ideal for gating timing signals synchronized with the data input (D) signal in a way that provides glitchless gating of the QHG and /QHG outputs. • Complete solution for high quality, high frequency crystal oscillator applications When the EN signal is HIGH, the input is passed to the outputs and the data output equals the data input. When • Available in an ultra-small 8-pin (2mm x 2mm) the data input is HIGH and the EN goes LOW, it will force DFN package the QHG LOW and the /QHG HIGH on the next negative Applications transition of the data input. If the data input is LOW when the EN goes LOW, the next data transition to a HIGH is • Oscillator modules ignored and QHG remains LOW and /QHG remains HIGH. The next positive transition of the data input is not passed on to the data outputs under these conditions. The QHG and /QHG outputs remain in their disabled state as long as the EN input is held LOW. The EN input has no influence on the /Q output and the data input is passed on (inverted) to this output whether EN is HIGH or LOW. This configuration is ideal for crystal oscillator applications, where the oscillator can be free running and gated on and off synchronously without adding extra counts to the output. Datasheets and support documentation can be found on Micrel’s web site at: www.micrel.com. ___________________________________________________________________________________________________________ Block Diagram Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com June 2010 M9999-060410-A [email protected] or (408) 955-1690 Micrel, Inc. SY89251V Ordering Information(1) Part Number Package Type Operating Range Package Marking Lead Finish SY89251VMI DFN-8 Industrial 251 Sn-Pb SY89251VMITR(2) DFN-8 Industrial 251 Sn-Pb SY89251VMG DFN-8 Industrial 251 with Pb-Free bar-line indicator Pb-Free NiPdAu SY89251VMGTR(2) DFN-8 Industrial 251 with Pb-Free bar-line indicator Pb-Free NiPdAu Notes: 1. Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC electricals only. 2. Tape and Reel. Truth Table Pin Configuration EN QHG Output 0 Logic Low 1 Data 8-Pin DFN (Ultra-Small Outline) Pin Description Pin Number Pin Name Type Pin Function 1 /Q 100k Single-Ended PECL/ECL Feedback Output. 2 D 100k Single-Ended PECL/ECL Input: The signal input includes an internal 75k Ω pulldown resistor. If input is left open, Q output will default to LOW. 3 VBB Reference Output Voltage Bias Voltage: VCC–1.3V. Used as reference voltage when AC-coupling to the D input. Max sink/source current is ±0.5mA. 4 EN Enable Input 5 VEE Exposed Pad Negative Power Supply 6, 7 /QHG, QHG 100k 8 VCC Positive Power Supply June 2010 EN Input which is synchronized with data input (D) signal in a way that provides glitchless gating of QHG and /QHG outputs. Includes internal 75k Ω pull-up resistor. Default is HIGH. Negative Power Supply: VEE and exposed pad must be tied to most negative supply. For PECL/LVPECL connect to ground. Differential PECL/ECL Output: QHG defaults to LOW and /QHG defaults to HIGH if D input is left open. See “Output Interface Applications” section for recommendations on terminations. Positive Power Supply: Bypass with 0.1µF//0.01µF low ESR capacitors as close to VCC pin as possible. 2 M9999-060410-A [email protected] or (408) 955-1690 Micrel, Inc. SY89251V Absolute Maximum Ratings(1) Operating Ratings(2) Power Supply Voltage (VCC)......................... –0.5V to +6.0V ECL Input Voltage (VIN) ..............................0V to VCC +0.5V Voltage Applied to Output at HIGH State (VOUT) ........................................................ –0.5V to VCC Output Current (IOUT) Continuous ............................................................ 50mA Surge………………………………………………..100mA Lead Temperature (soldering, 20 sec.) ...................... 260°C Storage Temperature (TS) ........................ –65°C to +150°C Power Supply Voltage |VCC–VEE| ............. 3.3V ±10% or 5V ±10% Ambient Temperature (TA) .......................... –40°C to +85°C Package Thermal Resistance,(3) DFN (θJA) Still-Air ........................................................... 93°C/W DFN (ψJB) ........................................................... 60°C/W DC Electrical Characteristics(4) TA = –40°C to +85°C, unless noted. Symbol Parameter Condition Min Typ Max Units VEE Power Supply |VCC–VEE| |VCC–VEE| 3.0 4.5 3.3 5.0 3.6 5.5 V V IEE Power Supply Current 46 mA IIL Input Low Current VBB Output Reference Voltage EN -150 µA VCC –1.38 VCC –1.32 VCC –1.26 V DC Electrical Characteristics(4) VCC = +3.3V ±10% or +5V ±10% and VEE = 0V; VCC = 0V and VEE = –3.3V ±10% or –5V ±10%; TA = –40°C to +85°C; unless noted. Symbol Parameter Condition VOH Output HIGH Voltage Note 4 VOL Output LOW Voltage Note 4 VIH Input HIGH Voltage VIL Input LOW Voltage VPP Minimum Input Swing Min Typ Max Units VCC–1.085 VCC–0.880 V VCC–1.830 VCC–1.555 V VCC–1.165 VCC–0.880 V VCC–1.810 VCC–1.475 V 150 IIH Input HIGH Current D IIL Input LOW Current D mV 150 0.5 µA µA Notes: 1. Exceeding the absolute maximum rating may damage the device. 2. The device is not guaranteed to function outside its operating rating. 3. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB. 4. Output loaded with 50Ω to VCC–2V. June 2010 3 M9999-060410-A [email protected] or (408) 955-1690 Micrel, Inc. SY89251V AC Electrical Characteristics VEE = VEE (min) to VEE (max); VCC = GND; TA = –40°C to +85°C; unless noted. Symbol Parameter tpd Propagation Delay to: /Q Output QHG, /QHG Output Condition Min Typ Max Units D (Diff) D (SE) 380 430 ps ps D (Diff) D (SE) 730 780 ps ps tS Set-Up Time EN 150 ps tH Hold Time EN 150 ps tSKEW Duty Cycle Skew VPP Minimum Input Swing Note 6 150 VCMR Common Mode Range Note 7 -1.3 tr , tf Output /Q and QHG, /QHG Rise/Fall Times (20% to 80%) At full output swing 100 (Diff) Note 5 5 20 ps mV 225 -0.4 V 350 ps Notes: 5. Duty cycle skew is the difference between a tpd propagation delay through a device. 6. Minimum input swing for which AC parameters are guaranteed. The device has a DC gain of ≈ 40 to Q, /Q outputs and a DC gain of ≈ 200 or higher to /QHG, QHG outputs. 7. The CMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between VPP(min) and 1V. The lower end of the CMR range varies 1:1 with VEE. The numbers in the spec table assume a nominal VEE = –3.3V. Note for PECL operation, the VCMR(min) will be fixed at 3.3V – |VCMR(min)|. Timing Diagram June 2010 4 M9999-060410-A [email protected] or (408) 955-1690 Micrel, Inc. SY89251V Output Interface Applications Figure 1b. Three Resistor “Y” Termination Figure 1a. Parallel Thevenin-Equivalent Termination Figure 1c. Terminating Unused I/O June 2010 5 M9999-060410-A [email protected] or (408) 955-1690 Micrel, Inc. SY89251V Package Information 8-Pin Ultra-Small EPAD-DFN June 2010 6 M9999-060410-A [email protected] or (408) 955-1690 Micrel, Inc. SY89251V PCB Thermal Consideration for 8-Pin DFN Package Package Notes: 1. Packaging meets Leve 2 qualification. 2. All pasrts are dry-packaged before shipment. 3. Exposed pads must be soldered to a ground for proper thermal management. MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. © 2009 Micrel, Incorporated. June 2010 7 M9999-060410-A [email protected] or (408) 955-1690