MP1469 High-Efficiency, 1.5A, 16V, 500kHz Synchronous, Step-Down Converter In 6 Pin SOT 23 The Future of Analog IC Technology DESCRIPTION FEATURES The MP1469 is a high-frequency, synchronous, rectified, step-down, switch-mode converter with internal power MOSFETs. It offers a very compact solution to achieve a 1.5A continuous output current over a wide input supply range, with excellent load and line regulation. The MP1469 has synchronous-mode operation for higher efficiency over the output current-load range. • • • • • • Current-mode operation provides fast transient response and eases loop stabilization. Protection features include protection and thermal shutdown. • • • • • over-current The MP1469 requires a minimal number of readily-available, standard, external components and is available in a space-saving 6-pin TSOT23 package. Wide 4.7V-to-16V Operating Input Range 255mΩ/160mΩ Low-RDS(ON) Internal Power MOSFETs Proprietary Switching-Loss–Reduction Technique High-Efficiency Synchronous-Mode Operation Fixed 500kHz Switching Frequency AAM Power-Save Mode for High Efficiency at Light Load Internal Soft-Start Over-Current Protection and Hiccup Thermal Shutdown Output Adjustable from 0.8V Available in a 6-pin TSOT-23 package APPLICATIONS • • • • GameStations Digital Set-Top Boxes Flat-Panel Television and Monitors General Purposes All MPS parts are lead-free and adhere to the RoHS directive. For MPS green status, please visit MPS website under Products, Quality Assurance page. “MPS” and “The Future of Analog IC Technology” are registered trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION VIN 1 4 100 U1 95 3.3V/1.5A MP1469 SW 3 GND EN BST IN 5 FB 6 EN GND 2 R3 59k R1 40.2k 90 VOUT 85 80 75 70 R2 13k 65 60 55 50 0.01 MP1469 Rev. 1.01 8/26/2013 0.1 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 1 10 1 MP1469 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS ORDERING INFORMATION Part Number* MP1469GJ Package TSOT23-6 Top Marking ADM * For Tape & Reel, add suffix –Z (e.g. MP1469GJ–Z); PACKAGE REFERENCE TOP VIEW ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance VIN ..................................................-0.3V to 17V VSW ...................................................................... -0.3V (-5V for <10ns) to 17V (19V for <10ns) VBS ......................................................... VSW+6V All Other Pins ...................................–0.3V to 6V (2) Continuous Power Dissipation (TA = +25°C) ........................................................... 0.57W Junction Temperature ...............................150°C Lead Temperature ....................................260°C Storage Temperature................. -65°C to 150°C TSOT-23-6............................. 220 .... 110.. °C/W Recommended Operating Conditions (3) Supply Voltage VIN ...........................4.7V to 16V Output Voltage VOUT .................... 0.8V to Vin-3V Operating Junction Temp. (TJ). -40°C to +125°C MP1469 Rev. 1.01 8/26/2013 (4) θJA θJC Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX)-TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7, 4-layer PCB. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 2 MP1469 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS ELECTRICAL CHARACTERISTICS (5) VIN = 12V, TA = 25°C, unless otherwise noted. Parameter Symbol Supply Current (Shutdown) Supply Current (Quiescent) HS Switch-On Resistance LS Switch-On Resistance Switch Leakage Current Limit (5) AAM Peak Current Oscillator Frequency Maximum Duty Cycle Minimum On Time(5) Feedback Voltage EN Rising Threshold EN Falling Threshold EN Input Current IIN Iq Condition VEN = 0V VEN = 2V, VFB = 1V VBST-SW=5V Vcc=5V VEN = 0V, VSW =12V HSRDS-ON LSRDS-ON SWLKG ILIMIT IAAM_PEAK fSW VFB=0.75V DMAX VFB=700mV tON_MIN VFB VEN_RISING VEN_FALLING IEN Min INUVVth Max Units 1 μA mA mΩ mΩ μA A A kHz % ns mV V V 0.83 255 160 1 2.5 400 88 776 1.4 1.23 VEN=2V VEN=0 VIN Under-Voltage Lockout Threshold—Rising VIN Under-Voltage Lockout Threshold—Hysteresis Soft-Start Period Thermal Shutdown(5) Thermal Hysteresis(5) Typ 3.85 3.0 0.5 490 92 90 800 1.5 1.32 580 824 1.6 1.41 1.6 μA 0 μA 4.2 4.55 V INUVHYS 340 mV tSS 1 150 20 ms °C °C Notes: 5) Guaranteed by design. MP1469 Rev. 1.01 8/26/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 3 MP1469 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS TYPICAL CHARACTERISTICS VIN = 12V, VOUT = 3.3V, L = 6.5µH, TA = +25°C, unless otherwise noted. 100 100 95 95 90 90 85 85 85 80 80 80 75 75 70 70 65 65 60 60 65 55 55 60 0.01 50 0.01 100 EFFICIENCY (%) 95 90 75 70 0.1 1 LOAD CURRENT (A) 10 100 REGULATION (%) EFFICIENCY (%) 90 80 70 60 50 40 0.01 0.1 1 LOAD CURRENT (A) 10 2 2 1.5 1.5 1 1 0.5 0.5 0 0 -0.5 -0.5 -1 -1 -1.5 -1.5 -2 0.1 1 LOAD CURRENT (A) 50 0.01 10 0.1 1 LOAD CURRENT (A) 10 -2 0 0.3 0.6 0.9 1.2 LOAD CURRENT (A) 5 6 7 8 9 10 11 12 13 14 15 16 INPUT VOLTAGE (V) 1.5 Peak Current vs. Duty Cycle 4.0 870 30 PEAK CURRENT (A) 3.8 860 25 3.6 3.4 850 20 3.2 840 3.0 15 830 2.8 2.6 2.4 2.2 2.0 0 10 20 30 40 50 60 70 80 90 DUTY CYCLE (%) MP1469 Rev. 1.01 8/26/2013 10 820 5 810 0 0.0 0.3 0.6 0.9 1.2 LOAD CURRENT (A) 1.5 800 4 6 8 10 12 14 16 INPUT VOLTAGE (V) www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 4 MP1469 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS TYPICAL CHARACTERISTICS (continued) VIN = 12V, VOUT = 3.3V, L = 6.5µH, TA = +25°C, unless otherwise noted. MP1469 Rev. 1.01 8/26/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 5 MP1469 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS TYPICAL PERFORMANCE CHARACTERISTICS VIN = 12V, VOUT = 3.3V, L = 6.5µH, TA = +25°C, unless otherwise noted. Startup through Input Voltage Shutdown through Input Voltage Startup through Input Voltage IOUT = 0A IOUT = 0A IOUT = 1.5A VOUT 2V/div. VIN 10V/div. VOUT 2V/div. VIN 10V/div. VOUT 2V/div. VIN 10V/div. VSW 5V/div. VSW 5V/div. VSW 5V/div. IL 500mA/div. IL 200mA/div. Shutdown through Input Voltage IL 1A/div. Startup through Enable Shutdown through Enable IOUT = 0A IOUT = 0A IOUT = 1.5A VOUT 2V/div. VIN 10V/div. VSW 5V/div. IL 1A/div. VOUT 2V/div. VOUT 2V/div. VEN 2V/div. VSW 10V/div. VEN 2V/div. VSW 10V/div. IL 500mA/div. IL 500mA/div. Startup through Enable Shutdown through Enable Input/Output Ripple IOUT = 1.5A IOUT = 1.5A IOUT = 1.5A VOUT 2V/div. VOUT 2V/div. VOUT/AC 50mV/div. VIN/AC 200mV/div. VEN 2V/div. VSW 10V/div. VEN 2V/div. VSW 10V/div. VSW 10V/div. IL 1A/div. IL 1A/div. IL 1A/div. MP1469 Rev. 1.01 8/26/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 6 MP1469 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 12V, VOUT = 3.3V, L = 6.5µH, TA = +25°C, unless otherwise noted. MP1469 Rev. 1.01 8/26/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 7 MP1469 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS PIN FUNCTIONS Package Pin # Name 1 IN 2 GND 3 SW 4 BST 5 EN 6 FB MP1469 Rev. 1.01 8/26/2013 Description Supply Voltage. The MP1469 operates from a 4.7V-to-16V input rail. Requires C1 to decouple the input rail. Connect using a wide PCB trace. System Ground. Reference ground of the regulated output voltage: requires extra care during PCB layout. Connect to GND with copper traces and vias. Switch Output. Connect using wide PCB trace. Bootstrap. Connect a capacitor and a resistor between SW and BS pins to form a floating supply across the high-side switch driver. Recommend to use 1uF BST capacitor. EN=HIGH to enable the MP1469. For automatic start-up, connect EN to VIN using a 100kΩ resistor. Feedback. Set the output voltage with from the tap of an external resistor divider running from the output to GND. The frequency fold-back comparator lowers the oscillator frequency when the FB voltage is below 200mV to prevent current-limit runaway during a short circuit fault. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 8 MP1469 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS BLOCK DIAGRAM IN + - VCC Regulator RSEN Currrent Sense Amplifer Bootstrap Regulator Oscillator HS Driver + 1.2pF Reference EN 6.5V 47pF 500k Current Limit Comparator Comparator On Time Control Logic Control 1MEG FB 20k BST + + - SW VCC LS Driver Error Amplifier GND Figure 1: Functional Block Diagram MP1469 Rev. 1.01 8/26/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 9 MP1469 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS OPERATION The MP1469 is a high-frequency, synchronous, rectified, step-down, switch-mode converter with internal power MOSFETs. It offers a very compact solution to achieve a 1.5A continuous output current over a wide input supply range, with excellent load and line regulation. The MP1469 operates in a fixed-frequency, peak-current–control mode to regulate the output voltage. An internal clock initiates the PWM cycle to turn on the integrated high-side power MOSFET. This MOSFET remains on until its current reaches the value set by the COMP voltage. When the power switch is off, it remains off until the next clock cycle starts. If the current in the power MOSFET does not reach the COMP set current value within 90% of one PWM period, the power MOSFET is forced to turn off. Internal Regulator The 5V internal regulator powers most of the internal circuits. This regulator takes VIN and operates in the full VIN range. When VIN exceeds 5.0V, the regulator output is in full regulation. When VIN falls below 5.0V, the output decreases. Error Amplifier The error amplifier compares the FB voltage against the internal 0.8V reference (REF) and outputs a current proportional to the difference between the two. This output current charges or discharges the internal compensation network to form the COMP voltage, which is used to control the power MOSFET current. The optimized internal compensation network minimizes the external component counts and simplifies the control-loop design. Enable EN is a digital control pin that turns the regulator on and off: Drive EN HIGH to turn on the regulator, drive it LOW to turn it off. An internal 1MΩ resistor from EN to GND allows EN to float to shut down the chip. The EN pin is clamped internally using a 6.5V series-Zener-diode as shown in Figure 2. Connecting the EN input pin through a pullup resistor to the voltage on the VIN pin limits the EN input current to less than 100μA. MP1469 Rev. 1.01 8/26/2013 For example, with 12V connected to Vin, RPULLUP≥ (12V-6.5V) ÷ 100μA =55kΩ Connecting the EN pin is directly to a voltage source without any pullup resistor requires limiting the amplitude of the voltage source to ≤ 6V to prevent damage to the Zener diode. Figure 2: 6.5V Zener Diode Connection Under-Voltage Lockout (UVLO) Under-voltage lockout (UVLO) protects the chip from operating at an insufficient supply voltage. The MP1469 UVLO comparator monitors the output voltage of the internal regulator, VCC. The UVLO rising threshold is about 4.2V while its falling threshold is consistently 3.86V. Internal Soft-Start Soft-start prevents the converter output voltage from overshooting during startup. When the chip starts, the internal circuit generates a softstart voltage (SS) that ramps up from 0V to 1.2V: When SS falls below the internal reference (REF), SS overrides REF so that the error amplifier uses SS as the reference; when SS exceeds REF, the error amplifier resumes using REF as its reference. The SS time is internally set to 1ms. Over-Current-Protection and Hiccup The MP1469 has a cycle-by-cycle over-current limit for when the inductor current peak value exceeds the set current-limit threshold. First, when the output voltage drops until FB falls below the Under-Voltage (UV) threshold (typically 200mV) to trigger a UV event, the MP1469 enters hiccup mode to periodicall restart the part. This protection mode is especially useful when the output is deadshorted to ground. This greatly reduces the average short-circuit current to alleviate thermal issues and to protect the regulator. The MP1469 exits hiccup mode once the overcurrent condition is removed. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 10 MP1469 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS Thermal Shutdown Thermal shutdown prevents the chip from operating at exceedingly high temperatures. When the silicon die temperature exceeds 150°C, it shuts down the whole chip. When the temperature falls below its lower threshold (typically 130°C) the chip is enabled again. Floating Driver and Bootstrap Charging An external bootstrap capacitor powers the floating power MOSFET driver. This floating driver has its own UVLO protection, with a rising threshold of 2.2V and a hysteresis of 150mV. VIN regulates the bootstrap capacitor voltage internally through D1, M1, R4, C4, L1 and C2 (Figure 3). If (VIN-VSW) exceeds 5V,U2 will regulate M1 to maintain a 5V BST voltage across C4. D1 AAM Operation The MP1469 has AAM (Advanced Asynchronous Modulation) power save mode for light load. The AAM voltage is set at 0.5V internally. Under the heavy load condition, the VCOMP is higher than VAAM. When clock goes high, the high-side power MOSFET turns on and remains on until VILsense reaches the value set by the COMP voltage. The internal clock resets every time when VCOMP is higher than VAAM. Under the light load condition, the value of VCOMP is low. When VCOMP is less than VAAM and VFB is less than VREF, VCOMP ramps up until it exceeds VAAM, during this time, the internal clock is blocked, thus the MP1469 skips some pulses for PFM (Pulse Frequency Modulation) mode and achieves the light load power save. VIN Clock U2 M1 HS_driver U1 Q + S - 5V VOUT 1.2pF R4 C4 SW L1 VAAM 47pF 500k VCOMP - R VOUT - C2 + + R1 20k VREF VFB R2 VIL sense Figure 4—Simplified AAM Control Logic Figure 3: Internal Bootstrap Charging Startup and Shutdown Circuit If both VIN and EN exceed their appropriate thresholds, the chip starts. The reference block starts first, generating stable reference voltage and currents, and then the internal regulator is enabled. The regulator provides a stable supply for the remaining circuits. Three events can shut down the chip: EN low, VIN low, and thermal shutdown. In the shutdown procedure starts by initially blocking the signaling path to avoid any fault triggering. The COMP voltage and the internal supply rail are then pulled down. The floating driver is not subject to this shutdown command. When the load current is light, the inductor peak current is set internally which is about 340mA for VIN=12V, VOUT=3.3V, and L=6.5μH.The curve of inductor peak current vs. inductor is shown in Figure 5. Inductor Peak Current vs. Inductor 1.2 1 0.8 0.6 0.4 0.2 0 0 1 2 3 4 5 6 7 Figure5—Inductor Peak Current vs. Inductor MP1469 Rev. 1.01 8/26/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 11 MP1469 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS APPLICATION INFORMATION Setting the Output Voltage The external resistor divider sets the output voltage. The feedback resistor R1 also sets the feedback-loop bandwidth through the internal compensation capacitor (see the Typical Application circuit). Choose R1 and R2 by: R2 = R1 VOUT 0.8V −1 Use a T-type network for when VOUT is low. FB R1 RT VOUT R2 Figure 6: T-Type Network Table 1 lists the recommended T-type resistors value for common output voltages. Table 1: Resistor Selection for Common Output Voltages VOUT (V) R1 (kΩ) R2 (kΩ) Rt (kΩ) 1.05 10(1%) 32.4(1%) 150(1%) 1.2 20.5(1%) 41.2(1%) 130(1%) 1.8 40.2(1%) 32.4(1%) 100(1%) 2.5 40.2(1%) 19.1(1%) 59(1%) 3.3 40.2(1%) 13(1%) 59(1%) 5 40.2(1%) 7.68(1%) 59(1%) Selecting the Inductor Use a 1µH-to-10µH inductor with a DC current rating of at least 25% percent higher than the maximum load current for most applications. For highest efficiency, select an inductor with a DC resistance less than 15mΩ. For most designs, derive the inductance value from the following equation. L1 = VOUT × (VIN − VOUT ) VIN × ΔIL × fOSC Where ΔIL is the inductor ripple current. Choose an inductor current approximately 30% of the maximum load current. The maximum inductor peak current is: MP1469 Rev. 1.01 8/26/2013 IL(MAX ) = ILOAD + ΔI L 2 Under light-load conditions (below 100mA), use a larger inductance for improved efficiency. Selecting the Input Capacitor The input current to the step-down converter is discontinuous, and therefore requires a capacitor to both supply the AC current to the step-down converter and maintain the DC input voltage. Use low ESR capacitors for the best performance, such as ceramic capacitors with X5R or X7R dielectrics of their low ESR and small temperature coefficients. A 22µF capacitor is sufficient for most applications. The input capacitor (C1) requires an adequate ripple current rating because it absorbs the input switching. Estimate the RMS current in the input capacitor with: I C1 = ILOAD × VOUT ⎛⎜ VOUT × 1− VIN ⎜⎝ VIN ⎞ ⎟ ⎟ ⎠ The worst-case condition occurs at VIN = 2VOUT, where: IC1 = ILOAD 2 For simplification, choose an input capacitor with an RMS current rating greater than half the maximum load current. The input capacitor can be electrolytic, tantalum, or ceramic. Place a small, high-quality, ceramic capacitor (0.1μF) as close to the IC as possible when using electrolytic or tantalum capacitors. When using ceramic capacitors, make sure that they have enough capacitance to provide sufficient charge to prevent excessive input voltage ripple. Estimate the input voltage ripple caused by the capacitance with: ΔVIN = ⎛ ⎞ ILOAD V V × OUT × ⎜ 1 − OUT ⎟ fS × C1 VIN ⎝ VIN ⎠ Selecting the Output Capacitor The output capacitor (C2) maintains the DC output voltage. Use ceramic, tantalum, or lowESR electrolytic capacitors. Use low ESR www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 12 MP1469 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS capacitors to limit the output voltage ripple. Estimate the output voltage ripple with: ΔVOUT = VOUT ⎛ VOUT × ⎜1 − fS × L1 ⎝ VIN ⎞ ⎞ ⎛ 1 ⎟ ⎟ × ⎜ RESR + 8 × f × C2 ⎠ ⎝ S ⎠ Where L1 is the inductor value and RESR is the equivalent series resistance (ESR) of the output capacitor. For ceramic capacitors, the capacitance dominates the impedance at the switching frequency and causes most of the output voltage ripple. For simplification, estimate the output voltage ripple with: ΔVOUT = ⎛ V ⎞ VOUT × ⎜ 1 − OUT ⎟ VIN ⎠ 8 × fS × L1 × C2 ⎝ 2 For tantalum or electrolytic capacitors, the ESR dominates the impedance at the switching frequency. For simplification, the output ripple can be approximated with: ΔVOUT = For most applications, use an IN4148 for the external BST diode is IN4148, and a 1µF capacitor for the BST cap. PC Board Layout PCB layout is very important to achieve stable operation. For best results, use the following guidelines and Figure 8 as reference. 1) Keep the connection between the input ground and GND pin as short and wide as possible. 2) Keep the connection between the input capacitor and IN pin as short and wide as possible. 3) Use short and direct feedback connections. Place the feedback resistors and compensation components as close to the chip as possible. 4) Route SW away from sensitive analog areas such as FB. VOUT ⎛ V ⎞ × ⎜ 1 − OUT ⎟ × RESR fS × L1 ⎝ VIN ⎠ The characteristics of the output capacitor also affect the stability of the regulation system. The MP1469 can be optimized for a wide range of capacitance and ESR values. External Bootstrap Diode An external bootstrap (BST) diode can enhance the efficiency of the regulator givien the following applicable conditions: z VOUT is 5V or 3.3V; and z Duty cycle is high: D= C3 R1 R3 R7 R6 C5 R2 6 5 4 1 2 3 R4 SW R5 L1 C4 V IN C1A GND C1 VOUT C2 C2A VOUT >65% VIN Connect the external BST diode from the output of voltage regulator to the BST pin, as shown in Figure 7. BST R4 External BST Diode IN4148 MP1469 SW L 5V or 3.3V COUT Figure 7: Optional External Bootstrap Diode MP1469 Rev. 1.01 8/26/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 13 MP1469 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS Design Example Below is a design example following the application guidelines for the specifications: Table 2—Design Example 12V VIN VOUT 3.3V Io 1.5A The detailed application schematic is shown in Figure 9. The typical performance and circuit waveforms have been shown in the Typical Performance Characteristics section. For more device applications, please refer to the related Evaluation Board Datasheets. MP1469 Rev. 1.01 8/26/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 14 MP1469 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS TYPICAL APPLICATION CIRCUITS 1 VIN GND C1 C1A 25V 25V GND GND IN BST R4 0 4 C4 L1 MP1469 GND SW SW EN R6 NS EN GND NS R7 59k 6 GND C2 NS NS R1 40.2k GND VOUT C2A GND GND R2 7.68k 2 C5 NS FB C3 R3 R5 100k 5 5V/1.5A 3 GND GND GND Figure 8: 12VIN, 5V/1.5A 1 VIN GND C1 C1A 25V 25V GND GND IN BST 4 R4 0 C4 L1 MP1469 GND SW SW 5 R6 NS EN GND NS R7 59k 6 NS R1 40.2k GND C2 NS GND GND VOUT C2A GND R2 13k 2 C5 NS FB C3 R3 R5 100k EN 3.3V/1.5A 3 GND GND GND Figure 9: 12VIN, 3.3V/1.5A 1 VIN GND C1 C1A 25V 25V GND GND IN BST 4 C4 L1 MP1469 GND SW SW R6 NS C5 NS GND EN GND FB C3 R3 6 NS R7 59k 2 5 2.5V/1.5A 3 R5 100k EN R4 0 GND NS R1 40.2k C2 NS GND GND R2 19.1k GND VOUT C2A GND GND Figure 10: 12VIN, 2.5V/1.5A MP1469 Rev. 1.01 8/26/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 15 MP1469 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS 1 VIN GND C1 C1A 25V 25V GND GND IN BST 4 R4 0 C4 MP1469 GND SW EN R6 NS EN C3 R3 NS R7 100k 6 NS R1 40.2k GND C2 NS GND GND VOUT C2A GND R2 32.4k 2 C5 NS FB GND 1.8V/1.5A 3 R5 100k 5 L1 SW GND GND GND Figure 11: 12VIN, 1.8V/1.5A 1 VIN GND C1 C1A 25V 25V GND GND IN BST 4 C4 L1 MP1469 GND 3 C5 NS GND EN GND FB 6 NS R7 130k 2 R6 NS C3 R3 R5 100k 5 1.2V/1.5A SW SW EN R4 0 GND NS R1 20.5k C2 NS GND C2A GND R2 41.2k GND VOUT GND GND Figure 12: 12VIN, 1.2V/1.5A MP1469 Rev. 1.01 8/26/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 16 MP1469 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS PACKAGE INFORMATION TSOT23-6 6 See Note 7 EXAMPLE TOP MARK 4 AAAA PIN 1 0.95 BSC 0.60 TYP 2.80 3.00 1 1.20 TYP 1.50 1.70 2.60 3.00 2.60 TYP 3 TOP VIEW RECOMMENDED LAND PATTERN 0.84 0.90 1.00 MAX 0.09 0.20 SEATING PLANE 0.30 0.50 0.95 BSC 0.00 0.10 SEE DETAIL "A" FRONT VIEW SIDE VIEW NOTE: GAUGE PLANE 0.25 BSC 0o-8o 0.30 0.50 DETAIL “A” 1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH , PROTRUSION OR GATE BURR. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. 4) LEAD COPLANARITY(BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.10 MILLIMETERS MAX. 5) DRAWING CONFORMS TO JEDEC MO-193, VARIATION AB. 6) DRAWING IS NOT TO SCALE. 7) PIN 1 IS LOWER LEFT PIN WHEN READING TOP MARK FROM LEFT TO RIGHT, (SEE EXAMPLE TOP MARK) NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP1469 Rev. 1.01 8/26/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 17