MP2012 Low Voltage, 2.7-6V Input,1.5A, 1.2MHz Synchronous Step-Down Converter The Future of Analog IC Technology DESCRIPTION FEATURES The MP2012 is a fully integrated, internally compensated 1.2MHz fixed frequency PWM step-down converter. It is ideal for powering portable equipment that runs from a single cell Lithium-Ion (Li+) Battery, with an input range from 2.7V to 6V. The MP2012 can provide up to 1.5A of load current with output voltage as low as 0.8V. It can also operate at 100% duty cycle for low dropout applications. With peak current mode control and internal compensation, the MP2012 is stable with ceramic capacitors and small inductors. Fault condition protection includes cycle-by-cycle current limiting and thermal shutdown. • • • • • MP2012 is available in a small QFN6 (3x3mm) package. APPLICATIONS • • • • • • • • • • • 2.7-6V Input Operation Range Output Adjustable from 0.8V to VIN 1μA Max Shutdown Current. Up to 95% Efficiency 100% Duty Cycle for Low Dropout Applications 1.2MHz Fixed Switching Frequency Stable with Low ESR Output Ceramic Capacitors Thermal Shutdown Cycle-by-Cycle Over Current Protection Short Circuit Protection Available in QFN6 (3x3mm) DVD+/-RW Drives Smart Phones PDAs Digital Cameras Portable Instruments For MPS green status, please visit MPS website under Quality Assurance. “MPS” and “The Future of Analog IC Technology” are Trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION 100 4 5 C1 PVIN VIN EN MP2012 SW EN 6 3 90 VOUT 1.8V/1.5A L1 R1 2 GND FB 1 Rt C2 R2 80 EFFICIENCY (%) VIN 2.7V to 6V Efficiency vs. Load Current Vin=5V 70 Vin=3V 60 50 40 30 20 10 0 0 0.3 0.6 0.9 1.2 1.5 LOAD CURRENT(A) MP2012 Rev. 1.01 9/22/2011 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 1 MP2012 – 1.5A SYNCHRONOUS STEP-DOWN CONVERTER ORDERING INFORMATION Part Number* Package Top Marking Free Air Temperature (TA) MP2012DQ QFN6(3x3mm) 9E –40°C to +85°C * For Tape & Reel, add suffix –Z (e.g. MP2012DQ–Z). For RoHS compliant packaging, add suffix –LF (e.g. MP2012DQ–LF–Z) PACKAGE REFERENCE TOP VIEW FB 1 6 EN GND 2 5 VIN SW 3 4 PVIN Exposed Pad Connected to GND ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance PVIN, VIN to GND......................–0.3V to + 6.5V SW to GND .......................... –0.3V to VIN + 0.3V EN, FB to GND ...........................–0.3V to +6.5V Operating Temperature............. –40°C to +85°C (2) Continuous Power Dissipation (TA = +25°C) ………………………………………………....2.5W Junction Temperature ...............................150°C Lead Temperature ....................................260°C Storage Temperature ............. –65°C to +150°C QFN6 (3x3mm) .......................50 ...... 12 ... °C/W Recommended Operating Conditions (3) Supply Voltage VIN .............................2.7V to 6V Operating Junct. Temp (TJ)..... –40°C to +125°C MP2012 Rev. 1.01 9/22/2011 (4) θJA θJC Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX)-TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7, 4-layer PCB. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 2 MP2012 – 1.5A SYNCHRONOUS STEP-DOWN CONVERTER ELECTRICAL CHARACTERISTICS (5) VIN = VEN = 3.6V, TA = +25°C, unless otherwise noted. Parameters Condition Supply Current VEN_= VIN, VFB = 0.9V Shutdown Current Thermal Shutdown Trip Threshold EN Trip Threshold EN Input Current EN Input Current IN Undervoltage Lockout Threshold IN Undervoltage Lockout Hysteresis VEN_= 0V, VIN = 6V Hysteresis = 20°C -40°C ≤ TA ≤ +85°C VEN = 0V VEN = 6V Rising Edge Regulated FB Voltage FB Input Bias Current SW PFET On Resistance SW NFET On Resistance SW Leakage Current SW Leakage Current SW PFET Peak Current Limit Switching Frequency TA = +25°C -40°C≤ TA≤ +85°C VFB = 0.8V ISW = 100mA ISW = -100mA VEN=0V; VIN=6V VSW_=0V VEN=0V; VIN=6V VSW_=6V Duty Cycle=100% Duty Cycle=50%(6) Min Typ Max Units 600 750 μA 1 μA °C V μA μA V mV 0.784 0.776 -50 0.18 0.14 0.01 150 1.0 0.1 6 2.40 160 0.800 0.800 -2 0.25 0.2 0.816 0.824 +50 0.28 0.24 nA Ω Ω -1 0.1 1 μA -5 1.5 5 μA 0.3 2.15 2.1 1.0 3.0 3.5 1.2 1.5 1.0 2.65 V A 1.4 MHz Notes: 5) Production test at +25°C. Specifications over the temperature range are guaranteed by design and characterization. PIN FUNCTIONS Pin # Name 1 FB Feedback input. An external resistor divider from the output to GND, tapped to the FB pin sets the output voltage. 2 GND, Exposed Pad Ground pin. Connect exposed pad to ground plane for proper thermal performance. 3 4 5 6 SW PVIN VIN EN Switch node to the inductor. Input supply pin for power FET. Input Supply pin for controller. Put small decoupling ceramic near this pin. Enable input, “High” enables MP2012. EN is pulled to GND with 1Meg internal resistor. MP2012 Rev. 1.01 9/22/2011 Description www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 3 MP2012 – 1.5A SYNCHRONOUS STEP-DOWN CONVERTER TYPICAL PERFORMANCE CHARACTERISTICS VIN = 5V, VOUT = 1.8V, L=3.3uH, TA = +25ºC, unless otherwise noted. 100 850 35 800 30 750 25 700 20 40 650 15 30 600 10 550 5 90 Vin=5V 70 Vin=3V 60 50 20 10 0 0 0.3 0.6 0.9 1.2 500 2.5 1.5 3 3.5 LOAD CURRENT(A) Load Regulation 5 5.5 0 0 6 4.5 Vin=3V -0.1% -0.2% LINE REGULATION 0.40% 0.0% 4 0.20% Io=0A 0.00% Io=0.75A -0.20% Vin=5V Io=1.5A -0.40% -0.3% 0 0.5 1 LOAD CURRENT(A) MP2012 Rev. 1.01 9/22/2011 1.5 -0.60% 0.5 1 1.5 OUTPUT CURRENT (A) Peak Current vs. Duty Line Regulation 0.1% -0.4% 4 4.5 V IN(V) PEAK CURRENT(A) EFFICIENCY (%) 80 LOAD REGULATION Case Tem perature Risevs. Output Current Enable Supply Current vs. Input Voltage Efficiency vs. Load Current 3.5 3 2.5 2 2 2.5 3 3.5 4 4.5 5 5.5 INPUT VOLTAGE (V) 6 1.5 40% 50% 60% 70% 80% 90% 100% DUTY CYCLE www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 4 MP2012 – 1.5A SYNCHRONOUS STEP-DOWN CONVERTER TYPICAL PERFORMANCE CHARACTERISTICS VIN = 5V, VOUT = 1.8V, L=3.3uH, TA = +25ºC, unless otherwise noted. Short Entry Short Recovery Full Load No Load Power Up without Load VOUT 2V/div SW 2V/div VIN 10V/div IINDUCTOR 2A/div VOUT 1V/div VOUT 1V/div SW 5V/div SW 5V/div VIN 10V/div VIN 5V/div IINDUCTOR 2A/div IINDUCTOR 1A/div EN Start up with 1.5A Load EN Start Up without Load Power Up with 1.5A Load VOUT 1V/div VOUT 1V/div VOUT 1V/div SW 5V/div SW 5V/div SW 5V/div VIN 5V/div EN 2V/div EN 2V/div IINDUCTOR 1A/div IINDUCTOR 1A/div IINDUCTOR 1A/div Load Transient Response IOUT=0.75A-1.5A Step @ 1A/us Output Ripple Voltage Input Ripple Voltage VOUT 20mV/div VIN 50mV/div VOUT 20mV/div SW 2V/div SW 2V/div IINDUCTOR 2A/div 400ns/div MP2012 Rev. 1.01 9/22/2011 IOUT 500mA/div 400ns/div 400us/div www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 5 MP2012 – 1.5A SYNCHRONOUS STEP-DOWN CONVERTER FUNCTION BLOCK DIAGRAM Figure 1―Function Block Diagram MP2012 Rev. 1.01 9/22/2011 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 6 MP2012 – 1.5A SYNCHRONOUS STEP-DOWN CONVERTER OPERATION The MP2012 is a fixed frequency 1.2MHz current mode 1.5A step-down converter, optimized for low voltage, Li-Ion battery powered applications where high efficiency and small size are critical. MP2012 integrates a high side PFET main switch and a low side synchronous rectifier. It always operates in continuous conduction mode, simplifies the control scheme and eliminates the random spectrum noise due to discontinuous conduction mode. The steady state duty cycle D for this mode can be calculated as: D = TON × fOSC × 100% ≈ VOUT × 100% VIN Where TON is the main switch on time and fOSC is the oscillator frequency (1.2MHz typ.). Current Mode PWM Control Slope compensated current mode PWM control provides stable switching and cycle-by-cycle current limiting for superior load and line response as well as protection of the internal main switch and synchronous rectifier. The MP2012 switches at a constant frequency (1.2MHz) and modulates the inductor peak current to regulate the output voltage. Specifically, for each cycle the PWM controller forces the inductor peak current to an internal reference level derived from the feedback error voltage. At normal operation, the main switch is turned on at each rise edge of the internal oscillator, and remains on for a certain period of time to ramp up the inductor current. As soon as the inductor current reaches the reference level, the main switch is turned off and immediately the synchronous rectifier will be turned on to provide the inductor current. In forced PWM mode, the synchronous rectifier will stay on until the next oscillator cycle. MP2012 Rev. 1.01 9/22/2011 Dropout Operation The MP2012 allows the main switch to remain on for more than one switching cycle to increase the duty cycle when the input voltage is dropping close to the output voltage. When the duty cycle reaches 100%, the main switch is held on continuously to deliver current to the output up to the PFET current limit. In this case, the output voltage becomes the input voltage minus the voltage drop across the main switch and the inductor. Maximum Load Current The MP2012 can operate down to 2.5V input voltage; however the maximum load current decreases at lower input due to a large IR drop on the main switch and synchronous rectifier. The slope compensation signal reduces the peak inductor current as a function of the duty cycle to prevent sub-harmonic oscillations at duty cycles greater than 50%. Conversely, the current limit increases as the duty cycle decreases. Short Circuit Protection When short circuit or over current condition happens, and FB is lower than about 0.3V, the MP2012 enters fold back mode. The oscillator frequency is reduced to prevent the inductor current from increasing beyond the PFET current limit. The PFET current limit is also reduced to lower the short circuit current. The frequency and current limit will return to the normal values once the short circuit condition is removed and the feedback voltage approaches 0.8V. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 7 MP2012 – 1.5A SYNCHRONOUS STEP-DOWN CONVERTER APPLICATION INFORMATION 8 . 0 ⎞ ⎟ ⎠ 2 VOUT R1 Rt FB R2 Figure 2―Feedback Network Table 1 lists the recommended resistor value for common output voltages. Table 1—Resistor Selection vs. Output Voltage Setting VOUT × (VIN − VOUT ) VIN × ΔIL × fOSC Where ΔIL is inductor ripple current. Choose inductor ripple current approximately 30% of the maximum load current, 1.5A. The maximum inductor peak current is: MP2012 Rev. 1.01 9/22/2011 ΔI + L 2 − )⎛ ⎞ + ⋅ ⎜ ⎟ ⋅ ⋅ ⋅ ⎝ ⎠ For most applications, a 22μF capacitor is sufficient. Thermal Dissipation Power dissipation shall be considered when operates MP2012 at maximum 1.5A output current. If the junction temperature rises above 150°C, MP2012 will be shut down by internal thermal protection circuitry. Δ = T U O Inductor Selection A 1μH to 10μH inductor with DC current rating at least 25% higher than the maximum load current is recommended for most applications. For best efficiency, the inductor DC resistance shall be <200mΩ. See Table 2 for recommended inductors and manufacturers. For most designs, the inductance value can be derived from the following equation: ⋅( 1 C 22 22 22 22 C S 2.2 3.3 3.3 3.3 fO 1 8 10 4.02 57.6 39 7X7X4.5 R S E 4.99 4.99 121 121 3.3 R 300 243 100 100 T U 1.2 1.8V 2.5V 3.3V 6.3X6.2X3 C S C2/ μF V OL L1/ μH 3.6 Input Capacitor CIN Selection The input capacitor reduces the surge current drawn from the input and switching noise from the device. Ceramic capacitors with X5R or X7R dielectrics are highly recommended because of their low ESR and small temperature coefficients. For most applications, a 10μF capacitor is sufficient. Output Capacitor COUT Selection The output capacitor keeps output voltage ripple small and ensures regulation loop stable. The output capacitor impedance shall be low at the switching frequency. Ceramic capacitors with X5R or X7R dielectrics are recommended. For forced PWM mode operation, the output ripple ΔVOUT is approximately: N R2/ kΩ 3.3 Dimensions LxWxH (mm3) 5.2X5.2X2.5 Inductance (μH) SD25-3R3 D63LCB#A921 CY-3R6M SLF7045T3R3M2R5-PF V If O N I TV U VO R1/ kΩ TDK T U Rt/ kΩ Toko VO VOUT/ V IL(MAX ) = ILOAD Manufacturer Part Number Cooper Rt is recommended when output voltage is high, as the Figure 2 shows. L= Table 2—Suggested Inductors 1 ⎛ ×⎜ + ⎝ T U VO = R R 1 Output Voltage Setting The external resistor divider sets the output voltage. The junction-to-ambient thermal resistance of the 6-pin QFN (3mm x 3mm) RΘJA is 50°C/W. The maximum allowable power dissipation is about 1.6W when MP2012 is operating in a 70°C ambient temperature environment: PD MAX = 150 o C − 70 o C 50 o C / W = 1 .6 W www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 8 MP2012 – 1.5A SYNCHRONOUS STEP-DOWN CONVERTER PC Board Layout PCB layout is very important to achieve stable operation. Please follow these guidelines and take Figure2 for references. The high current paths (GND, IN and SW) should be placed very close to the device with short, GND direct and wide traces. Input capacitors should be placed as close as possible to the respective IN and GND pins. The external feedback resistors shall be placed next to the FB pins. Keep the switching nodes SW short and away from the feedback network. GND C2 L1 PVIN 4 3 SW VIN 5 2 GND R3 1 FB R1 R4 R5 R2 C5 C1 EN 6 C3 C4 VIN GND VOUT Top layer Bottom layer Figure 3—PCB Layout MP2012 Rev. 1.01 9/22/2011 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 9 MP2012 – 1.5A SYNCHRONOUS STEP-DOWN CONVERTER PACKAGE INFORMATION QFN6 (3mmx3mm) 2.90 3.10 0.35 0.55 PIN 1 ID MARKING 0.35 0.45 1.40 1.60 PIN 1 ID SEE DETAIL A 1 6 2.90 3.10 PIN 1 ID INDEX AREA 2.20 2.40 0.95 BSC 3 4 TOP VIEW BOTTOM VIEW PIN 1 ID OPTION A R0.20 TYP. PIN 1 ID OPTION B R0.20 TYP. 0.80 1.00 0.20 REF 0.00 0.05 SIDE VIEW DETAIL A NOTE: 2.90 0.80 1) 2) 3) 4) 5) 1.50 0.40 ALL DIMENSIONS ARE IN MILLIMETERS. EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH. LEAD COPLANARITY SHALL BE0.10 MILLIMETER MAX. JEDEC REFERENCE IS MO-229, VARIATION VEEA-2. DRAWING IS NOT TO SCALE. 2.30 0.95 RECOMMENDED LAND PATTERN NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP2012 Rev. 1.01 9/22/2011 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 10