Page No. : 1/10 RS7103 Low Power 300mA CMOS LDO with Enable General Description The RS7103 is a low‐dropout linear regulator that operates in the input voltage range from +2.5V to +9.0V and delivers 300mA output current. The high‐accuracy output voltage is preset at an internally trimmed voltage 2.5V or 3.3V. Other output voltages can be mask‐optioned from 1.5V to 5.0V with 100mV increment. The RS7103 consists of a 1.25V reference, an error amplifier, a P‐channel pass transistor, and an enable/disable logic circuit. Other features include short‐circuit protection, soft start function, and thermal shutdown protection. The RS7103 device is available in SOT‐25 package. Features Applications ● Operating Voltages Range：+2.5V to +9.0V ● Output Voltages Range：+1.5V to +5.0V with 100mV Increment ● Maximum Output Current：300mA ● Low Dropout: 400mV@300mA (Typ.) ● ±2% Output Voltage Accuracy ● High Ripple Rejection：60dB ● Output Current Limit Protection (500mA) ● Short Circuit Protection (260mA) ● Thermal Overload Shutdown Protection ● Low ESR Capacitor Compatible ● Control Output ON/OFF function ● SOT‐25 Packages ● RoHS Compliant and 100% Lead (Pb)‐Freeand Green (Halogen Free with Commercial Standard) ● ● ● ● ● ● ● Battery‐powered equipment Voltage regulator for microprocessor Voltage regulator for LAN cards Wireless Communication equipment Audio/Video equipment Post Regulator for Switching Power Home Electric/Electronic Appliance Application Circuits Soft‐Start Function VIN=6V IOUT=100mA, CIN=COUT=1uF(ceramic) TA=25°C DS‐RS7103‐02 September, 2009 www.Orister.com Page No. : 2/10 This integrated circuit can be damaged by ESD. Orister Corporation recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. Pin Assignment SOT‐25 PACKAGE PIN 1 2 3 4 5 SOT‐25 SYMBOL VIN GND EN NC VOUT DESCRIPTION Regulator Input Pin Ground Pin Chip Enable Pin No Connection Regulator Output Pin Ordering Information DEVICE RS7103‐XX YY Z DEVICE CODE XX is nominal output voltage (for example, 15 = 1.5V, 33 = 3.3V, 285 = 2.85V). YY is package designator : NE: SOT‐25 Z is Lead Free designator : P: Commercial Standard, Lead (Pb) Free and Phosphorous (P) Free Package G: Green (Halogen Free with Commercial Standard) Block Diagram DS‐RS7103‐02 September, 2009 www.Orister.com Page No. : 3/10 Absolute Maximum Ratings Parameter Symbol Ratings Units Input Voltage VIN to GND VIN 10 V Output Current Limit, I(LIMIT) ILIMIT 500 mA o Junction Temperature TJ +155 C o 250 Thermal Resistance SOT‐25 C/W θJA Power Dissipation SOT‐25 PD 400 mW o Operating Ambient Temperature TOPR ‐40 ~ +85 C o Storage Temperature TSTG ‐55~+150 C o Lead Temperature (soldering, 10sec) ‐ +260 C NOTE: Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and function operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute‐maximum–rated conditions for extended periods may affect device reliability. Electrical Characteristics (TA=25°C, unless otherwise specified) Symbol VIN VOUT IMAX ILIMIT ISC Parameter Input Voltage Output Voltage Output Current (see NOTE 1) Current Limit Short Circuit Current IQ Ground Pin Current ISD VIH VIL IEN VDROP ΔVLINE ΔVLOAD eN Shutdown Current EN Pin Input Voltage “H” EN Pin Input Voltage “L” EN Pin Leakage Current Dropout Voltage Line Regulation Load Regulation Output Noise PSRR Ripple Rejection Conditions ‐ VIN=VOUT+1.0V, IOUT=30mA VOUT+1.0V≦VIN≦9.0V ‐ VIN= VEN=5V, VOUT=0V VIN= VEN=5V, No Load VIN= VEN=9V, No Load VIN=VOUT+1V, VEN=0V, No Load (see NOTE 2) (see NOTE 2) IOUT=300mA VOUT+0.5V≦VIN≦9.0V, IOUT=30mA VIN=VOUT+1.0V, 0μA≦IOUT≦100mA IOUT=100mA , F=1KHz, COUT=10uF VIN=VOUT+1V, IOUT=30mA, F=100Hz, Vripple=1VP‐ P ‐ ‐ Min. 2.5 ‐2% 300 ‐ ‐ ‐ ‐ ‐ 2.0 ‐ ‐ ‐ ‐ ‐ ‐ Typ. ‐ VOUT ‐ 0.5 260 40 60 0.1 ‐ ‐ ‐ 400 0.2 0.02 40 Max. 9.0 +2% ‐ ‐ 300 60 100 1.0 ‐ 0.5 0.1 480 0.3 0.03 ‐ uA V V uA mV %/V %/mA uV(rms) ‐ 60 ‐ dB TSD Thermal Shutdown Temperature ‐ 160 ‐ THYS Thermal Shutdown Hysteresis ‐ 10 ‐ NOTES： 1. Measured using a double sided board with 1”x 2” square inches of copper area connected to the GND pins for “heat spreading”. 2. EN pin input voltage must be always less than or equal to input voltage. Unit V V mA A mA uA o o C C DS‐RS7103‐02 September, 2009 www.Orister.com Page No. : 4/10 Detail Description The RS7103 is a low‐dropout linear regulator. The device provides preset 2.5V, 2.85V, and 3.3V output voltages for output current up to 300mA. Other mask options for special output voltages from 1.3V to 5.0V with 100mV increment are also available. As illustrated in function block diagram, it consists of a 1.25V reference, an error amplifier, a P‐channel pass transistor, an ON/OFF control logic and an internal feedback voltage divider. The 1.25V bandgap reference is connected to the error amplifier, which compares this reference with the feedback voltage and amplifies the voltage difference. If the feedback voltage is lower than the reference voltage, the pass‐transistor gate is pulled lower, which allows more current to pass to the output pin and increases the output voltage. If the feedback voltage is too high, the pass‐transistor gate is pulled up to decrease the output voltage. The output voltage is feedback through an internal resistive divider connected to VOUT pin. Additional blocks include with output current limiter and shutdown logic. Internal P‐channel Pass Transistor The RS7103 features a P‐channel MOSFET pass transistor. Unlike similar designs using PNP pass transistors, P‐channel MOSFETs require no base drive, which reduces quiescent current. PNP–based regulators also waste considerable current in dropout conditions when the pass transistor saturates, and use high base‐drive currents under large loads. The RS7103 does not suffer from these problems and consumes only 60μA (Typical) of ground pin current under heavy loads as well as in dropout conditions. Enable Function EN pin starts and stops the regulator. When the EN pin is switched to the power off level, the operation of all internal circuit stops, the build‐in P‐channel MOSFET output transistor between pins VIN and VOUT is switched off, allowing current consumption to be drastically reduced. Output Voltage Selection The RS7103 output voltage is preset at an internally trimmed voltage 2.5V, 2.85V or 3.3V. The output voltage also can be mask‐optioned from 1.5V to 5.0V with 100mV increment by special order. The first two digits of part number suffix identify the output voltage (see Ordering Information). For example, the RS7103‐33 has a preset 3.3V output voltage. Current Limit The RS7103 also includes a fold back current limiter. It monitors and controls the pass‐transistor’s gate voltage, estimates the output current, and limits the output current within 500mA. Thermal Overload Protection Thermal overload protection limits total power dissipation in the RS7103. When the junction temperature exceeds TJ=+155°C, a thermal sensor turns off the pass transistor, allowing the IC to cool down. The thermal sensor turns the pass transistor active again after the junction temperature cools down by 20°C resulting in a pulsed output during continuous thermal overload conditions. Thermal overload protection is designed to protect the RS7103 in the event of fault conditions. For continuous operation, the maximum operating junction temperature rating of TJ=+125°C should not be exceeded. Operating Region and Power Dissipation Maximum power dissipation of the RS7103 depends on the thermal resistance of the case and circuit board, the temperature difference between the die junction and ambient air, and the rate of airflow. The power dissipation across the devices is P = IOUT x (VIN‐VOUT). The resulting maximum power dissipation is: (TJ − TA) (TJ − TA ) PMAX = = θJC + θCA θJA Where (TJ‐TA) is the temperature difference between the RS7103 die junction and the surrounding air, θJC is the thermal resistance of the package chosen, and θCA is the thermal resistance through the printed circuit board, copper traces and other materials to the surrounding air. For better heat‐sinking, the copper area should be equally shared between the VIN, VOUT, and GND pins. DS‐RS7103‐02 September, 2009 www.Orister.com Page No. : 5/10 If the RS7103 uses a SOT‐25 package and this package is mounted on a double sided printed circuit board with two square inches of copper allocated for “heat spreading”, the resulting θJA is 180°C/W. Based on a maximum operating junction temperature 125°C with an ambient of 25°C, the maximum power dissipation will be: (TJ − TA ) (125 − 25 ) PMAX = = = 0.40W 250 θJC + θCA Thermal characteristics were measured using a double‐side board with 1”x 2” square inches of copper area connected to the GND pin for “heat spreading”. Dropout Voltage A regulator’s minimum input‐output voltage differential, or dropout voltage, determines the lowest usable supply voltage. In battery‐powered systems, this will determine the useful end‐of‐life battery voltage. The RS7103 uses a P‐channel MOSFET pass transistor, its dropout voltage is a function of drain‐to‐source on‐resistance (RDS(ON)) multiplied by the load current. VDROPOUT = VIN − VOUT = RDS (ON ) × IOUT DS‐RS7103‐02 September, 2009 www.Orister.com Page No. : 6/10 Typical Operating Characteristics Output Voltage vs. Output Current Dropout Voltage vs. Output Current Supply Current vs. Input Voltage Supply Current vs. Ambient Temperature DS‐RS7103‐02 September, 2009 Output Voltage vs. Ambient Temperature www.Orister.com Page No. : 7/10 Supply Current vs. Output Current Output Voltage vs. Input Voltage Output Voltage vs. Input Voltage DS‐RS7103‐02 September, 2009 www.Orister.com Page No. : 8/10 SOT‐25 Dimension NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion. D. Falls within JEDEC MO‐193 variation AB (5 pin). DS‐RS7103‐02 September, 2009 www.Orister.com Page No. : 9/10 Soldering Methods for Orister’s Products 1. Storage environment: Temperature=10oC~35oC Humidity=65%±15% 2. Reflow soldering of surface‐mount devices Figure 1: Temperature profile tP Critical Zone TL to TP TP Ramp-up TL tL Temperature Tsmax Tsmin tS Preheat 25 Ramp-down t 25oC to Peak Time Profile Feature Average ramp‐up rate (TL to TP) Sn‐Pb Eutectic Assembly o <3 C/sec Preheat Pb‐Free Assembly <3oC/sec ‐ Temperature Min (Tsmin) 100oC 150oC ‐ Temperature Max (Tsmax) 150oC 200oC 60~120 sec 60~180 sec ‐ Time (min to max) (ts) Tsmax to TL ‐ Ramp‐up Rate o <3 C/sec <3 C/sec Time maintained above: ‐ Temperature (TL) ‐ Time (tL) o 217oC 183 C 60~150 sec Peak Temperature (TP) Time within 5oC of actual Peak Temperature (tP) Ramp‐down Rate Time 25oC to Peak Temperature o o o 60~150 sec 240 C +0/‐5 C 260oC +0/‐5oC 10~30 sec 20~40 sec <6oC/sec <6oC/sec <6 minutes <8 minutes Peak temperature Dipping time 3. Flow (wave) soldering (solder dipping) Products Pb devices. Pb‐Free devices. o o 245 C ±5 C o o 260 C +0/‐5 C 5sec ±1sec 5sec ±1sec DS‐RS7103‐02 September, 2009 www.Orister.com Page No. : 10/10 Important Notice: © Orister Corporation Orister cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in an Orister product. No circuit patent licenses, copyrights, mask work rights, or other intellectual property rights are implied. Orister reserves the right to make changes to their products or specifications or to discontinue any product or service without notice. Except as provided in Orister’s terms and conditions of sale, Orister assumes no liability whatsoever, and Orister disclaims any express or implied warranty relating to the sale and/or use of Orister products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. Testing and other quality control techniques are utilized to the extent Orister deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed. Orister and the Orister logo are trademarks of Orister Corporation. All other brand and product names appearing in this document are registered trademarks or trademarks of their respective holders. DS‐RS7103‐02 September, 2009 www.Orister.com