CLC007 Serial Digital Cable Driver with Dual Complementary Outputs General Description Applications National’s Comlinear CLC007 is a monolithic, high-speed cable driver designed for the SMPTE 259M serial digital video data transmission standard. The CLC007 drives 75Ω transmission lines (Belden 8281 or equivalent) at data rates up to 400 Mbps. Controlled output rise and fall times (650 ps typical) minimize transition-induced jitter. The output voltage swing, typically 1.65V, set by an accurate, low-drift internal bandgap reference, delivers an 800 mV swing to backmatched and terminated 75Ω cable. The CLC007’s class AB output stage consumes less power than other designs, 195 mW with all outputs terminated, and requires no external bias resistors. The differential inputs accept a wide range of digital signals from 200 mVp-p to ECL levels within the specified common-mode limits. All this make the CLC007 an excellent general purpose high speed driver for digital applications. The CLC007 is powered from a single +5V or −5.2V supply and comes in an 8-pin SOIC package. n n n n n n Key Specifications Connection Diagram (8-Pin SOIC) n n n n n Digital routers and distribution amplifiers Coaxial cable driver for digital transmission line Twisted pair driver Digital distribution amplifiers SMPTE, Sonet/SDH, and ATM compatible driver Buffer applications DS100085-1 650 ps rise and fall times Data rates to 400 Mbps 2 sets of complimentary outputs 200 mV differential input Low residual jitter (25 pspp) Features n n n n n No external pull-down resistors Differential input and output Low power dissipation Single +5V or −5.2V supply Replaces GS9007 in most applications DS100085-3 Order Number CLC007AJE See NS Package Number M08A Typical Application DS100085-2 © 1998 National Semiconductor Corporation DS100085 www.national.com CLC007 Serial Digital Cable Driver with Dual Complementary Outputs July 1998 Absolute Maximum Ratings (Note 1) Package Thermal Resistance θJA Surface Mount AJE θJC Surface Mount AJE Reliability Information Transistor Count MTTF If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage Output Current Maximum Junction Temperature Storage Temperature Range Lead Temperature (Soldering 10 seconds) ESD Rating (Human body Model) 6V 30 mA +125˚C −65˚C to +150˚C 125˚C 105˚C/W 72 254 Mhr Recommended Operating Conditions Supply Voltage Range (VCC–VEE) +300˚C 1000V +4.5V to +5.5V Electrical Characteristics (VCC = 0V, VEE = −5V; unless otherwise specified). Parameter Typ +25˚C Conditions Min/Max +25˚C Min/Max 0˚C to +70˚C Min/Max −40˚C to +85˚C Units STATIC PERFORMANCE Supply Current, Loaded (Notes 5, 7) 39 - - - mA Supply Current, Unloaded (Note 3) 34 28/37 26/39 26/39 mA Output HIGH Voltage (VOH) (Note 3) −1.7 −2.0/1.4 −2.0/1.4 −2.0/1.4 V Output Low Voltage (VOL) (Note 3) −3.3 −3.6/3.0 −3.6/3.0 −3.6/3.0 V µA Input Bias Current (Note 4) 10 30 50 50 Output Swing (Note 3) 1.65 1.55/1.75 1.53/1.77 1.51/1.79 V Common Mode Input Range Upper Limit −0.7 −0.8 −0.8 −0.8 V Common Mode Input Range Lower Limit −2.6 −2.5 −2.5 −2.5 V Minimum Differential Input Swing (Note 5) 200 200 200 200 mV Power Supply Rejection Ratio (Note 3) 26 20 20 20 dB 650 425/825 400/850 400/850 ps AC PERFORMANCE Output Rise and Fall Time (Notes 3, 6, 7) Overshoot (Note 5) 5 % Propagation Delay (Note 5) 1.0 ns Duty Cycle Distortion (Note 5) 50 Residual Jitter (Note 5) 25 Input Capacitance (Note 5) 1.0 Output Resistance (Note 5) 10 Ω Output Inductance (Note 5) 6 nH ps - - - pspp MISCELLANEOUS PERFORMANCE pF Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation. Note 2: Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are determined from tested parameters. Note 3: Spec is 100% tested at +25˚C, sampled tested at +85˚C. Note 4: Spec is 100% tested at +35˚C at wafer probe. Note 5: Spec is guaranteed by design. Note 6: Measured between the 20% and 80% levels of the waveform. Note 7: Measured with both outputs driving 150Ω, AC coupled at 270 Mbps. www.national.com 2 Operation INPUT INTERFACING used to provide input termination and biasing. The input D.C. common-mode voltage range is 0.8V to 2.5V below the positive power supply (Vcc). Input signals plus bias should be kept within the specified common-mode range. For an 800 mVP-P input signal, typical input bias levels range from 1.2V to 2.1V below the positive supply. The CLC007 has high impedance, emitter-follower buffered, differential inputs. Single-ended signals may also be input. Transmission lines supplying input signals must be properly terminated close to the CLC007. Either A.C. or D.C. coupling as in Figure 2 or Figure 3 may be used. Figures 2, 4 andFigure 5 show how Thevenin-equivalent resistor networks are Resistor to VCC (R1) Resistor to VEE (R2) ECL, 50Ω, 5V, VT=2V Load Type 82.5Ω 124Ω ECL, 50Ω, 5.2V, VT=2V 80.6Ω 133Ω ECL, 75Ω, 5V, VT=2V 124Ω 187Ω ECL, 75Ω, 5.2V, VT=2V 121Ω 196Ω 800mVP-P, 50Ω, 5V, VT=1.6V 75.0Ω 154Ω 800mVP-P, 75Ω, 5V, VT=1.6V 110Ω 232Ω 800mVP-P, 2.2KΩ, 5V, VT=1.6V 3240Ω 6810Ω DS100085-4 FIGURE 1. Input Stage DS100085-5 FIGURE 2. AC Coupled Input 3 www.national.com Operation (Continued) DS100085-6 FIGURE 3. DC Coupled Input DS100085-7 FIGURE 4. Single Ended 50Ω ECL Input DS100085-8 FIGURE 5. Differential 50Ω ECL Input to the load. A bandgap voltage reference sets output voltage levels which are compatible with F100K and 10K ECL when correctly terminated. The outputs do not have the same output voltage temperature coefficient as 10K. Therefore, noise margins will be reduced over the full temperature range OUTPUT INTERFACING The CLC007’s class AB output stage, Figure 6, requires no standing current in the output transistors and therefore requires no biasing or pull-down resistors. Advantages of this arrangement are lower power dissipation and fewer external components. The output may be either D.C. or A.C. coupled www.national.com 4 Operation (Continued) when driving 10K ECL. Noise margins will not be affected when interfacing to F100K since F100K is fully voltage and temperature compensated. DS100085-9 FIGURE 6. Output Stage DS100085-10 FIGURE 7. Differential Input DC Coupled Output OUTPUT RISE AND FALL TIMES Output load capacitance can significantly affect output rise and fall times. The effect of load capacitance, stray or otherwise, may be reduced by placing the output back-match resistor close to the output pin and by minimizing all interconnecting trace lengths. Figure 8 shows the effect on risetime of parallel load capacitance across a 150Ω load. 5 www.national.com Operation (Continued) DS100085-11 FIGURE 8. Rise Time vs CL www.national.com 6 EVALUATION BOARD A schematic, parts list and layout for a suitable evaluation board are given on the following page. The artwork includes trace, silk screen and ground layers. The individual printed circuit board is available unassembled from National Semiconductor. To order this evaluation board, part number CLC730056, contact your local sales representative or the National Semiconductor Customer Response Center in your area. (This evaluation board is identical to that for the CLC006 the use for which may require additional parts.) The evaluation board is a guide to proper circuit layout and makes prototyping and measurement-taking easy. Since the board is designed to accommodate many of the application circuits possible with the CLC007, your particular application may not require all of the listed parts or may require different values. The evaluation board may be powered from standard ECL supply voltages by installing the two jumpers in the locations labeled “−5”. For PECL supply voltages, install the jumpers in the locations labeled “+5”. PCB Layout Recommendations Printed circuit board layout affects the performance of the CLC007. The following guidelines will aid in achieving satisfactory device performance. • Use a ground plane or power/ground plane sandwich design for optimum performance. • Bypass device power with a 0.01 µF monolithic ceramic capacitor in parallel with a 6.8 µF tantalum electrolytic capacitor located no more than 0.1″ (2.5 mm) from the device power pins. • Provide short, symmetrical ground return paths for: — inputs, — supply bypass capacitors and — the output load. • Provide short, grounded guard traces located — under the centerline of the package, — 0.1″ (2.5 mm) from the package pins — on both top and bottom of the board with connecting vias. DS100085-12 CLC007 Evaluation Board Schematic 7 www.national.com PCB Layout Recommendations Item (Continued) Reference Designator Part Description Qty 1 C1, C2, C3, C4, C8, C9 0.1 µF SMD Capacitor, Size 1206 6 2 C7, C10, C13, C14 0.01 µF SMD Capacitor, Size 1206 4 3 C11, C12 6.8 µF SMD Tantalum Capacitor, Size 6032 2 4 J1, J2 BNC PC Amphenol #31-5329-52RFX 2 5 J3, J4, J5, J6 BNC PC Amphenol #31-5329-72RFX 4 6 R3, R1 154Ω SMD Resistor, Size 1206 2 7 R4, R5, R6, R7, R8, R9 75Ω SMD Resistor, Size 1206 6 8 U1 CLC007AJE Cable Driver 1 9 +5, −5 Jumper 2 www.national.com 8 PCB Layout Recommendations (Continued) DS100085-13 DS100085-14 DS100085-15 DS100085-16 9 www.national.com CLC007 Serial Digital Cable Driver with Dual Complementary Outputs Physical Dimensions inches (millimeters) unless otherwise noted Order Number CLC007AJE NS Package Number M08A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or sysdevice or system whose failure to perform can be reatems which, (a) are intended for surgical implant into sonably expected to cause the failure of the life support the body, or (b) support or sustain life, and whose faildevice or system, or to affect its safety or effectiveness. ure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 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