RICHTEK JMK107BJ106MA

®
RT8035
Dual 800mA, 1.25MHz Synchronous Step-Down Converter
General Description
Features
The RT8035 is a high-efficiency Pulse-Width-Modulated
(PWM) dual step-down DC/DC converter. Capable of
delivering up to 800mA output current over a wide input
voltage range from 2.5V to 5.5V, the RT8035 is ideally
suited for portable electronic devices that are powered
from 1-cell Li-ion battery or from other power sources such
as cellular phones, PDAs, PC WLAN card and hand-held
devices.
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Three operating modes are available including : PWM
mode, Low-Dropout Mode and shut-down mode. The
Internal synchronous rectifier with low RDS(ON) dramatically
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reduces conduction loss at PWM mode. No external
Schottky diode is required in practical application. The
RT8035 enters Low-Dropout mode when normal PWM
cannot provide regulated output voltage by continuously
turning on the upper P-MOSFET. The RT8035 enters shutdown mode and consumes less than 0.1μA when the EN
pin is pulled low.
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2.5V to 5.5V Input Range
800mA Output Current
1.25MHz Fixed Frequency PWM Operation
95% Efficiency
No Schottky Diode Required
0.6V Reference Allows Low Output Voltage
Low Dropout Operation : 100% Duty Cycle
Small 10-Lead WDFN Package
RoHS Compliant and Halogen Free
Applications
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Portable Instruments
Microprocessors and DSP Core Supplies
Cellular Phones
Wireless and DSL Modems
PC Cards
Pin Configurations
1
2
3
4
5
11
10
9
8
7
9
EN1
FB1
VIN2
GND
LX2
GND
(TOP VIEW)
The switching ripple is easily smoothed-out by small
package filtering elements due to the fixed operating
frequency of 1.25MHz. The RT8035 is available in the
WDFN-10L 3x3 package.
LX1
GND
VIN1
FB2
EN2
WDFN-10L 3x3
Ordering Information
RT8035
Package Type
QW : WDFN-10L 3x3 (W-Type)
Lead Plating System
G : Green (Halogen Free and Pb Free)
Z : ECO (Ecological Element with
Halogen Free and Pb free)
Marking Information
RT8035GQW
GD= : Product Code
GD=YM
DNN
YMDNN : Date Code
Note :
Richtek products are :
`
RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020.
`
Suitable for use in SnPb or Pb-free soldering processes.
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
DS8035-05
October 2012
RT8035ZQW
GD : Product Code
GD YM
DNN
YMDNN : Date Code
is a registered trademark of Richtek Technology Corporation.
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1
RT8035
Typical Application Circuit
VIN1
CIN1
4.7µF
8 VIN1
CIN2
4.7µF
1
Chip Enable
LX1
10
L1
2.2µH
VOUT1
CFF1
3
VIN2
RT8035
6
FB1
VIN2
2
R1
110k
R2
110k
LX2
EN1
5
EN2
L2
2.2µH
VOUT2
CFF2
4, 9
GND
11 (Exposed Pad)
FB2
COUT1
10µF
7
R3
110k
R4
110k
COUT2
10µF
Function Block Diagram
EN1/EN2
VIN1/VIN2
RS1
OSC &
Shutdown
Control
Current
Limit
Detector
Slope
Compensation
Current
Sense
Control
Logic
Error
Amplifier
Driver
LX1/LX2
PWM
Comparator
FB1/FB2
RC
UVLO &
Power Good
Detector
COMP
RS2
GND
VREF
Functional Pin Description
Pin No.
1
2
Pin Name
EN1
FB1
Pin Function
Chip Enable of Channel 1 (Active High).
Feedback Input of Channel 1.
3
VIN2
Power Supply Input of Channel 2.
5
6
LX2
EN2
Switching Node of Channel 2.
Chip Enable of Channel 2 (Active High).
7
8
10
FB2
VIN1
LX1
Feedback Input of Channel 2.
Power Supply Input of Channel 1.
Switching Node of Channel 1.
GND
(Exposed Pad)
Ground. The exposed pad must be soldered to a large PCB and connected to
GND for maximum power dissipation.
4, 9, 11
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is a registered trademark of Richtek Technology Corporation.
DS8035-05
October 2012
RT8035
Absolute Maximum Ratings
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(Note 1)
Supply Input Voltage VIN1, VIN2 ---------------------------------------------------------------------------------- −0.3V to 6.5V
LX1, LX2 Pin Voltage ------------------------------------------------------------------------------------------------- −0.3V to (VIN +0.3V)
Other Pins Voltage ---------------------------------------------------------------------------------------------------- −0.3V to 6.5V
Power Dissipation, PD @ TA = 25°C
WDFN-10L 3x3 --------------------------------------------------------------------------------------------------------- 1.471W
Package Thermal Resistance (Note 2)
WDFN-10L 3x3, θJA --------------------------------------------------------------------------------------------------- 68°C/W
WDFN-10L 3x3, θJC --------------------------------------------------------------------------------------------------- 7.8°C/W
Lead Temperature (Soldering, 10 sec.) --------------------------------------------------------------------------- 260°C
Junction Temperature ------------------------------------------------------------------------------------------------- 150°C
Storage Temperature Range ---------------------------------------------------------------------------------------- −65°C to 150°C
ESD Susceptibility (Note 3)
HBM (Human Body Model) ------------------------------------------------------------------------------------------ 2kV
Recommended Operating Conditions
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(Note 4)
Supply Input Voltage -------------------------------------------------------------------------------------------------- 2.5V to 5.5V
Junction Temperature Range ---------------------------------------------------------------------------------------- −40°C to 125°C
Ambient Temperature Range ---------------------------------------------------------------------------------------- −40°C to 85°C
Electrical Characteristics
(VIN = 3.6V, TA = 25°C unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
2.5
--
5.5
V
0.588
0.6
0.612
V
--
70
--
μA
--
0.1
1
μA
VIN Rising
--
2.1
--
Hysteresis
--
0.18
--
1
1.25
1.5
Input Voltage Range
VIN
Reference Voltage
VREF
Quiescent Current
IQ
Shutdown Current
ISHDN
Under Voltage
Lock Out Threshold
UVLO
Oscillator Frequency
fOSC
VIN = 3.6V, IOUT = 300mA
Enable High-Level Input Voltage
VEN_H
VIN = 2.5V to 5.5V
1.25
--
VIN
Enable Low-Level Input Voltage
VEN_L
VIN = 2.5V to 5.5V
--
--
0.9
Thermal Shutdown Temperature
TSD
--
160
--
°C
Peak Current Limit
ILIM
1.1
1.5
--
A
Switch On Resistance, High
R DS(ON)_P IOUT = 200mA, VIN = 3.6V
--
0.25
--
Ω
Switch On Resistance, Low
R DS(ON)_N IOUT = 200mA, VIN = 3.6V
--
0.26
--
Ω
IOUT = 0mA, VFB = VREF + 5%
VIN = 2.5V to 5.5 V
V
MHz
V
Output Line Regulation
VIN = 2.5V to 5.5V (Note 5)
--
0.04
0.4
%/V
Output Load Regulation
50mA < ILOAD < 0.8A (Note 5)
--
0.5
--
%
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
DS8035-05
October 2012
is a registered trademark of Richtek Technology Corporation.
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RT8035
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is
measured at the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Note 5. Guarantee by design.
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is a registered trademark of Richtek Technology Corporation.
DS8035-05
October 2012
RT8035
Typical Operating Characteristics
Efficiency vs. Output Current
Output Voltage vs. Output Current
1.230
90
1.225
80
1.220
Output Voltage (V)
100
Efficiency (%)
70
VIN = 2.5V
VIN = 3.3V
VIN = 5.5V
60
50
40
30
20
10
0.01
0.1
1.210
1.205
1.200
1.195
1.190
1.185
VOUT = 1.2V
0
0.001
1.215
VIN = 3.3V
1.180
1
0
0.1
0.2
0.3
Output Current (A)
0.6
0.7
0.8
0.9
1
Reference Voltage vs. Temperature
0.620
0.615
0.615
Reference Voltage (V)
Reference Voltage (V)
Reference Voltage vs. Input Voltage
0.610
0.605
0.600
0.595
0.590
0.610
0.605
0.600
0.595
0.590
0.585
0.585
VOUT = 1.2V, IOUT = 0.1A
0.580
2.5
3
3.5
4
4.5
5
VIN = 2.5V, VOUT = 1.2V, IOUT = 0.1A
0.580
-50
5.5
-25
0
25
50
75
100
125
Temperature (°C)
Input Voltage (V)
Current Limit vs Temperature
Frequency vs. Temperature
1.50
2.1
1.45
1.9
1.40
1.35
Current Limit (A)
Frequency (MHz)1
0.5
Output Current (A)
0.620
1.30
1.25
1.20
1.15
1.10
1.7
1.5
1.3
1.1
0.9
0.7
1.05
VIN = 3.3V, VOUT = 1.2V
1.00
-50
-25
0
25
50
75
100
Temperature (°C)
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
DS8035-05
0.4
October 2012
125
VIN = 3.3V, VOUT = 1.2V
0.5
-50
-25
0
25
50
75
100
125
Temperature (°C)
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RT8035
Power On from VIN
Power On from EN
VIN = 2.5V, VOUT = 1.2V
IOUT = 0.8A
VIN = 2.5V,
VOUT = 1.2V,
IOUT = 0.8A
VIN
(1V/Div)
VEN
(1V/Div)
VOUT
(1V/Div)
VOUT
(1V/Div)
IOUT
(1A/Div)
IOUT
(1A/Div)
Time (5ms/Div)
Time (250μs/Div)
Power Off from EN
Switching
VIN = 2.5V,
VOUT = 1.2V,
IOUT = 0.8A
VEN
(1V/Div)
VOUT
(5mV/Div)
VOUT
(1V/Div)
VLX
(2V/Div)
IOUT
(1A/Div)
IOUT
(1A/Div)
Time (50μs/Div)
Time (250ns/Div)
Load Transient Response
Load Transient Response
VOUT
(50mV/Div)
VOUT
(50mV/Div)
IOUT
(1A/Div)
IOUT
(1A/Div)
VIN = 2.5V, VOUT = 1.2V, IOUT = 0.4A to 0.8A
Time (100μs/Div)
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VIN = 2.5V, VOUT = 1.2V, IOUT = 0.8A
VIN = 2.5V, VOUT = 1.2V, IOUT = 0.1A to 0.8A
Time (100μs/Div)
is a registered trademark of Richtek Technology Corporation.
DS8035-05
October 2012
RT8035
Applications Information
The basic RT8035 application circuit is shown in Typical
Application Circuit. External component selection is
determined by the maximum load current and begins with
the selection of the inductor value and operating frequency
followed by CIN and COUT.
Inductor Selection
For a given input and output voltage, the inductor value
and operating frequency determine the ripple current. The
ripple current ΔIL increases with higher VIN and decreases
with higher inductance.
⎡V
⎤ ⎡ V
⎤
ΔIL = ⎢ OUT ⎥ × ⎢1 − OUT ⎥
f
L
×
V
IN ⎦
⎣
⎦ ⎣
Having a lower ripple current reduces the ESR losses in
the output capacitors and the output voltage ripple. Highest
efficiency operation is achieved at low frequency with small
ripple current. This, however, requires a large inductor.
A reasonable starting point for selecting the ripple current
is ΔIL = 0.4(IMAX). The largest ripple current occurs at the
highest VIN. To guarantee that the ripple current stays
below a specified maximum, the inductor value should be
chosen according to the following equation :
VOUT ⎤
⎡ VOUT ⎤ ⎡
L=⎢
× ⎢1 −
⎥
⎣ f × ΔIL(MAX) ⎥⎦ ⎣ VIN(MAX) ⎦
Inductor Core Selection
Once the value for L is known, the type of inductor must
be selected. High efficiency converters generally cannot
afford the core loss found in low cost powdered iron cores,
forcing the use of more expensive ferrite or mollypermalloy
cores. Actual core loss is independent of core size for a
fixed inductor value but it is very dependent on the
inductance selected. As the inductance increases, core
losses decrease. Unfortunately, increased inductance
requires more turns of wire and therefore copper losses
will increase.
Ferrite designs have very low core losses and are preferred
at high switching frequencies, so design goals can
concentrate on copper loss and preventing saturation.
Ferrite core material saturates “hard”, which means that
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
DS8035-05
October 2012
inductance collapses abruptly when the peak design
current is exceeded. This results in an abrupt increase in
inductor ripple current and consequent output voltage ripple.
Do not allow the core to saturate!
Different core materials and shapes will change the size/
current and price/current relationship of an inductor.
Toroid or shielded pot cores in ferrite or permalloy materials
are small and don't radiate energy but generally cost more
than powdered iron core inductors with similar
characteristics. The choice of which style inductor to use
mainly depends on the price vs size requirements and
any radiated field/EMI requirements.
CIN and COUT Selection
The input capacitance, C IN, is needed to filter the
trapezoidal current at the source of the top MOSFET. To
prevent large ripple voltage, a low ESR input capacitor
sized for the maximum RMS current should be used. RMS
current is given by :
IRMS = IOUT(MAX)
VOUT
VIN
VIN
−1
VOUT
This formula has a maximum at VIN = 2VOUT, where
I RMS = I OUT/2. This simple worst-case condition is
commonly used for design because even significant
deviations do not offer much relief. Note that ripple current
ratings from capacitor manufacturers are often based on
only 2000 hours of life which makes it advisable to further
derate the capacitor, or choose a capacitor rated at a higher
temperature than required. Several capacitors may also
be paralleled to meet size or height requirements in the
design.
The selection of COUT is determined by the effective series
resistance (ESR) that is required to minimize voltage ripple
and load step transients, as well as the amount of bulk
capacitance that is necessary to ensure that the control
loop is stable. Loop stability can be checked by viewing
the load transient response as described in a later section.
The output ripple, ΔVOUT, is determined by :
⎡
1 ⎤
ΔVOUT ≤ ΔIL ⎢ESR +
⎥
8fC
OUT ⎦
⎣
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RT8035
The output ripple is highest at maximum input voltage
since ΔIL increases with input voltage. Multiple capacitors
placed in parallel may be needed to meet the ESR and
RMS current handling requirements. Dry tantalum, special
polymer, aluminum electrolytic and ceramic capacitors are
all available in surface mount packages. Special polymer
capacitors offer very low ESR but have lower capacitance
density than other types. Tantalum capacitors have the
highest capacitance density but it is important to only
use types that have been surge tested for use in switching
power supplies. Aluminum electrolytic capacitors have
significantly higher ESR but can be used in cost-sensitive
applications provided that consideration is given to ripple
current ratings and long term reliability. Ceramic capacitors
have excellent low ESR characteristics but can have a
high voltage coefficient and audible piezoelectric effects.
The high Q of ceramic capacitors with trace inductance
can also lead to significant ringing.
For adjustable voltage mode, the output voltage is set by
an external resistive divider according to the following
equation :
VOUT = VREF (1 + R1)
R2
where VREF is the internal reference voltage (0.6V typ.)
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to ΔILOAD (ESR), where ESR is the effective series
resistance of COUT. ΔILOAD also begins to charge or
discharge COUT generating a feedback error signal used
by the regulator to return VOUT to its steady-state value.
During this recovery time, VOUT can be monitored for
overshoot or ringing that would indicate a stability problem.
Thermal Considerations
Using Ceramic Input and Output Capacitors
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
input, VIN. At best, this ringing can couple to the output
and be mistaken as loop instability. At worst, a sudden
inrush of current through the long wires can potentially
cause a voltage spike at VIN large enough to damage the
part.
Output Voltage Setting
The resistive divider allows the FB pin to sense a fraction
of the output voltage as shown in Figure 1.
VOUT
R1
FB
RT8035
For continuous operation, do not exceed absolute
maximum operation junction temperature. The maximum
power dissipation depends on the thermal resistance of
IC package, PCB layout, the rate of surroundings airflow
and temperature difference between junction to ambient.
The maximum power dissipation can be calculated by
following formula :
PD(MAX) = (TJ(MAX) − TA) / θJA
Where T J(MAX) is the maximum operation junction
temperature, TA is the ambient temperature and the θJA is
the junction to ambient thermal resistance.
For recommended operating conditions specification, the
maximum junction temperature is 125°C. The junction to
ambient thermal resistance θJA is layout dependent. For
WDFN-10L 3x3 package, the thermal resistance θJA is
68°C/W on the standard JEDEC 51-7 four layers thermal
test board. The maximum power dissipation at TA = 25°C
can be calculated by following formula :
PD(MAX) = (125°C − 25°C) / (68°C/W) = 1.471W for
WDFN-10L 3x3
R2
GND
Figure 1. Setting Output Voltage
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is a registered trademark of Richtek Technology Corporation.
DS8035-05
October 2012
RT8035
The maximum power dissipation depends on operating
ambient temperature for fixed T J(MAX) and thermal
resistance θJA. The Figure 2 of derating curve allows the
designer to see the effect of rising ambient temperature
on the maximum power dissipation allowed.
Maximum Power Dissipation (W)1
1.6
Four Layers PCB
Layout Considerations
Follow the PCB layout guidelines for optimal performance
of RT8035.
`
Keep the trace of the main current paths as short and
wide as possible.
` Put the input capacitor as close as possible to the device
1.4
pins (VIN1 / VIN2 and GND).
1.2
`
LX 1 / LX 2 node is with high frequency voltage swing
and should be kept at small area. Keep analog
components away from the LX 1 / LX 2 node to prevent
stray capacitive noise pick-up.
`
Place the feedback components as close as possible to
the FB1 / FB2 pins.
`
The GND and Exposed Pad must be connected to a
strong ground plane for heat sinking and noise protection.
WDFN-10L 3x3
1.0
0.8
0.6
0.4
0.2
0.0
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 2. Derating Curve of Maximum Power Dissipation
C IN2
C OUT2
V OUT2
R1
L1
1
10
2
9
3
GND
V OUT1
R2
EN1
FB1
VIN2
GND
L2
LX2
7
4
5
8
11
9
C FF1
LX1
GND
VIN1
FB2
EN2
R4
V OUT1
C OUT1
C IN1
R3
V OUT2
C FF2
GND
Figure 3. PCB Layout Guide
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October 2012
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RT8035
Table 1. Recommended Inductors
Supplier
Inductance
(μH)
Dimensions
(mm)
Series
TAIYO YUDEN
2.2
3.00 x 3.00 x 1.50
NR 3015
GOTREND
2.2
3.85 x 3.85 x 1.80
GTSD32
Sumida
2.2
4.50 x 3.20 x 1.55
CDRH2D14
Sumida
4.7
4.50 x 3.20 x 1.55
CDRH2D14
TAIYO YUDEN
4.7
3.00 x 3.00 x 1.50
NR 3015
GOTREND
4.7
3.85 x 3.85 x 1.80
GTSD32
Table 2. Recommended Capacitors for CIN and COUT
Supplier
Capacitance
(μF)
Package
Part Number
TDK
4.7
0603
C1608JB0J475M
MURATA
4.7
0603
GRM188R60J475KE19
TAIYO YUDEN
4.7
0603
JMK107BJ475RA
TAIYO YUDEN
10
0603
JMK107BJ106MA
TDK
10
0805
C2012JB0J106M
MURATA
10
0805
GRM219R60J106ME19
MURATA
10
0805
GRM219R60J106KE19
TAIYO YUDEN
10
0805
JMK212BJ106RD
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DS8035-05
October 2012
RT8035
Outline Dimension
D2
D
L
E
E2
1
e
2
SEE DETAIL A
Symbol
2
1
DETAIL A
Pin #1 ID and Tie Bar Mark Options
b
A
A1
1
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
A3
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
A
0.700
0.800
0.028
0.031
A1
0.000
0.050
0.000
0.002
A3
0.175
0.250
0.007
0.010
b
0.180
0.300
0.007
0.012
D
2.950
3.050
0.116
0.120
D2
2.300
2.650
0.091
0.104
E
2.950
3.050
0.116
0.120
E2
1.500
1.750
0.059
0.069
e
L
0.500
0.350
0.020
0.450
0.014
0.018
W-Type 10L DFN 3x3 Package
Richtek Technology Corporation
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
DS8035-05
October 2012
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