RICHTEK RT8024

RT8024
1.5MHz, 400mA, High Efficiency PWM Step-Down
DC/DC Converter
General Description
Features
The RT8024 is a high-efficiency pulse-width-modulated
(PWM) step-down DC/DC converter. Capable of delivering
400mA output current over a wide input voltage range from
2.5V to 5.5V, the RT8024 is ideally suited for portable
electronic devices that are powered from 1-cell Li-ion
battery or from other power sources within the range such
as cellular phones, PDAs and handy-terminals.
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2.5V to 5.5V Input Range
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Adjustable Output From 0.6V to VIN
1.0V, 1.2V, 1.5V, 1.8V, 2.5V and 3.3V Fixed/
Adjustable Output Voltage
400mA Output Current, 1A Peak Current
95% Efficiency
No Schottky Diode Required
1.5MHz Fixed Frequency PWM Operation
Small SOT-23-5 and TSOT-23-5 Package
RoHS Compliant and Halogen Free
Internal synchronous rectifier with low RDS(ON) dramatically
reduces conduction loss at PWM mode. No external
Schottky diode is required in practical application. The
RT8024 automatically turns off the synchronous rectifier
while the inductor current is low and enters discontinuous
PWM mode. This can increase efficiency at light load
condition.
The RT8024 enters Low-Dropout mode when normal PWM
cannot provide regulated output voltage by continuously
turning on the upper P-MOSFET. RT8024 enter shutdown
mode and consumes less than 0.1μA when EN pin is pulled
low.
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Applications
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Cellular Telephones
Personal Information Appliances
Wireless and DSL Modems
MP3 Players
Portable Instruments
Ordering Information
RT8024(-
Package Type
B : SOT-23-5
J5 : TSOT-23-5
The switching ripple is easily smoothed-out by small
package filtering elements due to a fixed operation
frequency of 1.5MHz. This along with small SOT-23-5 and
TSOT-23-5 package provides small PCB area application.
Other features include soft start, lower internal reference
voltage with 2% accuracy, over temperature protection,
and over current protection.
Lead Plating System
G : Green (Halogen Free and Pb Free)
Output Voltage
Default : Adjustable
10 : 1.0V
12 : 1.2V
15 : 1.5V
18 : 1.8V
25 : 2.5V
33 : 3.3V
Pin Configurations
(TOP VIEW)
FB/VOUT
)
VIN
Note :
5
4
2
3
EN GND LX
Richtek products are :
`
RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020.
`
Suitable for use in SnPb or Pb-free soldering processes.
SOT-23-5/TSOT-23-5
Marking Information
For marking information, contact our sales representative
directly or through a Richtek distributor located in your
area.
DS8024-02 March 2011
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1
RT8024
Typical Application Circuit
4
VIN
2.2V to 5.5V
VIN
CIN
4.7µF
LX
3
L
2.2µH
VOUT
RT8024
1
EN
VOUT
COUT
5
10µF
GND
2
Figure 1. Fixed Voltage Regulator
4
VIN
2.2V to 5.5V
VIN
LX
CIN
3
L
2.2µH
VOUT
C1
RT8024
4.7µF
1
EN
FB
GND
2
R1 ⎞
⎛
V OUT = V REF x ⎜ 1 +
⎟
R2 ⎠
⎝
R1
COUT
5
10µF
IR2
R2
with R2 = 300kΩ to 60kΩ so the IR2 = 2μA to 10μA,
and (R1 x C1) should be in the range between 3x10-6 and 6x10-6 for component selection.
Figure 2. Adjustable Voltage Regulator
Layout Guide
VIN
CIN
VIN
4
GND
COUT
3
LX
2
GND
1
EN
VIN
VOUT
L
CIN
VIN
4
GND
COUT
3
LX
2
GND
1
EN
VOUT
L
C1
VOUT
5
FB
R1
VOUT
GND
5
R2
GND
Figure 3
Layout note:
1. The distance that CIN connects to VIN is as close as possible (Under 2mm).
2. COUT should be placed near RT8024.
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DS8024-02 March 2011
RT8024
Functional Pin Description
Pin No.
1
2
3
4
5
Pin Name
Pin Function
EN
GND
LX
VIN
FB/VOUT
Chip Enable (Active High, do not leave EN pin floating, and VEN < VIN + 0.6V).
Ground.
Pin for Switching.
Power Input.
Feedback Input Pin.
Function Block Diagram
VIN
EN
RS1
OSC &
Shutdown
Control
Slope
Compensation
FB/VOUT
Error
Amplifier
Current
Limit
Detector
Current
Sense
Control
Logic
PWM
Comparator
Driver
LX
RC
COMP
UVLO &
Power Good
Detector
Zero
Detector
RS2
VREF
GND
DS8024-02 March 2011
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3
RT8024
Absolute Maximum Ratings
(Note 1)
Supply Input Voltage -----------------------------------------------------------------------------------------------------Enable, FB Voltage ------------------------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C
SOT-23-5, TSOT-23-5 ----------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2)
SOT-23-5, TSOT-23-5, θJA ----------------------------------------------------------------------------------------------SOT-23-5, TSOT-23-5, θJC ----------------------------------------------------------------------------------------------Junction Temperature Range -------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------Storage Temperature Range -------------------------------------------------------------------------------------------ESD Susceptibility (Note 3)
HBM (Human Body Mode) ---------------------------------------------------------------------------------------------MM (Machine Mode) ------------------------------------------------------------------------------------------------------
Recommended Operating Conditions
6.5V
VIN + 0.6V
0.4W
250°C/W
130°C/W
150°C
260°C
−65°C to 150°C
2kV
200V
(Note 4)
Supply Input Voltage ------------------------------------------------------------------------------------------------------ 2.5V to 5.5V
Junction Temperature Range -------------------------------------------------------------------------------------------- −40°C to 125°C
Ambient Temperature Range -------------------------------------------------------------------------------------------- −40°C to 85°C
Electrical Characteristics
(VIN = 3.6V, VOUT = 2.5V, VREF = 0.6V, L = 2.2μH, CIN = 4.7μF, COUT = 10μF, TA = 25°C, IMAX = 400mA unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
2.5
--
5.5
V
Input Voltage Range
VIN
Quiescent Current
IQ
IOUT = 0mA, VFB = VREF + 5%
--
50
100
μA
Shutdown Current
I SHDN
EN = GND
--
0.1
1
μA
Reference Voltage
VREF
For adjustable output voltage
0.588
0.6
0.612
V
Adjustable Output Range
VOUT
VREF
--
VIN − 0.2
V
−3
--
3
%
−3
--
3
%
−3
--
3
%
−3
--
3
%
−3
--
3
%
−3
--
3
%
−3
--
3
%
−3
--
3
%
ΔVOUT
ΔVOUT
ΔVOUT
Fix
Output Voltage
Accuracy
ΔVOUT
ΔVOUT
ΔVOUT
VIN = 2.2 to 5.5V, VOUT = 1.0V
0A < IOUT < 400mA
VIN = 2.2 to 5.5V, VOUT = 1.2V
0A < IOUT < 400mA
VIN = 2.2 to 5.5V, VOUT = 1.5V
0A < IOUT < 400mA
VIN = 2.2 to 5.5V, VOUT = 1.8V
0A < IOUT < 400mA
VIN = 2.8 to 5.5V, VOUT = 2.5V
0A < IOUT < 400mA
VIN = 3.5 to 5.5V, VOUT = 3.3V
0A < IOUT < 400mA
VIN = VOUT + 0.2V to 5.5V, VIN ≧ 3.5V
Adjustable ΔVOUT
0A < IOUT < 400mA
VIN = VOUT + 0.4V to 5.5V, VIN ≧ 2.2V
0A < IOUT < 400mA
To be continued
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DS8024-02 March 2011
RT8024
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
−50
--
50
nA
VIN = 3.6V
--
0.3
--
VIN = 2.5V
--
0.4
--
VIN = 3.6V
--
0.25
--
VIN = 2.5V
--
0.35
--
FB Input Current
IFB
PMOSFET RON
PRDS(ON) I OUT = 200mA
NMOSFET RON
NRDS(ON) I OUT = 200mA
P-Channel Current Limit
IP(LM)
VIN = 2.5V to 5.5 V
1
--
1.8
A
EN High-Level Input Voltage
VENH
VIN = 2.5V to 5.5V
1.5
--
--
V
EN Low-Level Input Voltage
VENL
VIN = 2.5V to 5.5V
--
--
0.4
V
Undervoltage Lock Out threshold
--
1.8
--
V
Hysteresis
--
0.1
--
V
1.2
1.5
1.8
MHz
--
160
--
°C
--
50
--
ns
100
--
--
%
−1
--
1
μA
Oscillator Frequency
fOSC
Thermal Shutdown Temperature
TSD
VFB = VIN
VIN = 3.6V, I OUT = 100mA
Min. On Time
Max. Duty Cycle
LX Leakage Current
VIN = 3.6V, VLX = 0V or VLX = 3.6V
Ω
Ω
Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. θJA is measured in the natural convection at TA = 25°C on a low effective single layer thermal conductivity test board of
JEDEC 51-3 thermal measurement standard. Pin 2 of SOT-23-5/TSOT-23-5 packages is the case position for θJC
measurement.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
DS8024-02 March 2011
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RT8024
Typical Operating Characteristics
Reference Voltage vs. Input Voltage
Efficiency vs. Load Current
100
VIN = 3.3V
Reference Voltage (V)
Efficiency (%)
90
0.6010
80
70
VIN = 5V
60
50
40
0.01
VOUT = 1.2V
0.11
0.21
0.31
0.41
0.51
0.6005
0.6000
0.5995
VOUT = 1.2V
0.5990
0.61
2.5
3
3.5
4
4.5
5
5.5
Input Voltage (V)
Load Current (A)
Current Limit vs. Input Voltage
Output Voltage vs. Load Current
2.5
1.220
2.0
1.210
VIN = 3.3V
VIN = 5V
1.205
1.200
VIN = 2.5V
1.195
1.190
Current Limit (A)
Output Voltage (V)
1.215
1.5
1.0
0.5
1.185
VOUT = 1.2V
VOUT = 1.2V
0.0
1.180
0.01
0.11
0.21
0.31
0.41
0.51
2.5
0.61
3
3.5
Frequency vs. Input Voltage
4.5
5
5.5
Frequency vs. Temperature
1.50
1.50
VOUT = 1.2V, IOUT = 300mA
1.48
Frequency (MHz)
1.48
Frequency (MHz)
4
Input Voltage (V)
Load Current (A)
1.45
1.43
1.40
1.38
1.45
1.43
1.40
1.38
1.35
1.33
VOUT = 1.2V, IOUT = 300mA
1.35
2.5
3
3.5
4
4.5
Input Voltage (V)
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5
5.5
1.30
-50
-25
0
25
50
75
100
125
Temperature (°C)
DS8024-02 March 2011
RT8024
Output Ripple
Output Voltage vs. Temperature
1.25
VIN = 3.3V, VOUT = 1.2V, IOUT = 400mA
Output Voltage (V)
1.23
VLX
(5V/Div)
1.21
VOUT
(5mV/Div)
1.19
1.17
VIN = 3.3V, IOUT = 0A
1.15
-50
-25
0
25
50
75
100
ILX
(500mA/Div)
Time (500ns/Div)
125
Temperature (°C)
Load Transient Response
Load Transient Response
VIN = 3.3V, VOUT = 1.2V, IOUT = 100mA to 400mA
VIN = 3.3V, VOUT = 1.2V, IOUT = 200mA to 400mA
VOUT
(20mV/Div)
VOUT
(20mV/Div)
IOUT
(200mA/Div)
IOUT
(200mA/Div)
Time (50μs/Div)
Time (50μs/Div)
Power On
Power Off
VIN = 3.3V, VOUT = 1.2V, IOUT = 400mA
VIN = 3.3V, VOUT = 1.2V, IOUT = 400mA
VEN
(5V/Div)
VEN
(5V/Div)
VOUT
(1V/Div)
VOUT
(1V/Div)
I IN
(200mA/Div)
I IN
(200mA/Div)
Time (100μs/Div)
DS8024-02 March 2011
Time (100μs/Div)
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RT8024
Applications Information
The basic RT8024 application circuit is shown in Typical
Application Circuit. External component selection is
determined by the maximum load current and begins with
the selection of the inductor value and operating frequency
followed by CIN and COUT.
Inductor Selection
For a given input and output voltage, the inductor value
and operating frequency determine the ripple current. The
ripple current ΔIL increases with higher VIN and decreases
with higher inductance.
⎡V
⎤⎡ V
⎤
ΔIL = ⎢ OUT ⎥ ⎢1 − OUT ⎥
f
L
×
V
IN
⎣
⎦⎣
⎦
Having a lower ripple current reduces the ESR losses in
the output capacitors and the output voltage ripple. Highest
efficiency operation is achieved at low frequency with small
ripple current. This, however, requires a large inductor.
A reasonable starting point for selecting the ripple current
is ΔIL = 0.4(IMAX). The largest ripple current occurs at the
highest VIN. To guarantee that the ripple current stays
below a specified maximum, the inductor value should be
chosen according to the following equation :
⎡ VOUT ⎤ ⎡
VOUT ⎤
L=⎢
1−
⎥
⎢
⎥
⎣ f × ΔIL(MAX) ⎦ ⎣ VIN(MAX) ⎦
Inductor Core Selection
Once the value for L is known, the type of inductor must
be selected. High efficiency converters generally cannot
afford the core loss found in low cost powdered iron cores,
forcing the use of more expensive ferrite or mollypermalloy
cores. Actual core loss is independent of core size for a
fixed inductor value but it is very dependent on the
inductance selected. As the inductance increases, core
losses decrease. Unfortunately, increased inductance
requires more turns of wire and therefore copper losses
will increase.
Ferrite designs have very low core losses and are preferred
at high switching frequencies, so design goals can
concentrate on copper loss and preventing saturation.
Ferrite core material saturates “hard”, which means that
inductance collapses abruptly when the peak design
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8
current is exceeded. This results in an abrupt increase in
inductor ripple current and consequent output voltage ripple.
Do not allow the core to saturate!
Different core materials and shapes will change the size/
current and price/current relationship of an inductor.
Toroid or shielded pot cores in ferrite or permalloy materials
are small and don’ t radiate energy but generally cost
more than powdered iron core inductors with similar
characteristics. The choice of which style inductor to use
mainly depends on the price vs size requirements and
any radiated field/EMI requirements.
CIN and COUT Selection
The input capacitance, C IN, is needed to filter the
trapezoidal current at the source of the top MOSFET. To
prevent large ripple voltage, a low ESR input capacitor
sized for the maximum RMS current should be used. RMS
current is given by :
IRMS = IOUT(MAX)
VOUT
VIN
VIN
−1
VOUT
This formula has a maximum at VIN = 2VOUT, where IRMS
= IOUT/2. This simple worst-case condition is commonly
used for design because even significant deviations do
not offer much relief. Note that ripple current ratings from
capacitor manufacturers are often based on only 2000
hours of life which makes it advisable to further derate the
capacitor, or choose a capacitor rated at a higher
temperature than required. Several capacitors may also
be paralleled to meet size or height requirements in the
design.
The selection of COUT is determined by the effective series
resistance (ESR) that is required to minimize voltage ripple
and load step transients, as well as the amount of bulk
capacitance that is necessary to ensure that the control
loop is stable. Loop stability can be checked by viewing
the load transient response as described in a later section.
The output ripple, ΔVOUT, is determined by :
⎡
1 ⎤
ΔVOUT ≤ ΔIL ⎢ESR +
⎥
8fC
OUT ⎦
⎣
The output ripple is highest at maximum input voltage
since ΔIL increases with input voltage. Multiple capacitors
placed in parallel may be needed to meet the ESR and
RMS current handling requirements. Dry tantalum, special
DS8024-02 March 2011
RT8024
polymer, aluminum electrolytic and ceramic capacitors are
all available in surface mount packages. Special polymer
capacitors offer very low ESR but have lower capacitance
density than other types. Tantalum capacitors have the
highest capacitance density but it is important to only
use types that have been surge tested for use in switching
power supplies. Aluminum electrolytic capacitors have
significantly higher ESR but can be used in cost-sensitive
applications provided that consideration is given to ripple
current ratings and long term reliability. Ceramic capacitors
have excellent low ESR characteristics but can have a
high voltage coefficient and audible piezoelectric effects.
The high Q of ceramic capacitors with trace inductance
can also lead to significant ringing.
Using Ceramic Input and Output Capacitors
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
input, VIN. At best, this ringing can couple to the output
and be mistaken as loop instability. At worst, a sudden
inrush of current through the long wires can potentially
cause a voltage spike at VIN large enough to damage the
part.
Efficiency Considerations
The efficiency of a switching regulator is equal to the output
power divided by the input power times 100%. It is often
useful to analyze individual losses to determine what is
limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as :
Efficiency = 100% − (L1+ L2+ L3+ ...)
where L1, L2, etc. are the individual losses as a percentage
of input power. Although all dissipative elements in the
circuit produce losses, two main sources usually account
for most of the losses : VIN quiescent current and I2R
losses. The VIN quiescent current loss dominates the
efficiency loss at very low load currents whereas the I2R
loss dominates the efficiency loss at medium to high load
currents. In a typical efficiency plot, the efficiency curve
at very low load currents can be misleading since the
actual power lost is of no consequence.
1. The VIN quiescent current is due to two components :
the DC bias current as given in the electrical characteristics
and the internal main switch and synchronous switch gate
charge currents. The gate charge current results from
switching the gate capacitance of the internal power
MOSFET switches. Each time the gate is switched from
high to low to high again, a packet of charge ΔQ moves
from VIN to ground.
The resulting ΔQ/Δt is the current out of VIN that is typically
larger than the DC bias current. In continuous mode,
IGATECHG = f(QT+QB)
Output Voltage Programming
The resistive divider allows the VFB pin to sense a fraction
of the output voltage as shown in Figure 4.
VOUT
R1
FB
RT8024
R2
GND
Figure 4. Setting the Output Voltage
For adjustable about voltage mode, the output voltage is
set by an external resistive divider according to the following
equation : V
R1)
OUT = VREF (1 +
R2
where VREF is the internal reference voltage (0.6V typ.)
DS8024-02 March 2011
where QT and QB are the gate charges of the internal top
and bottom switches. Both the DC bias and gate charge
losses are proportional to VIN and thus their effects will
be more pronounced at higher supply voltages.
2. I2R losses are calculated from the resistances of the
internal switches, R SW and external inductor RL. In
continuous mode the average output current flowing
through inductor L is “chopped” between the main switch
and the synchronous switch. Thus, the series resistance
looking into the LX pin is a function of both top and bottom
MOSFET RDS(ON) and the duty cycle (DC) as follows :
RSW = RDS(ON)TOP x DC + RDS(ON)BOT x (1−DC)
The RDS(ON) for both the top and bottom MOSFETs can be
obtained from the Typical Performance Characteristics
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9
RT8024
curves. Thus, to obtain I2R losses, simply add RSW to RL
and multiply the result by the square of the average output
current.
Other losses including CIN and COUT ESR dissipative
losses and inductor core losses generally account for less
than 2% of the total loss.
Where TC is the package case (Pin 2 of package leads)
temperature measured by thermal sensor, PD is the power
dissipation defined by user's function and the θJC is the
junction to case thermal resistance provided by IC
manufacturer. Therefore it's easy to estimate the junction
temperature by any condition.
Thermal Considerations
Checking Transient Response
The maximum power dissipation depends on the thermal
resistance of IC package, PCB layout, the rate of
surroundings airflow and temperature difference between
junction to ambient. The maximum power dissipation can
be calculated by following formula :
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
PD(MAX) = ( TJ(MAX) - TA ) / θJA
Where T J(MAX) is the maximum operation junction
temperature 125°C, TA is the ambient temperature and the
θJA is the junction to ambient thermal resistance.
equal to ΔILOAD (ESR), where ESR is the effective series
resistance of COUT. ΔILOAD also begins to charge or
discharge COUT generating a feedback error signal used
by the regulator to return VOUT to its steady-state value.
During this recovery time, VOUT can be monitored for
overshoot or ringing that would indicate a stability problem.
For recommended operating conditions specification of
RT8024 DC/DC converter, where TJ (MAX) is the maximum
junction temperature of the die (125°C) and TA is the
maximum ambient temperature. The junction to ambient
thermal resistance θ JA is layout dependent. For
SOT-23-5/TSOT-23-5 packages, the thermal resistance θJA
is 250°C/W on the standard JEDEC 51-3 single-layer
thermal test board. The maximum power dissipation at
TA = 25°C can be calculated by following formula :
Maximum Power Dissipation (mW)
450
PD(MAX) = ( 125°C - 25°C ) / 250 = 0.4 W for SOT-23-5/
TSOT-23-5 packages
The maximum power dissipation depends on operating
ambient temperature for fixed T J(MAX) and thermal
resistance θJA. For RT8024 packages, the Figure 5 of
derating curves allows the designer to see the effect of
rising ambient temperature on the maximum power
allowed.
The value of junction to case thermal resistance θJC is
popular for users. This thermal parameter is convenient
for users to estimate the internal junction operated
temperature of packages while IC operating. It's
independent of PCB layout, the surroundings airflow effects
and temperature difference between junction to ambient.
The operated junction temperature can be calculated by
following formula :
Single Layer PCB
400
350
SOT-23-5, TSOT-23-5 Packages
300
250
200
150
100
50
0
0
20
40
60
80
100
120
140
Ambient Temperature (°C)
Figure 5. Derating Curves for RT8024 Package
Layout Considerations
Follow the PCB layout guidelines for optimal performance
of RT8024.
`
For the main current paths as indicated in bold lines in
Figure 6, keep their traces short and wide.
` Put the input capacitor as close as possible to the device
pins (VIN and GND).
` LX node is with high frequency voltage swing and should
be kept small area. Keep analog components away from
LX node to prevent stray capacitive noise pick-up.
TJ = TC + PD x θJC
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DS8024-02 March 2011
RT8024
VIN
} Connect feedback network behind the output capacitors.
4
Keep the loop area small. Place the feedback
components near the RT8024.
}
VOUT
L1
RT8024
VIN
LX
3
C1
1
Connect all analog grounds to a command node and
then connect the command node to the power ground
behind the output capacitors.
EN
FB
GND
C3
R1
5
2
C2
R2
C4
10uF
VIN
J1
Figure 6. EVB Schematic
Suggested Inductors
Component
Series
Supplier
Inductance
DCR
Current Rating
Dimensions
(µH)
(mΩ)
(mA)
(mm)
TAIYO YUDEN
NR 3015
2.2
60
1480
3 x 3 x 1.5
TAIYO YUDEN
NR 3015
4.7
120
1020
3 x 3 x 1.5
Sumida
CDRH2D14
2.2
75
1500
4.5 x 3.2 x 1.55
Sumida
CDRH2D14
4.7
135
1000
4.5 x 3.2 x 1.55
GOTREND
GTSD32
2.2
58
1500
3.85 x 3.85 x 1.8
GOTREND
GTSD32
4.7
146
1100
3.85 x 3.85 x 1.8
Suggested Capacitors for CIN and COUT
Component Supplier
Part No.
Capacitance (µF)
Case Size
TDK
C1608JB0J475M
4.7
0603
TDK
C2012JB0J106M
10
0805
MURATA
GRM188R60J475KE19
4.7
0603
MURATA
GRM219R60J106ME19
10
0805
MURATA
GRM219R60J106KE19
10
0805
TAIYO YUDEN
JMK107BJ475RA
4.7
0603
TAIYO YUDEN
JMK107BJ106MA
10
0603
TAIYO YUDEN
JMK212BJ106RD
10
0805
DS8024-02 March 2011
www.richtek.com
11
RT8024
Outline Dimension
H
D
L
B
C
b
A
A1
e
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
A
0.889
1.295
0.035
0.051
A1
0.000
0.152
0.000
0.006
B
1.397
1.803
0.055
0.071
b
0.356
0.559
0.014
0.022
C
2.591
2.997
0.102
0.118
D
2.692
3.099
0.106
0.122
e
0.838
1.041
0.033
0.041
H
0.080
0.254
0.003
0.010
L
0.300
0.610
0.012
0.024
SOT-23-5 Surface Mount Package
www.richtek.com
12
DS8024-02 March 2011
RT8024
H
D
L
B
C
b
A
A1
e
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
A
0.700
1.000
0.028
0.039
A1
0.000
0.100
0.000
0.004
B
1.397
1.803
0.055
0.071
b
0.300
0.559
0.012
0.022
C
2.591
3.000
0.102
0.118
D
2.692
3.099
0.106
0.122
e
0.838
1.041
0.033
0.041
H
0.080
0.254
0.003
0.010
L
0.300
0.610
0.012
0.024
TSOT-23-5 Surface Mount Package
Richtek Technology Corporation
Richtek Technology Corporation
Headquarter
Taipei Office (Marketing)
5F, No. 20, Taiyuen Street, Chupei City
5F, No. 95, Minchiuan Road, Hsintien City
Hsinchu, Taiwan, R.O.C.
Taipei County, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Tel: (8862)86672399 Fax: (8862)86672377
Email: [email protected]
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit
design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be
guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.
DS8024-02 March 2011
www.richtek.com
13