RICHTEK RT8260A

RT8260A
1.8A, 24V, 1.4MHz Step-Down Converter
General Description
Features
The RT8260A is a high voltage buck converter that can
support the input voltage range from 4.5V to 24V and the
output current can be up to 1.8A. Current Mode operation
provides fast transient response and eases loop
stabilization.
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Wide Operating Input Voltage Range : 4.5V to 24V
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Adjustable Output Voltage Range : 0.8V to 15V
1.8A Output Current
0.3Ω
Ω Internal Power MOSFET Switch
High Efficiency up to 92%
1.4MHz Fixed Switching Frequency
Stable with Low ESR Output Ceramic Capacitors
Thermal Shutdown
Cycle-By-Cycle Over Current Protection
RoHS Compliant and Halogen Free
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The chip also provides protection functions such as cycleby-cycle current limiting and thermal shutdown protection.
The RT8260A is available in a WDFN-8L 2x2 package.
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Ordering Information
RT8260A
Applications
Package Type
QW : WDFN-8L 2x2 (W-Type)
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Lead Plating System
G : Green (Halogen Free and Pb Free)
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Note :
Richtek products are :
Pin Configurations
RoHS compliant and compatible with the current require-
(TOP VIEW)
ments of IPC/JEDEC J-STD-020.
`
Suitable for use in SnPb or Pb-free soldering processes.
NC
SW
VIN
EN
Marking Information
1
2
3
4
GND
`
Distributed Power Systems
Battery Charger
Pre-Regulator for Linear Regulators
WLED Drivers
9
8
7
6
5
NC
BOOT
GND
FB
JG : Product Code
JGW
WDFN-8L 2x2
W : Date Code
Typical Application Circuit
VIN
4.5V to 24V
CIN
10µF
Chip Enable
Open =
Automatic Startup
DS8260A-03 March 2011
3 VIN
BOOT
RT8260A
SW 2
4 EN
VOUT
3.3V
7
CBOOT L1
10nF 4.7µH
D1
B230A
FB 5
GND
6, 9 (Exposed Pad)
R1
62k
COUT
22µF
R2
19.6k
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1
RT8260A
Table 1. Recommended Component Selection
VOUT (V)
1.2
1.8
2.5
3.3
5
8
10
15
L1 (μH)
2
2
3.6
4.7
6.8
10
10
15
R2 (kΩ)
124
49.9
29.4
19.6
13
8.2
6.49
4.2
R1 (kΩ)
62
62
62
62
68
75
75
75
COUT (μF)
22
22
22
22
22
22
22
22
Functional Pin Description
Pin No.
Pin Name
Pin Function
1, 8
NC
No Internal Connection.
2
SW
Switch Output.
3
VIN
4
EN
5
FB
Supply Voltage. Bypass VIN to GND with a suitable large capacitor to prevent large
voltage spikes from appearing at the input.
Chip Enable (Active High). If the EN pin is open, it will be pulled to high by internal
circuit.
Feedback. An external resistor divider from the output to GND tapped to the FB pin
sets the output voltage. The value of the divider resistors also set loop bandwidth.
Ground. The exposed pad must be soldered to a large PCB and connected to GND
for maximum power dissipation.
6,
GND
9 (Exposed Pad)
7
BOOT
Bootstrap. A capacitor is connected between SW and BOOT pins to form a floating
supply across the power switch driver. This capacitor is needed to drive the power
switch‘s gate above the supply voltage.
Function Block Diagram
VIN
-
X20
1µA
Current Sense Amp
EN
3V
FB
1.1V
25mΩ
Ω
Ramp
Generator
Regulator
10k
+
BOOT
-
Oscillator
1.4MHz
+
Shutdown Reference
Comparator
S
Q
+
EA
-
400k
30pF
+
-
Driver
R
SW
PWM
Comparator
Bootstrap
Control
OC Limit Clamp
GND
1pF
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DS8260A-03 March 2011
RT8260A
Absolute Maximum Ratings
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(Note 1)
Supply Voltage, VIN ----------------------------------------------------------------------------------------- 26V
SW Voltage --------------------------------------------------------------------------------------------------- −0.3V to (VIN + 0.3V)
BOOT Voltage ------------------------------------------------------------------------------------------------ (VSW − 0.3V) to (VSW + 6V)
All Other Pins ------------------------------------------------------------------------------------------------- 0.3V to 6V
Power Dissipation, PD @ TA = 25°C
WDFN-8L 2x2 ------------------------------------------------------------------------------------------------- 0.833W
Package Thermal Resistance (Note 2)
WDFN-8L 2x2, θJA ------------------------------------------------------------------------------------------- 120°C/W
WDFN-8L 2x2, θJC ------------------------------------------------------------------------------------------- 8.2°C/W
Junction Temperature --------------------------------------------------------------------------------------- 150°C
Lead Temperature (Soldering, 10 sec.) ----------------------------------------------------------------- 260°C
Storage Temperature Range ------------------------------------------------------------------------------- −65°C to 150°C
ESD Susceptibility (Note 3)
HBM (Human Body Mode) --------------------------------------------------------------------------------- 2kV
MM (Machine Mode) ---------------------------------------------------------------------------------------- 200V
Recommended Operating Conditions
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(Note 4)
Supply Voltage, VIN ----------------------------------------------------------------------------------------- 4.5V to 24V
Output Voltage, VOUT --------------------------------------------------------------------------------------- 0.8V to 15V
EN Voltage, VEN ---------------------------------------------------------------------------------------------- 0V to 5.5V
Junction Temperature Range ------------------------------------------------------------------------------ −40°C to 125°C
Ambient Temperature Range ------------------------------------------------------------------------------ −40°C to 85°C
Electrical Characteristics
(VIN = 12V, TA = 25° C unless otherwise specified)
Parameter
Symbol
VFB
4.5V ≤ VIN ≤ 24V
I FB
VFB = 0.8V
RDS(ON)
VEN = 0V, VSW = 0V
I LIM
VBOOT − VSW = 4.8V
f SW
Feedback Reference Voltage
Feedback Current
Switch On Resistance
Switch Leakage
Current Limit
Oscillator Frequency
Maximum Duty Cycle
Minimum On-Time
Under Voltage Lockout
Threshold
Under Voltage Lockout
Threshold Hysteresis
EN Input Low Voltage
EN Input High Voltage
EN Pull Up Current
Shutdown Current
Quiescent Current
I SHDN
IQ
Thermal Shutdown
T SD
DS8260A-03 March 2011
Test Conditions
t ON
Rising
VEN = 0V
VEN = 0V
VEN = 2V, VFB = 1V (Not Switching)
Min
Typ
Max
Unit
0.79
---2.2
1.2
---
0.8
0.1
0.3
-2.9
1.4
75
100
0.81
0.3
-10
-1.6
---
V
μA
Ω
μA
A
MHz
%
ns
3.9
4.2
4.5
V
--
200
--
mV
-1.4
----
--1
25
0.55
0.4
---1
V
V
μA
μA
mA
--
150
--
°C
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RT8260A
Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. θJA is measured in natural convection at TA = 25°C on a high effective thermal conductivity four-layer test board of
JEDEC 51-7 thermal measurement standard. The measurement case position of θJC is on the exposed pad of the
package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
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DS8260A-03 March 2011
RT8260A
Typical Operating Characteristics
Efficiency vs. Load Current
100
Efficiency vs. Load Current
100
VIN = 12V
90
80
VIN = 24V
80
70
Efficiency (%)
Efficiency (%)
VIN = 12V
90
60
50
40
30
20
VIN = 24V
70
60
50
40
30
20
10
10
VOUT = 5V
0
VOUT = 3.3V
0
0
0.3
0.6
0.9
1.2
1.5
1.8
0
0.3
0.6
Load Current (A)
Output Voltage vs. Load Current
1.2
0.815
3.331
0.810
3.326
3.321
3.316
3.311
1.8
0.805
0.800
0.795
0.790
VIN = 12V
3.306
VIN = 12V, IOUT = 0A
0.785
0
0.3
0.6
0.9
1.2
1.5
1.8
-50
-25
0
Load Current (A)
25
50
75
100
125
Temperature (°C)
Current Limit vs. Temperature
Current Limit vs. Duty Cycle
3.8
3.8
3.5
3.5
Current Limit (A)
Peak Current (A)
1.5
Reference Voltage vs. Temperature
3.336
Reference Voltage (V)
Output Voltage (V)
0.9
Load Current (A)
3.2
2.9
2.6
3.2
2.9
2.6
2.3
2.3
2.0
2.0
VIN = 12V, VOUT = 3.3V
0
16
32
48
Duty Cycle (%)
DS8260A-03 March 2011
64
80
-50
-25
0
25
50
75
100
125
Temperature (°C)
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RT8260A
Quiescent Current vs. Temperature
0.8
1.45
0.7
Quiescent Current (mA)
Switching Frequency (MHz)1
Switching Frequency vs. Temperature
1.50
1.40
1.35
1.30
1.25
0.6
0.5
0.4
0.3
VIN = 12V, IOUT = 0.3A
VIN = 12V, VEN = 2V, VFB = 1V
0.2
1.20
-50
-25
0
25
50
75
100
-50
125
25
50
75
100
Temperature (°C)
Load Transient Response
Load Transient Response
VOUT
(100mV/Div)
IOUT
(1A/Div)
IOUT
(1A/Div)
125
VIN = 12V, VOUT = 3.3V, IOUT = 0.9A to 1.8A
VIN = 12V, VOUT = 3.3V, IOUT = 0A to 1.8A
Time (100μs/Div)
Time (100μs/Div)
Output Ripple
Output Ripple
VOUT
(10mV/Div)
VOUT
(10mV/Div)
VSW
(10V/Div)
VSW
(5V/Div)
VIN = 12V, VOUT = 3.3V, IOUT = 1.8A
Time (250ns/Div)
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0
Temperature (°C)
VOUT
(100mV/Div)
IL1
(1A/Div)
-25
IL1
(1A/Div)
VIN = 24V, VOUT = 3.3V, IOUT = 1.8A
Time (250ns/Div)
DS8260A-03 March 2011
RT8260A
Power Off from EN
Power On from EN
VEN
(2V/Div)
VEN
(2V/Div)
VOUT
(2V/Div)
VOUT
(2V/Div)
IL1
(2A/Div)
IL1
(2A/Div)
VIN = 12V, VOUT = 3.3V, IOUT = 1.8A
Time (250μs/Div)
DS8260A-03 March 2011
VIN = 12V, VOUT = 3.3V, IOUT = 1.8A
Time (50μs/Div)
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RT8260A
Application Information
The RT8260A is a high voltage buck converter that can
support the input voltage range from 4.5V to 24V and the
output current can be up to 1.8A.
Output Voltage Setting
The resistive voltage divider allows the FB pin to sense a
fraction of the output voltage as shown in Figure 1.
VOUT
R1
FB
RT8260A
R2
GND
Figure 1. Output Voltage Setting
For adjustable voltage mode, the output voltage is set by
an external resistive voltage divider according to the
following equation :
VOUT = VFB ⎛⎜ 1 + R1 ⎞⎟
⎝ R2 ⎠
where VFB is the feedback reference voltage (0.8V typ.).
External Bootstrap Diode
Connect a 10nF low ESR ceramic capacitor between the
BOOT pin and SW pin. This capacitor provides the gate
driver voltage for the high side MOSFET.
It is recommended to add an external bootstrap diode
between an external 5V and the BOOT pin for efficiency
improvement when input voltage is lower than 5.5V or duty
ratio is higher than 65%. The bootstrap diode can be a low
cost one such as 1N4148 or BAT54.
The external 5V can be a 5V fixed input from system or a
5V output of the RT8260A. Note that the external boot
voltage must be lower than 5.5V.
5V
BOOT
RT8260A
10nF
SW
Figure 2. External Bootstrap Diode
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Inductor Selection
The inductor value and operating frequency determine the
ripple current according to a specific input and output
voltage. The ripple current ΔIL increases with higher VIN
and decreases with higher inductance.
V
V
ΔIL = ⎡⎢ OUT ⎤⎥ × ⎡⎢1− OUT ⎤⎥
VIN ⎦
⎣ f ×L ⎦ ⎣
Having a lower ripple current reduces not only the ESR
losses in the output capacitors but also the output voltage
ripple. High frequency with small ripple current can achieve
highest efficiency operation. However, it requires a large
inductor to achieve this goal.
For the ripple current selection, the value of ΔIL = 0.24
(IMAX = 1.8) will be a reasonable starting point. The largest
ripple current occurs at the highest VIN. To guarantee that
the ripple current stays below the specified maximum,
the inductor value should be chosen according to the
following equation :
⎡ VOUT ⎤ ⎡
VOUT ⎤
L =⎢
⎥ × ⎢1−
⎥
⎣ f × ΔIL(MAX) ⎦ ⎣ VIN(MAX) ⎦
The inductor's current rating (defined by that which causes
a temperature rise from 25°C ambient to 40°C) should be
greater than the maximum load current and its saturation
current should be greater than the short circuit peak current
limit. Refer to Table 2 for the suggested inductor selection.
Table 2. Suggested Inductors for Typical
Application Circuit
Component
Series
Dimensions (mm)
Supplier
TDK
VLC6045
6 x 6 x 4.5
TDK
TAIYO YUDEN
SLF12565
NR8040
12.5 x 12.5 x 6.5
8x8x4
Diode Selection
When the power switch turns off, the path for the current
is through the diode connected between the switch output
and ground. This forward biased diode must have a
minimum voltage drop and recovery times. Schottky diode
is recommended and it should be able to handle those
current. The reverse voltage rating of the diode should be
greater than the maximum input voltage, and current rating
should be greater than the maximum load current. For
more detail, please refer to Table 3.
DS8260A-03 March 2011
RT8260A
Table 3. Suggested Diode
VRRM
Component
IOUT
Series
Package
Supplier
(V)
(A)
DIODES
B220A
20
2
SMA
DIODES
B230A
30
2
SMA
PANJIT
SK22
20
2
DO-214AA
PANJIT
SK23
30
2
DO-214AA
CIN and COUT Selection
The input capacitance, CIN, is needed to filter the trapezoidal
current at the source of the top MOSFET. To prevent large
ripple current, a low ESR input capacitor sized for the
maximum RMS current should be used. The RMS current
is given by :
V
VIN
IRMS = IOUT(MAX) OUT
−1
VIN
VOUT
This formula has a maximum at VIN = 2VOUT, where
IRMS = IOUT/2. This simple worst-case condition is commonly
used for design because even significant deviations do not
offer much relief.
Choose a capacitor rated at a higher temperature than
required. Several capacitors may also be paralleled to meet
size or height requirements in the design.
The selection of COUT is determined by the required Effective
Series Resistance (ESR) to minimize voltage ripple.
Moreover, the amount of bulk capacitance is also a key for
COUT selection to ensure that the control loop is stable.
Loop stability can be checked by viewing the load transient
response as described in a later section.
The output ripple, ΔVOUT , is determined by :
Aluminum electrolytic capacitors have significantly higher
ESR. However, it can be used in cost-sensitive applications
for ripple current rating and long term reliability
considerations. Ceramic capacitors have excellent low ESR
characteristics but can have a high voltage coefficient and
audible piezoelectric effects. The high Q of ceramic
capacitors with trace inductance can also lead to significant
ringing.
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at input and
output. When a ceramic capacitor is used at the input and
the power is supplied by a wall adapter through long wires,
a load step at the output can induce ringing at the input,
VIN. At best, this ringing can couple to the output and be
mistaken as loop instability. At worst, a sudden inrush of
current through the long wires can potentially cause a
voltage spike at VIN large enough to damage the part.
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to ΔILOAD (ESR) also begins to charge or discharge
COUT generating a feedback error signal for the regulator to
return VOUT to its steady-state value. During this recovery
time, VOUT can be monitored for overshoot or ringing that
would indicate a stability problem.
1
⎤
ΔVOUT ≤ ΔIL ⎡⎢ESR +
8fCOUT ⎦⎥
⎣
EMI Consideration
The output ripple will be highest at the maximum input
voltage since ΔIL increases with input voltage. Multiple
capacitors placed in parallel may be needed to meet the
ESR and RMS current handling requirement. Dry tantalum,
special polymer, aluminum electrolytic and ceramic
capacitors are all available in surface mount packages.
Special polymer capacitors offer very low ESR value.
However, it provides lower capacitance density than other
types. Although Tantalum capacitors have the highest
capacitance density, it is important to only use types that
pass the surge test for use in switching power supplies.
Since parasitic inductance and capacitance effects in PCB
circuitry would cause a spike voltage on the SW pin when
the high side MOSFET is turned-on/off, this spike voltage
on SW may impact EMI performance in the system. In
order to enhance EMI performance, there are two methods
to suppress the spike voltage. One is to place an R-C
snubber between SW and GND and place them as close
as possible to the SW pin (see Figure 3). Another method
is to add a resistor in series with the bootstrap capacitor,
CBOOT. But this method will decrease the driving capability
to the high side MOSFET. It is strongly recommended to
DS8260A-03 March 2011
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9
RT8260A
reserve the R-C snubber during PCB layout for EMI improvement. Moreover, reducing the SW trace area and keeping the
main power in a small loop will be helpful for EMI performance. For detailed PCB layout guide, please refer to the section
on Layout Consideration.
VIN
4.5V to 24V
REN*
Chip Enable
CIN
10µF
3 VIN
BOOT
7
RBOOT*
CBOOT L
10nF 4.7µH
RT8260A
4 EN
SW 2
RS*
CEN*
6, 9 (Exposed Pad)
B230A
R1
49.9k
CS*
GND
VOUT
3.3V/1.8A
COUT
22µF
FB 5
R2
16k
* : Optional
Figure 3. Reference Circuit with Snubber and Enable Timing Control
0.90
Maximum Power Dissipation (W)1
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula:
PD(MAX) = (TJ(MAX) − TA) / θJA
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
For recommended operating condition specifications of
the RT8260A, the maximum junction temperature is 125°C
and TA is the ambient temperature. The junction to ambient
thermal resistance, θJA, is layout dependent. For WDFN8L 2x2 packages, the thermal resistance, θJA, is 120°C/
W on a standard JEDEC 51-7 four-layer thermal test board.
The maximum power dissipation at TA = 25°C can be
calculated by the following formula :
PD(MAX) = (125°C − 25°C) / (120°C/W) = 0.833W for
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0.75
0.60
0.45
0.30
0.15
0.00
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 4. Derating Curves for RT8260A Packages
Layout Consideration
Follow the PCB layout guidelines for optimal performance
of RT8260A.
`
Keep the traces of the main current paths as short and
wide as possible.
`
Place the input capacitor as close as possible to the
device pins (VIN and GND).
`
SW node is with high frequency voltage swing and should
be kept in a small area. Keep sensitive components
away from the SW node to prevent stray capacitive noise
pick-up.
`
Place the feedback components as close to the FB pin
as possible.
`
Connect GND to a ground plane for noise reduction and
thermal dissipation.
WDFN-8L 2x2 package
The maximum power dissipation depends on the operating
ambient temperature for fixed T J(MAX) and thermal
resistance, θJA. For the RT8260A package, the derating
curve in Figure 4 allows the designer to see the effect of
rising ambient temperature on the maximum power
dissipation.
Four-Layer PCB
DS8260A-03 March 2011
RT8260A
GND
COUT
L
D
The input capacitor
must be placed as
close to the IC as
possible.
The feedback components
must be connected as close
to the device as possible.
VOUT
RS CS
CIN
VIN
1
2
3
4
9
8
7
6
5
NC
BOOT
GND
FB
R1
R2
VOUT
NC
SW
VIN
EN
GND
SW
GND
SW should be connected to inductor by wide and
short trace. Keep sensitive components away
from this trace.
Figure 5. PCB Layout Guide
Table 4. Suggested Capacitors for CIN and COUT
Location Component Supplier
Part No.
Capacitance (µF) Case Size
CIN
MURATA
GRM31CR61E106K
10
1206
CIN
TDK
C3225X5R1E106K
10
1206
CIN
TAIYO YUDEN
TMK316BJ106ML
10
1206
C OUT
MURATA
GRM31CR61C226M
22
1206
C OUT
TDK
C3225X5R1C226M
22
1206
C OUT
TAIYO YUDEN
EMK316BJ226ML
22
1206
DS8260A-03 March 2011
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RT8260A
Outline Dimension
D2
D
L
E
E2
1
e
SEE DETAIL A
b
2
1
2
1
A
A1
A3
DETAIL A
Pin #1 ID and Tie Bar Mark Options
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
0.700
0.800
0.028
0.031
A1
0.000
0.050
0.000
0.002
A3
0.175
0.250
0.007
0.010
b
0.200
0.300
0.008
0.012
D
1.950
2.050
0.077
0.081
D2
1.000
1.250
0.039
0.049
E
1.950
2.050
0.077
0.081
E2
0.400
0.650
0.016
0.026
e
L
0.500
0.300
0.020
0.400
0.012
0.016
W-Type 8L DFN 2x2 Package
Richtek Technology Corporation
Richtek Technology Corporation
Headquarter
Taipei Office (Marketing)
5F, No. 20, Taiyuen Street, Chupei City
5F, No. 95, Minchiuan Road, Hsintien City
Hsinchu, Taiwan, R.O.C.
Taipei County, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Tel: (8862)86672399 Fax: (8862)86672377
Email: [email protected]
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit design,
specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be guaranteed
by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.
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DS8260A-03 March 2011