RICHTEK RT9828

RT9828
Dual Micro-Power Voltage Detectors
General Description
Features
The RT9828 is a micro-power voltage detector supervising
the power supply voltage level for microprocessors (uP) or
digital systems. It provides internally fixed threshold levels
ranging from 1.2V to 5V, which covers most digital
applications. It features low supply current of 6uA. The
RT9828 performs supervisory function by sending out a
reset signal whenever the VDD voltage falls below a preset
z
threshold level. This reset signal will last the whole period
before VDD recovering. Once the VDD exceeds the threshold
level, the reset signal will be released after a certain delay
time. The RT9828 is available in SOT-23-6 package.
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RT9828 -
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Package Type
E : SOT-23-6
Lead Plating System
P : Pb Free
G : Green (Halogen Free and Pb Free)
Threshold Voltage : RESET1/RESET2
WP : 1.6V/3.0V
GP : 1.8V/3.0V
Low Supply Current 6uA
Quick Reset within 20us
Built-in 55ms Recovery Delay
Low Functional Supply Voltage 0.9V
Dual N-Channel Open-Drain Output
Small SOT-23-6 Packages
RoHS Compliant and 100% Lead (Pb)-Free
Applications
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Ordering Information
High Accuracy ±1.5%
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Computers
Controllers
Intelligent Instruments
Critical uP and uC Power Monitoring
Portable/Battery-Powered Equipment
Pin Configurations
(TOP VIEW)
RESET1 GND VDD2
6
5
4
2
3
Note :
Richtek products are :
`
RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020.
`
VDD1 NC
RESET2
SOT-23-6
Suitable for use in SnPb or Pb-free soldering processes.
Marking Information
For marking information, contact our sales representative
directly or through a Richtek distributor located in your
area.
DS9828-02 April 2011
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1
RT9828
Typical Application Circuit
100k
RT9828
V DD1
1 VDD1
RESET1
GND
V DD2
4 VDD2
RESET2
6
RESET1
5
3
RESET2
100k
Functional Pin Description
Pin No.
Pin Name
Pin Function
1
VDD1
Input of Detector1.
2
NC
No Internal Connection. It should be floating.
3
RESET2
Active Low Open-Drain Reset Pin of Detector2.
4
VDD2
Input of Detector2.
5
GND
Ground.
6
RESET1
Active Low Open-Drain Reset Pin of Detector1.
Function Block Diagram
RESET1
VDD1
VSET1
Timer
CMP
N MOS
GND
Threshold
Voltage Setting
POR
Power On Reset
RESET2
VDD2
VSET2
Timer
CMP
N MOS
Threshold
Voltage Setting
POR
Power On Reset
Available Voltage Version
Code
C
B
F
W
G
D
Y
H
E
J
K
Voltage
1.2
1.3
1.5
1.6
1.8
1.85
1.9
2
2.1
2.5
2.6
Code
T
L
M
N
V
P
Q
R
S
T
--
Voltage
2.65
2.7
2.8
2.85
2.9
3
3.1
3.2
3.3
5
--
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DS9828-02 April 2011
RT9828
Absolute Maximum Ratings
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(Note 1)
Input Voltage (with Respect to GND)
VDD1/VDD2 --------------------------------------------------------------------------------------------------------------- −0.3V to 6V
All Other Inputs -------------------------------------------------------------------------------------------------------- −0.3V to VDD + 0.3V
Input Current, IDD1/IDD2 ----------------------------------------------------------------------------------------------- 20mA
Power Dissipation, PD @ TA = 25°C
SOT-23-6 ---------------------------------------------------------------------------------------------------------------- 0.4W
Package Thermal Resistance (Note 2)
SOT-23-6, θJA ----------------------------------------------------------------------------------------------------------- 250°C/W
Lead Temperature (Soldering, 10sec.) ---------------------------------------------------------------------------- 260°C
Junction Temperature ------------------------------------------------------------------------------------------------- 150°C
Storage Temperature Range ---------------------------------------------------------------------------------------- −65°C to 150°C
ESD Susceptibility (Note 3)
HBM (Human Body Mode) ------------------------------------------------------------------------------------------ 2kV
MM (Machine Mode) -------------------------------------------------------------------------------------------------- 200V
Recommended Operating Conditions
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(Note 4)
Junction Temperature Range ---------------------------------------------------------------------------------------- −40°C to 125°C
Ambient Temperature Range ---------------------------------------------------------------------------------------- −40°C to 85°C
Electrical Characteristics
(VDD = 3V, TA = 25°C, unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
0.9
--
6
V
--
6
16
uA
−1.5
--
+1.5
%
Drop = V TH −125mV
--
20
--
us
VDD ≥ 1.02 × VTH
--
55
--
ms
1.6 = V DD < VTH , ISINK > 3.5mA
--
--
0.4
V
--
0.01VTH
--
V
Input Voltage
VDD1 / VDD2
Supply Current
IVDD1 / IVDD2 VTH = 3V, VDD = 4.5V
Threshold Voltage Accuracy
ΔVTH
V DD Drop to Reset Delay
tRD
Reset Active Time Out Period tRP
RESET Output Voltage Low
VOL
Hysteresis Width
VHYS
Units
Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are
for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. θJA is measured in the natural convection at TA = 25°C on a low effective single layer thermal conductivity test board
of JEDEC 51-3 thermal measurement standard.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
DS9828-02 April 2011
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3
RT9828
Typical Operating Characteristics
Nch Driver Sink Current vs. Input Voltage
VTH = 1.6V, VDS = 0.5V
VTH = 3V, VDS = 0.5V
-30°C
35
30
Nch Driver Sink Current (mA)
Nch Driver Sink Current (mA)
Nch Diver Sink Current vs. Input Voltage
20
40
25°C
25
20
80°C
15
10
5
16
-30°C
25°C
12
8
80°C
4
0
0
0
0.5
1
1.5
2
2.5
3
0
3.5
0.4
0.8
1.2
1.6
2
Input Voltage (V)
Input Voltage (V)
VDD1 Supply Current vs. Input Voltage
VDD2 Supply Current vs. Input Voltage
5
5
VTH = 1.6V
VTH = 3V
80°C
4
25°C
Supply Current (uA)
Supply Current (uA)
4
3
-30°C
2
1
2
-30°C
1
0
0
0
1
2
3
4
5
0
6
1
2
3
4
5
6
Input Voltage (V)
Input Voltage (V)
Output Voltage vs. Input Voltage
Output Voltage vs. Input Voltage
6
6
VTH = 3V
VTH = 1.6V
5
5
Output Voltage (V)
Output Voltage (V)
80°C
25°C
3
4
3
2
1
4
3
2
1
0
0
0
1
2
3
4
Input Voltage (V)
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4
5
6
0
1
2
3
4
5
6
Input Voltage (V)
DS9828-02 April 2011
RT9828
Power-Up Reset Time-Out vs. Temperature
Reset Threshold Deviation vs. Temperature
100
Reset Threshold (V)
VTH = 3V
3.0
2.5
2.0
VTH = 1.6V
Power-Up Reset Time-Out (ms)
3.5
80
VTH = 1.6V
60
VTH = 3V
40
20
0
1.5
-50
-25
0
25
50
75
100
-50
125
-25
0
Power-Down Reset Time-Out vs. Temperature
VDROP = 200mV
VDROP = 150mV
VDROP = 250mV
4
0
-50
-25
0
25
50
75
Temperature (°C)
DS9828-02 April 2011
100
125
Power-Down Reset Time-Out (us)
Power-Down Reset Time-Out (us)
16
8
75
100
125
Power-Down Reset Time-Out vs. Temperature
40
VTH = 1.6V
12
50
Temperature (°C)
Temperature (°C)
20
25
VTH = 3V
35
30
VDROP = 200mV
25
VDROP = 150mV
20
VDROP = 250mV
15
10
-50
-25
0
25
50
75
100
125
Temperature (°C)
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RT9828
Application Information
The RT9828 voltage detector monitors the input voltage fo
generate a reset signal while the input voltage is lower
then the detecting threshold voltage level.
The RESET pin is an open drain output. It is recommended
to connect a pull-up resister between RESET pin and VIN.
Figure 1 shows the timming diagram of VDD and RESET
signals. When VDD is lower than VTH, the RESET goes
low after a short delay time tRD. When VDD is higher than
VTH with a hystersis (VHYS), the RESET will be pulled up
after the delay time tRP. The typical value of the delay time
tRD and tRP are showed in specification.
packages, the thermal resistance θJA is 250°C/W on the
standard JEDEC 51-3 single layer thermal test board. The
maximum power dissipation at TA = 25°C can be calculated
by following formula :
PD(MAX) = (125°C − 25°C) / (250°C/W) = 0.400W for
SOT-23-6 packages
The maximum power dissipation depends on operating
ambient temperature for fixed TJ(MAX) and thermal resistance
θJA. For RT9828 packages, the Figure 2 of derating curves
allows the designer to see the effect of rising ambient
temperature on the maximum power allowed.
VDD
V TH + V HYS
V TH
Minimum operation voltage
RESET
tRP
tRD
Figure 1. Timming Diagram
Maximum Power Dissipation (W)
0.50
Single Layer PCB
0.45
0.40
0.35
SOT-23-6
0.30
0.25
0.20
0.15
0.10
0.05
0.00
0
25
50
75
100
125
Ambient Temperature (°C)
Thermal Considerations
Figure 2. Derating Curves for RT9828 Packages
For continuous operation, do not exceed absolute
maximum operation junction temperature. The maximum
power dissipation depends on the thermal resistance of IC
package, PCB layout, the rate of surroundings airflow and
temperature difference between junction to ambient. The
maximum power dissipation can be calculated by following
formula :
PD(MAX) = ( TJ(MAX) − TA ) / θJA
Where T J(MAX) is the maximum operation junction
temperature 125°C, TA is the ambient temperature and the
θJA is the junction to ambient thermal resistance.
For recommended operating conditions specification of
RT9828, where T J(MAX) is the maximum junction
temperature of the die (125°C) and TA is the maximum
ambient temperature. The junction to ambient thermal
resistance θ JA is layout dependent. For SOT-23-6
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DS9828-02 April 2011
RT9828
Outline Dimension
H
D
L
C
B
b
A
A1
e
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
A
0.889
1.295
0.031
0.051
A1
0.000
0.152
0.000
0.006
B
1.397
1.803
0.055
0.071
b
0.250
0.560
0.010
0.022
C
2.591
2.997
0.102
0.118
D
2.692
3.099
0.106
0.122
e
0.838
1.041
0.033
0.041
H
0.080
0.254
0.003
0.010
L
0.300
0.610
0.012
0.024
SOT-23-6 Surface Mount Package
Richtek Technology Corporation
Richtek Technology Corporation
Headquarter
Taipei Office (Marketing)
5F, No. 20, Taiyuen Street, Chupei City
5F, No. 95, Minchiuan Road, Hsintien City
Hsinchu, Taiwan, R.O.C.
Taipei County, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Tel: (8862)86672399 Fax: (8862)86672377
Email: [email protected]
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit design,
specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be guaranteed
by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.
DS9828-02 April 2011
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