RICHTEK RT6030

RT6030
4-CH LED Current Source Controller
General Description
Features
The RT6030 is a current source controller, capable of driving
up to 4-CH of LEDs . The part can also be used to drive
an external BJT or N-MOSFET for various applications.
With a wide operating voltage range from 3.8V to 13.5V,
the RT6030 has the advantage of being flexible and costeffective. The RT6030 is available in an SOP-16 package.
z
Ordering Information
Applications
RT6030
z
Package Type
S : SOP-16
Lead Plating System
G : Green (Halogen Free and Pb Free)
3.8V to 13.5V Operating Voltage
z 0.8V Voltage Reference with ±2% High Accuracy
z Independent Enable Control for Each Channel
z Quick Transient Response
z Over Temperature Protection
z RoHS Compliant and Halogen Free
z
z
z
LED TV Backlight
Lighting
Intelligent Instruments
Industrial Display Backlight
Pin Configurations
Note :
Richtek products are :
`
ments of IPC/JEDEC J-STD-020.
`
(TOP VIEW)
RoHS compliant and compatible with the current requireSuitable for use in SnPb or Pb-free soldering processes.
Marking Information
RT6030GS : Product Number
RT6030
GSYMDNN
YMDNN : Date Code
DS6030-02 March 2011
DRI1
FB1
GND
EN1
FB3
DRI3
EN3
VCC34
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
VCC12
EN2
DRI2
FB2
EN4
GND
FB4
DRI4
SOP-16
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1
RT6030
Typical Application Circuit
VLED
VCC
RT6030
1 RDRI1
Q1
DRI1
VCC12
2
8
FB1
VCC34
R1
3, 11 GND
RDRI2
DRI2 14
16
C34
C12
FB2
4
Chip Enable 15
7
12
R2
EN1
EN2
EN3
EN4
Q2
13
DRI3
FB3
RDRI3
6
Q3
5
R3
DRI4 9
FB4 10
RDRI4
Q4
R4
Functional Pin Description
Pin No.
Pin Name
Pin Function
st
1
DRI1
1 CH Driver Output.
2
FB1
1 CH Current Sense Voltage Feedback.
3, 11
GND
Ground.
4
EN1
1st CH Chip Enable (Active High).
5
FB3
3 CH Current Sense Voltage Feedback.
6
DRI3
3 CH Driver Output.
7
EN3
3rd CH Chip Enable (Active High).
8
VCC34
CH3 and CH4 Power Supply Input.
9
DRI4
4 CH Driver Output.
10
FB4
4 CH Current Sense Voltage Feedback.
12
EN4
4 CH Chip Enable (Active High).
13
FB2
2
14
DRI2
st
rd
rd
th
th
th
nd
CH Current Sense Voltage Feedback.
nd
CH Driver Output.
nd
CH Chip Enable (Active High).
2
15
EN2
2
16
VCC12
CH1 and CH2 Power Supply Input.
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2
DS6030-02 March 2011
RT6030
Function Block Diagram
VCC12
EN1
VREF
Voltage
0.8V
+
EA
-
DRI1
FB1
EN2
VREF
Voltage
0.8V
+
EA
-
FB2
VCC34
EN3
DRI2
VREF
Voltage
0.8V
+
EA
-
DRI3
FB3
EN4
GND
DS6030-02 March 2011
VREF
Voltage
0.8V
+
EA
-
DRI4
FB4
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3
RT6030
Absolute Maximum Ratings
z
z
z
z
z
z
z
z
(Note 1)
VCC12, VCC34 ------------------------------------------------------------------------------------------------------------ 15V
All Other Inputs ------------------------------------------------------------------------------------------------------------ 7V
Power Dissipation, PD @ TA = 25°C
SOP-16 ---------------------------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2)
SOP-16, θJA ---------------------------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------Junction Temperature ----------------------------------------------------------------------------------------------------Storage Temperature Range -------------------------------------------------------------------------------------------ESD Susceptibility (Note 3)
HBM -------------------------------------------------------------------------------------------------------------------------MM ----------------------------------------------------------------------------------------------------------------------------
Recommended Operating Conditions
z
z
z
z
1.053W
95°C/W
260°C
150°C
−65°C to 150°C
1.5kV
150V
(Note 4)
Supply Input Voltage, VCC12 , VCC34 ----------------------------------------------------------------------------------- 3.8V to 13.5V
Chip Enable Voltage, EN1, EN2, EN3, EN4 ------------------------------------------------------------------------ 0V to 5.5V
Junction Temperature Range -------------------------------------------------------------------------------------------- −40°C to 125°C
Ambient Temperature Range -------------------------------------------------------------------------------------------- −40°C to 85°C
Electrical Characteristics
(VCC12 = 5V/12V, VCC34 = 5V/12V, TA = 25°C, unless otherwise specified)
Parameter
Under Voltage Lockout
Threshold
Under Voltage Lockout
Hysteresis
Symbol
Test Conditions
Min
Typ
Max
Unit
VUVLO
VCC12 and VCC34 Rising
3.15
3.4
3.65
V
ΔVUVLO
VCC12 and VCC34 Falling
0.1
0.2
0.3
V
VCC12 and VCC34 = 12V
--
0.6
1.6
mA
VCC12 and VCC34 Supply Current
Driver Source Current
ISR
VCC12 and VCC34 = 12V
VDRI1 to VDRI4 = 6V
5
--
--
mA
Driver Sink Current
ISK
VCC12 and VCC34 = 12V
VDRI1 to VDRI4 = 6V
5
--
--
mA
VCC12 and VCC34 = 12V
VDRI1 to VDRI4 = 5V
0.784
0.8
0.816
V
VCC12 and VCC34 = 4.5V to 13.5V
--
3
6
mV
VCC12 and VCC34 = 12V, No Load
--
70
--
dB
Reference Voltage
(VFB1 to VFB4)
Reference Line Regulation (VFB1
to VFB4)
Amplifier Voltage Gain
Chip Enable
EN Rising Threshold
VEN
VCC12 and VCC34 = 12V
--
0.7
--
V
EN Hysteresis
ΔVEN
VCC12 and VCC34 = 12V
VCC12 and VCC34 = 12V
VEN1 to VEN4 = 0V
--
30
--
mV
--
--
10
μA
Standby Current
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DS6030-02 March 2011
RT6030
Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. θJA is measured in natural convection at TA = 25°C on a low-effective thermal conductivity test board of JEDEC 51-3
thermal measurement standard.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
DS6030-02 March 2011
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5
RT6030
Typical Operating Characteristics
Supply Current vs. VCC12/VCC34 Input Voltage
1.0
1.0
0.9
0.9
0.8
0.8
Supply Current (mA)
Standby Current (µA)1
Standby Current vs. VCC12/VCC34 Input Voltage
0.7
0.6
0.5
0.4
0.3
ICC12
ICC34
0.2
0.1
3.5
5
6.5
8
9.5
11
ICC12
ICC34
0.6
0.5
0.4
0.3
0.2
0.1
VEN1 to VEN4 = 0V
0.0
0.7
12.5
VEN1 to VEN4 = 3V
0.0
14
3.5
5
6.5
8
9.5
11
12.5
14
VCC12/VCC34 Input Voltage (V)
VCC12/VCC34 Input Voltage (V)
Supply Current vs. Temperature
EN Threshold Voltage vs. VCC12 Input Voltage
1.0
1.0
EN Threshold Voltage (V)
Supply Current (mA)
0.9
0.8
0.7
ICC12
ICC34
0.6
0.5
0.4
0.3
0.2
0.1
0.9
0.8
0.7
0.6
0.5
VEN1 to VEN4 = 3V
0.0
0.4
-50
-25
0
25
50
75
100
125
3.5
5
EN Threshold Voltage vs. Temperature
8
9.5
11
12.5
14
Feedback Reference Voltage vs. VCC12 Input Voltage
Feedback Reference Voltage (V)
1.0
EN Threshold Voltage (V)
6.5
VCC12 Input Voltage (V)
Temperature (°C)
0.9
0.8
0.7
0.6
0.5
VCC12 = 12V
0.4
0.820
0.815
0.810
0.805
0.800
0.795
0.790
0.785
VEN1 = 3V
0.780
-50
-25
0
25
50
Temperature (°C)
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6
75
100
125
3.5
5
6.5
8
9.5
11
12.5
14
VCC12 Input Voltage (V)
DS6030-02 March 2011
RT6030
DRI Source Current vs. DRI1 Voltage
Feedback Reference Voltage vs. Temperature
55
53
DRI Source Current (mA)
Feedback Reference Voltage (V)
0.82
0.81
0.80
0.79
0.78
0.77
51
49
47
45
43
41
39
37
VCC12 = 12V
0.76
VCC12 = 12V, VFB1 = 0.6V, VEN1 = 3V
35
-50
-25
0
25
50
75
100
125
0
1
2
Temperature (°C)
4
5
6
7
DRI1 Voltage (V)
DRI Source Current vs. Temperature
DRI Sink Current vs. DRI1 Voltage
70
25
60
DRI Sink Current (mA)
DRI Source Current (mA)
3
50
40
30
20
20
15
10
5
10
VCC12 = 12V, VFB1 = 0.6V, VDRI1 = 6V
VCC12 = 12V, VFB1 = 1V, VEN1 = 3V
0
0
-50
-25
0
25
50
75
100
0
125
1
2
3
4
5
6
7
DRI1 Voltage (V)
Temperature (°C)
LED Current vs. PWM Duty
PWM Dimming From EN
180
LED Current (mA)
160
VEN
(5V/Div)
140
120
100
VFB1
(500mV/Div)
ILED1
ILED2
ILED3
ILED4
80
60
VLED
(2V/Div)
I LED
(100mA/Div)
40
VCC1 = VCC2 = 12V, RSET = 5.1Ω,
LED = 8ea, EN = 0 to 5V/250Hz
20
0
0
20
40
60
PWM Duty (%)
DS6030-02 March 2011
80
100
VCC12 = 12V, R1 = 5.1Ω, LED = 3V
Time (5ms/Div)
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7
RT6030
Applications Information
The RT6030 is a 4-CH LED current source controller. This
device can also drive an external BJT or N-MOSFET for
various applications. Refer to topology in Typical
Application Circuit for more details.
Capacitors Selection
Careful selection of the external capacitors for the RT6030
is highly recommended in order to maintain high stability
and performance. An input capacitor with minimum 1μF
must be connected between VCC and ground. The
capacitor improves the supply voltage stability for proper
operation.
Chip Enable Operation
Pull the EN pin low to drive the device into shutdown mode.
During shutdown mode, the standby current drops to
10mA(MAX). Drive the EN pin high to turn on the device
again. To control LED brightness, the RT6030 can perform
dimming function by applying a PWM signal to the EN
pin. The average LED current is proportional to the PWM
signal duty cycle. To obtain correct dimming, the
magnitude of the PWM signal should be higher than the
threshold voltage of the EN pin.
MOSFET Selection
The RT6030 is designed to drive external N-MOSFET pass
element. MOSFET selection criteria include threshold
voltage, VGS (VTH), maximum continuous drain current,
ID, on resistance, RDS(ON) ,maximum drain-to-source
voltage, VDS, and package thermal resistance, θJA. The
most critical specification is the MOSFET RDS(ON). RDS(ON)
can be calculated from the following formula :
RDS(ON)
(V − VOUT )
= IN
IO
For example, the MOSFET operates up to 2A when the
input voltage is 1.5V and set the output voltage as 1.2V.
Then, R DS(ON) = (1.5V − 1.2V) / 2A = 150mΩ. The
MOSFET's RDS(ON) must be lower than 150mΩ. Philip
PHD3055E MOSFET with an RDS(ON) of 120mΩ (typ.) is
a suitable solution.
The power dissipation is calculated as :
PD = (VIN − VOUT ) x ILOAD
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The thermal resistance from junction to ambient is :
(T − TA )
θJA = J
PD
In this example, PD = (1.5V−1.2V) x 2A = 0.6W. The
PHD3055E's θJA is 75°C/W for its D-PAK package, which
translates to a 45°C temperature rise above ambient. The
package provides exposed backsides that directly transfer
heat to the PCB board.
LED Current Setting
The RT6030 maintains an internal reference voltage of 0.8V.
As shown in Typical Application Circuit, the LED current
can be set accordingly via the Rx (x = 1, 2, 3, 4) resistor.
0.8
ILEDx =
(A)
Rx
NPN Transistor Selection
The RT6030 drives the external NPN transistor via the DRIx
pin (source Base current IB). NPN transistor selection
criteria include DC current gain, hFE, threshold voltage,
VBE, collector emitter voltage, VCE, maximum continuous
collector current, IC, and package thermal resistance, θJA.
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
PD(MAX) = (TJ(MAX) − TA) / θJA
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
For recommended operating condition specifications of
the RT6030, the maximum junction temperature is 125°C
and TA is the ambient temperature. The junction to ambient
thermal resistance, θ JA , is layout dependent. For
SOP-16 packages, the thermal resistance, θ JA , is
95°C/W on a standard JEDEC 51-3 single-layer thermal
test board. The maximum power dissipation at TA = 25°C
can be calculated by the following formula :
DS6030-02 March 2011
RT6030
PD(MAX) = (125°C − 25°C) / (95°C/W) = 1.053W for
SOP-16 package
Layout Considerations
There are three critical layout considerations.
Maximum Power Dissipation (W)1
The maximum power dissipation depends on the operating
ambient temperature for fixed T J(MAX) and thermal
resistance, θJA. For the RT6030 package, the derating
curve in Figure 1 allows the designer to see the effect of
rising ambient temperature on the maximum power
dissipation.
1.10
Single-Layer PCB
1.00
0.90
0.80
0.70
0.60
`
First the current setting resistor should be placed as
close as possible to the RT6030 to prevent any noise
coupling.
`
Second of all CIN and COUT should be placed near the
RT6030 for good performance.
`
Last of all, proper copper area for the pass element
should be acknowledged. Pass elements operating
under high power situations can result in abnormally
junction temperature. In addition to the package thermal
resistance limit, the copper area should be increased
accordingly to improve the power dissipation.
0.50
0.40
0.30
0.20
0.10
0.00
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 1. Derating Curve for RT6030 Package
VLED
VLED
FBx node copper area
should be minimized
and kept far away
from noise sources.
VLED
CIN should be placed near the
IC for improve performance.
VCC
C12
RDRI1
DRI1
FB1
GND
R1
EN1
R2
FB3
DRI3
RDRI2
EN3
VCC34
VCC
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
VCC12
EN2
DRI2
FB2
EN4
GND
FB4
DRI4
C34
GND
GND
RDRI3
VLED
R3
R4
RDRI4
The GND plane should be
connected to a strong ground
plane for heat sinking and
noise protection.
Figure 2. PCB Layout Guide
DS6030-02 March 2011
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9
RT6030
Outline Dimension
H
A
M
B
J
F
C
I
D
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
A
9.804
10.008
0.386
0.394
B
3.810
3.988
0.150
0.157
C
1.346
1.753
0.053
0.069
D
0.330
0.508
0.013
0.020
F
1.194
1.346
0.047
0.053
H
0.178
0.254
0.007
0.010
I
0.102
0.254
0.004
0.010
J
5.791
6.198
0.228
0.244
M
0.406
1.270
0.016
0.050
16–Lead SOP Plastic Package
Richtek Technology Corporation
Richtek Technology Corporation
Headquarter
Taipei Office (Marketing)
5F, No. 20, Taiyuen Street, Chupei City
5F, No. 95, Minchiuan Road, Hsintien City
Hsinchu, Taiwan, R.O.C.
Taipei County, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Tel: (8862)86672399 Fax: (8862)86672377
Email: [email protected]
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit
design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be
guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.
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10
DS6030-02 March 2011