IRF9530NS/L
HEXFET® Power MOSFET
Advanced Process Technology
Surface Mount (IRF9530NS)
l Low-profile through-hole (IRF9530NL)
l 175°C Operating Temperature
l Fast Switching
l P-Channel
l Fully Avalanche Rated
Description
l
D
l
VDSS = -100V
RDS(on) = 0.20Ω
G
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power MOSFETs
are well known for, provides the designer with an extremely
efficient and reliable device for use in a wide variety of
applications.
The D2Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible onresistance in any existing surface mount package. The
D2Pak is suitable for high current applications because of
its low internal connection resistance and can dissipate
up to 2.0W in a typical surface mount application.
The through-hole version (IRF9530NL) is available for lowprofile applications.
ID = -14A
S
D 2 P ak
T O -26 2
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TA = 25°C
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Continuous Drain Current, VGS @ -10V
Continuous Drain Current, VGS @ -10V
Pulsed Drain Current
Power Dissipation
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Max.
Units
-14
-10
-56
3.8
79
0.53
± 20
250
-8.4
7.9
-5.0
-55 to + 175
A
W
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (1.6mm from case )
Thermal Resistance
Parameter
RθJC
RθJA
1 / 10
Junction-to-Case
Junction-to-Ambient ( PCB Mounted,steady-state)**
Typ.
Max.
Units
–––
–––
1.9
40
°C/W
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IRF9530NS/L
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
Gate Threshold Voltage
gfs
Forward Transconductance
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min.
-100
–––
–––
-2.0
3.2
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
-0.11
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
15
58
45
46
LS
Internal Source Inductance
–––
7.5
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
–––
–––
–––
760
260
170
V(BR)DSS
IDSS
IGSS
Drain-to-Source Leakage Current
Max. Units
Conditions
–––
V
VGS = 0V, ID = -250µA
––– V/°C Reference to 25°C, ID = -1mA
0.20
Ω
VGS = -10V, ID = -8.4A
-4.0
V
VDS = VGS, ID = -250µA
–––
S
VDS = -50V, ID = -8.4A
-25
VDS = -100V, VGS = 0V
µA
-250
VDS = -80V, VGS = 0V, TJ = 150°C
100
VGS = 20V
nA
-100
VGS = -20V
58
ID = -8.4A
8.3
nC
VDS = -80V
32
VGS = -10V, See Fig. 6 and 13
–––
VDD = -50V
–––
ID = -8.4A
ns
–––
RG = 9.1Ω
–––
RD = 6.2Ω, See Fig. 10
Between lead,
nH
–––
and center of die contact
–––
VGS = 0V
–––
pF
VDS = -25V
–––
ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
IS
I SM
V SD
t rr
Q rr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– ––– -14
showing the
A
G
integral reverse
––– ––– -56
p-n junction diode.
S
––– ––– -1.6
V
TJ = 25°C, IS = -8.4A, VGS = 0V
––– 130 190
ns
TJ = 25°C, IF = -8.4A
––– 650 970
nC
di/dt = -100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
Pulse width ≤ 300µs; duty cycle ≤ 2%.
max. junction temperature. ( See fig. 11 )
Starting TJ = 25°C, L =7.0mH
Uses IRF9530N data and test conditions
RG = 25Ω, IAS = -8.4A. (See Figure 12)
ISD ≤ -8.4A, di/dt ≤ -490A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
2 / 10
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IRF9530NS/L
100
100
VGS
- 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
BOTTOM - 4.5V
VGS
- 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
BOTTOM - 4.5V
TOP
-ID , Drain-to-Source Current (A )
-ID , D rain-to-S ource C urrent (A )
TOP
10
-4 .5V
1
20 µ s P U L S E W ID TH
TJc == 25°C
25 °C
A
0.1
0.1
1
10
10
-4.5V
1
2 0µ s P U LS E W ID TH
TTCJ == 175°C
1 75 °C
0.1
100
0.1
-VD S , D rain-to-S ource V oltage (V )
T J = 2 5 °C
10
TJ = 1 7 5 °C
1
V DS = -5 0 V
2 0µ s P U L S E W ID TH
6
7
8
9
-VG S , Ga te -to-Source Volta ge (V)
Fig 3. Typical Transfer Characteristics
3 / 10
10
A
R DS(on) , Drain-to-Source On Resistance
(Normalized)
-I D , D rain-to -So urc e C urre nt (A )
2.5
5
A
100
Fig 2. Typical Output Characteristics
100
4
10
-VD S , D rain-to-S ource V oltage (V )
Fig 1. Typical Output Characteristics
0.1
1
ID = -14A
2.0
1.5
1.0
0.5
0.0
-60 -40 -20
VGS = -10V
0
20 40 60 80 100 120 140 160 180
TJ , Junction Temperature ( °C)
Fig 4. Normalized On-Resistance
Vs. Temperature
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IRF9530NS/L
V GS
C iss
C rs s
C o ss
C , Capacitance (pF)
1600
1200
=
=
=
=
20
0V ,
f = 1MHz
C g s + C g d , C d s S H O R TE D
C gd
C ds + C g d
-VGS , Gate-to-Source Voltage (V)
2000
C iss
800
C oss
C rss
400
0
A
1
10
ID = -8.4A
15
10
5
FOR TEST CIRCUIT
SEE FIGURE 13
0
0
100
20
30
40
50
60
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
100
1000
OPERATION IN THIS AREA LIMITED
BY RDS(on)
T J = 15 0°C
-II D , Drain Current (A)
-I SD , Reverse D rain Current (A )
10
QG , Total Gate Charge (nC)
-VD S , D rain-to-S ourc e V oltage (V )
10
100
T J = 2 5°C
1
10us
100us
10
1ms
VG S = 0 V
0.1
0.4
0.6
0.8
1.0
1.2
1.4
-VS D , S ourc e-to-D rain V oltage (V )
Fig 7. Typical Source-Drain Diode
Forward Voltage
4 / 10
VDS = -80V
VDS = -50V
VDS = -20V
A
1.6
TC = 25 °C
TJ = 175 ° C
Single Pulse
1
1
10ms
10
100
1000
-VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRF9530NS/L
14
RD
VDS
-I D , Drain Current (A)
12
VGS
D.U.T.
RG
10
+
8
V DD
-10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
6
Fig 10a. Switching Time Test Circuit
4
td(on)
2
tr
t d(off)
tf
VGS
10%
0
25
50
75
100
125
150
175
TC , Case Temperature ( ° C)
90%
Fig 9. Maximum Drain Current Vs.
Case Temperature
VDS
Fig 10b. Switching Time Waveforms
T herm al R es pons e (Z th J C )
10
1
D = 0 .5 0
0 .2 0
0 .1 0
PD M
0 .0 5
0.1
0 .0 2
0 .0 1
t
1
t
S IN G L E P U L S E
(T H E R M A L R E S P O N S E )
0.01
0.00001
N o te s:
1 . D u ty fa c to r D = t
1
/ t
2
2
2. P e a k TJ = P D M x Z th JC + T C
0.0001
0.001
0.01
0.1
A
1
t 1 , R e c ta n g ula r P u lse D u ratio n (s e c )
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
5 / 10
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IRF9530NS/L
700
ID
-3.4A
-5.9A
BOTTOM -8.4A
D .U .T
RG
-2 0 V
tp
VD D
A
IA S
D R IV E R
0 .0 1Ω
15V
Fig 12a. Unclamped Inductive Test Circuit
EAS , Single Pulse Avalanche Energy (mJ)
L
VDS
TOP
600
500
400
300
200
100
0
25
50
75
100
125
150
175
Starting TJ , Junction Temperature ( °C)
IAS
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
tp
V (BR)DSS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
QG
12V
.3µF
-10V
QGS
QGD
D.U.T.
+VDS
VGS
VG
-3mA
Charge
Fig 13a. Basic Gate Charge Waveform
6 / 10
.2µF
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
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IRF9530NS/L
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T*
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
-
-
+
• dv/dt controlled by RG
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
RG
VGS
*
+
-
VDD
Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
D=
Period
P.W.
Period
[VGS=10V ] ***
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
[VDD]
Forward Drop
Inductor Curent
Ripple ≤ 5%
[ ISD ]
*** VGS = 5.0V for Logic Level and 3V Drive Devices
Fig 14. For P-Channel HEXFETS
7 / 10
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IRF9530NS/L
Tape & Reel Information
D2Pak
TR R
1 .6 0 (.0 6 3 )
1 .5 0 (.0 5 9 )
4 .1 0 (.1 6 1 )
3 .9 0 (.1 5 3 )
F E E D D IRE CTIO N 1 .8 5 (.0 7 3 )
1 .6 5 (.0 6 5 )
1 .60 (.06 3)
1 .50 (.05 9)
1 1 .6 0 (.4 5 7 )
1 1 .4 0 (.4 4 9 )
0 .3 68 (.0 1 4 5 )
0 .3 42 (.0 1 3 5 )
1 5 .4 2 (.6 0 9 )
1 5 .2 2 (.6 0 1 )
2 4 .3 0 (.9 5 7 )
2 3 .9 0 (.9 4 1 )
TR L
10 .9 0 (.42 9)
10 .7 0 (.42 1)
1 .75 (.06 9 )
1 .25 (.04 9 )
4 .7 2 (.1 3 6)
4 .5 2 (.1 7 8)
16 .10 (.63 4 )
15 .90 (.62 6 )
F E E D D IRE C TIO N
13.50 (.532 )
12.80 (.504 )
2 7.4 0 (1.079)
2 3.9 0 (.9 41)
4
33 0.00
(1 4.1 73)
MA X.
NO TES :
1. C O M F O R M S TO E IA -4 18.
2. C O N TR O LLIN G D IM E N S IO N : M ILL IM ET ER .
3. D IM E N S IO N ME A S U R E D @ H U B .
4. IN C LU D E S F LA N G E D IS TO R T IO N @ O U T E R E D G E .
10 / 10
60.00 (2.3 62)
MIN .
26 .40 (1.03 9)
24 .40 (.961 )
3
3 0.40 (1.1 97)
MAX.
4
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