IRL2203NS/L l l l l l l l Advanced Process Technology Ultra Low On-Resistance Dynamic dv/dt Rating 175°C Operating Temperature Fast Switching Fully Avalanche Rated 100% RG Tested HEXFET® Power MOSFET D VDSS = 30V RDS(on) = 7.0mΩ G ID = 116A S Description Advanced HEXFET® Power MOSFETs from International Rectifier utilize advanced processing techniques to achieve extremely low onresistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The D2Pak is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. The D2Pak is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application. The through-hole version (IRL2203NL) is available for low-profile applications. D2Pak IRL2203NS TO-262 IRL2203NL Absolute Maximum Ratings Symbol ID @ TC = 25°C Parameter Max Continuous Drain Current, VGS @ 10V 116 ID @ TC = 100°C Continuous Drain Current, VGS @ 10V Pulsed Drain Current IDM Units i A 82 c 400 PD @TA = 25°C Power Dissipation PD @TC = 25°C Power Dissipation 3.8 W 180 W W/°C V VGS IAR Linear Derating Factor Gate-to-Source Voltage Avalanche Current 1.2 ± 16 60 A EAR Repetitive Avalanche Energy 18 mJ 5.0 V/ns dv/dt c c Peak Diode Recovery dv/dt e Operating Junction and TJ TSTG -55 to + 175 Storage Temperature Range Soldering Temperature, for 10 seconds °C 300 (1.6mm from case) Thermal Resistance Symbol 1 / 10 k Parameter RθJC Junction-to-Case RθJA Junction-to-Ambient (PCB mount, steady state) jk Typ Max ––– 0.85 ––– 40 Units °C/W www.freescale.net.cn IRL2203NS/L Electrical Characteristics @ TJ = 25°C (unless otherwise specified) Symbol Parameter Min Typ Max Units 30 ––– ––– Breakdown Voltage Temp. Coefficient ––– 0.029 ––– Static Drain-to-Source On-Resistance ––– ––– 7.0 VGS = 10V, ID = 60A ––– ––– 10 VGS = 4.5V, ID = 48A V(BR)DSS Drain-to-Source Breakdown Voltage ∆V(BR)DSS/∆TJ RDS(on) V Conditions VGS = 0V, ID = 250µA V/°C Reference to 25°C, ID = 1mA f f VGS(th) Gate Threshold Voltage 1.0 ––– 3.0 V gfs Forward Transconductance 73 ––– ––– S IDSS Drain-to-Source Leakage Current ––– ––– 25 ––– ––– 250 Gate-to-Source Forward Leakage ––– ––– 100 Gate-to-Source Reverse Leakage ––– ––– -100 Qg Total Gate Charge ––– ––– 60 Qgs Gate-to-Source Charge ––– ––– 14 Qgd Gate-to-Drain ("Miller") Charge ––– ––– 33 RG Gate Resistance 0.2 ––– 3.0 td(on) Turn-On Delay Time ––– 11 ––– VDD = 15V tr Rise Time ––– 160 ––– ID = 60A td(off) Turn-Off Delay Time ––– 23 ––– RG = 1.8Ω tf Fall Time ––– 66 ––– VGS = 4.5V, See Fig. 10 LD Internal Drain Inductance ––– 4.5 ––– IGSS µA nA VDS = VGS, ID = 250µA VDS = 25V, I D = 60A f VDS = 30V, VGS = 0V VDS = 24V, VGS = 0V, TJ = 125°C VGS = 16V VGS = -16V ID = 60A nC VDS = 24V VGS = 4.5V, See Fig. 6 and 13 Ω Between lead, Nh 6mm (0.25in.) from package LS Internal Source Inductance ––– 7.5 ––– Ciss Input Capacitance ––– 3290 ––– Coss Output Capacitance ––– 1270 ––– pF VDS = 25V Crss Reverse Transfer Capacitance Single Pulse Avalanche Energy ––– 170 ––– 1320 ––– 290 mJ IAS = 60A, L = 0.16mH EAS d g h f and center of die contact VGS = 0V ƒ = 1.0MHz, See Fig. 5 Source-Drain Ratings and Characteristics Symbol Parameter Typ Max Units i Continuous Source Current ISM (Body Diode) Pulsed Source Current ––– ––– 400 VSD (Body Diode) Diode Forward Voltage ––– ––– 1.2 V trr Reverse Recovery Time ––– 56 84 ns Qrr Reverse Recovery Charge ––– 110 170 nC ton Forward Turn-On Time c Notes: Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) Starting TJ = 25°C, L = 0.16mH RG = 25Ω, IAS = 60A, VGS=10V (See Figure 12) ISD ≤ 60A, di/dt ≤ 110A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C Pulse width ≤ 400µs; duty cycle ≤ 2%. 2 / 10 Min IS ––– ––– 116 Conditions MOSFET symbol A showing the integral reverse p-n junction diode. TJ = 25°C, IS = 60A, VGS = 0V f TJ = 25°C, IF = 60A di/dt = 100A/µs f Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) This is a typical value at device destruction and represents operation outside rated limits. This is a calculated value limited to TJ = 175°C . Calculated continuous current based on maximum allowable junction temperature. Package limitation current is 75A. When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994. Rθ is measured at TJ approximately 90°C www.freescale.net.cn IRL2203NS/L 1000 1000 VGS 15V 10V 4.5V 3.7V 3.5V 3.3V 3.0V BOTTOM 2.7V VGS 15V 10V 4.5V 3.7V 3.5V 3.3V 3.0V BOTTOM 2.7V TOP I D , Drain-to-Source Current (A) I D , Drain-to-Source Current (A) TOP 100 10 2.7V 100 20µs PULSE WIDTH TJ = 25 °C 1 0.1 1 10 2.7V 10 1 0.1 100 Fig 1. Typical Output Characteristics TJ = 25 ° C TJ = 175 ° C 100 V DS = 15V 20µs PULSE WIDTH 4.0 5.0 6.0 Fig 3. Typical Transfer Characteristics 3 / 10 RDS(on) , Drain-to-Source On Resistance (Normalized) I D , Drain-to-Source Current (A) 2.5 3.0 10 100 Fig 2. Typical Output Characteristics 1000 VGS , Gate-to-Source Voltage (V) 1 VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V) 10 2.0 20µs PULSE WIDTH TJ = 175 ° C 7.0 ID = 100A 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 0 VGS = 10V 20 40 60 80 100 120 140 160 180 TJ , Junction Temperature ( °C) Fig 4. Normalized On-Resistance Vs. Temperature www.freescale.net.cn IRL2203NS/L VGS = 0V, f = 1MHz Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd Coss = Cds + Cgd C, Capacitance (pF) 5000 4000 Ciss 3000 Coss 2000 1000 15 VGS , Gate-to-Source Voltage (V) 6000 ID = 60A VDS = 24V VDS = 15V 12 9 6 3 FOR TEST CIRCUIT SEE FIGURE 13 Crss 0 1 10 0 100 0 20 VDS , Drain-to-Source Voltage (V) 1000 80 10000 OPERATION IN THIS AREA LIMITED BY R DS(on) ID, Drain-to-Source Current (A) ISD , Reverse Drain Current (A) 60 Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage 100 1000 TJ = 175 ° C 10 TJ = 25 ° C 1 0.1 0.0 V GS = 0 V 0.4 0.8 1.2 1.6 2.0 VSD ,Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 4 / 10 40 QG , Total Gate Charge (nC) 2.4 100 100µsec 1msec 10 Tc = 25°C Tj = 175°C Single Pulse 1 1 10msec 10 100 VDS , Drain-toSource Voltage (V) Fig 8. Maximum Safe Operating Area www.freescale.net.cn IRL2203NS/L 120 VDS LIMITED BY PACKAGE VGS ID , Drain Current (A) 100 RD D.U.T. RG + -VDD 80 V GS 60 Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 40 Fig 10a. Switching Time Test Circuit 20 VDS 90% 0 25 50 75 100 125 150 175 TC , Case Temperature ( °C) 10% VGS Fig 9. Maximum Drain Current Vs. Case Temperature td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms Thermal Response (Z thJC ) 1 D = 0.50 0.20 0.1 0.01 0.00001 0.10 0.05 0.02 0.01 PDM SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case 5 / 10 www.freescale.net.cn 15V L VDS D.U.T RG IAS VGS 20V tp DRIVER + V - DD A 0.01Ω Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS tp EAS , Single Pulse Avalanche Energy (mJ) IRL2203NS/L 600 ID 24A 42A 60A TOP 500 BOTTOM 400 300 200 100 0 25 50 75 100 125 150 175 Starting TJ , Junction Temperature ( °C) Fig 12c. Maximum Avalanche Energy Vs. Drain Current I AS Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 50KΩ QG 12V .2µF .3µF VGS QGS D.U.T. QGD + V - DS VGS VG 3mA IG Charge Fig 13a. Basic Gate Charge Waveform 6 / 10 ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit www.freescale.net.cn IRL2203NS/L Peak Diode Recovery dv/dt Test Circuit + D.U.T* Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer + - - + RG • dv/dt controlled by RG • ISD controlled by Duty Factor "D" • D.U.T. - Device Under Test VGS * + - VDD Reverse Polarity of D.U.T for P-Channel Driver Gate Drive P.W. Period D= P.W. Period [VGS=10V ] *** D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode [VDD] Forward Drop Inductor Curent Ripple ≤ 5% [ISD ] *** VGS = 5.0V for Logic Level and 3V Drive Devices Fig 14. For N-channel HEXFET® power MOSFETs 7 / 10 www.freescale.net.cn IRL2203NS/L D2Pak Tape & Reel Information Dimensions are shown in millimeters (inches) TRR 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) FEED DIRECTION 1.85 (.073) 1.65 (.065) 1.60 (.063) 1.50 (.059) 11.60 (.457) 11.40 (.449) 0.368 (.0145) 0.342 (.0135) 15.42 (.609) 15.22 (.601) 24.30 (.957) 23.90 (.941) TRL 10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 4.72 (.136) 4.52 (.178) 16.10 (.634) 15.90 (.626) FEED DIRECTION 13.50 (.532) 12.80 (.504) 27.40 (1.079) 23.90 (.941) 4 330.00 (14.173) MAX. NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE. 10 / 10 60.00 (2.362) MIN. 26.40 (1.039) 24.40 (.961) 3 30.40 (1.197) MAX. 4 www.freescale.net.cn