LM2710 Step-up PWM DC/DC Converter Integrated with 5 Buffers General Description Features The LM2710 is a compact bias solution for TFT displays. It has a current mode PWM step-up DC/DC converter with a 1.4A, 0.17Ω internal switch. Capable of generating 8V at 300mA from a Lithium Ion battery, the LM2710 is ideal for generating bias voltages for large screen LCD panels. The LM2710 can be operated at switching frequencies of 600kHz or 1.25MHz, allowing for easy filtering and low noise. An external compensation pin gives the user flexibility in setting frequency compensation, which makes possible the use of small, low ESR ceramic capacitors at the output. The LM2710 uses a patented internal circuitry to limit startup inrush current of the boost switching regulator without the use of an external softstart capacitor. An external softstart pin enables the user to tailor the softstart to a specific application. The LM2710 contains a Vcom buffer and 4 Gamma buffers capable of supplying 50mA source and sink. The TSSOP-20 package ensures a low profile overall solution. n 1.4A, 0.17Ω, internal power switch n VIN operating range: 2.2V to 7.5V n 600kHz/1.25MHz selectable frequency step-up DC/DC converter n 20 pin TSSOP package n Inrush current limiting circuitry n External softstart override n Vcom buffer n 4 Gamma buffers Applications n n n n LCD Bias Supplies Handheld Devices Portable Applications Cellular Phones/Digital Cameras Typical Application Circuit 20043431 © 2004 National Semiconductor Corporation DS200434 www.national.com LM2710 TFT Step-up PWM DC/DC Converter Integrated with 5 Buffers February 2004 LM2710 Connection Diagram Top View 20043404 TJMAX TSSOP 20 package = 125˚C, θJA = 120˚C/W (Note 1) Pin Description Pin Name 1 VSW Power switch input. Function 2 VIN Switching Regulator Power input. 3 SHDN Shutdown pin, active low. 4 FSLCT 5 Vs+ 6 Vcom-in Vcom Buffer input. 7 GMA1-in Gamma Buffer input. 8 GMA2-in Gamma Buffer input. 9 GMA3-in Gamma Buffer input. 10 GMA4-in Gamma Buffer input. 11 GMA4-out Gamma Buffer output. 12 GMA3-out Gamma Buffer output. 13 GMA2-out Gamma Buffer output. 14 GMA1-out Gamma Buffer output. 15 Vcom-out Vcom Buffer output. 16 SS Soft start pin. 17 VC Boost Compensation Network Connection. 18 FB Output Voltage Feedback input. 19 AGND 20 GND www.national.com Frequency Select pin. FSLCT = VIN for 1.25 MHz, FSLCT = AGND or floating for 600kHz. Vcom and Gamma Buffer input supply. Vcom and Gamma Buffer ground, Analog ground connection for Regulator. Switch Power Ground. 2 LM2710 GMA3-out(Pin 12): Gamma Buffer output pin. GMA2-out(Pin13): Gamma Buffer output pin. Pin Functions VSW(Pin 1): This is the drain of the internal NMOS power switch. Minimize the metal trace area connected to this pin to minimize EMI. VIN(Pin 2): Input Supply Pin. Bypass this pin with a capacitor as close to the device as possible. The capacitor should connect between VIN and GND. GMA1-out(Pin 14): Gamma Buffer output pin. Vcom-out(Pin 15): Vcom Buffer output pin. SS(Pin 16): Softstart pin. Connect capacitor to SS pin and AGND to slowly ramp inductor current on startup. VC(Pin 17): Compensation Network for Boost switching regulator. Connect resistor/capacitor network between VC pin and AGND for boost switching regulator AC compensation. SHDN(Pin 3): Shutdown Pin. The shutdown pin signal is active low. A voltage of less than 0.3V disables the device. A voltage greater than 0.85V enables the device. FSLCT(Pin 4): Frequency Select Pin. Connecting FSLCT to AGND selects a 600 kHz operating frequency for the switching regulator. Connecting FSLCT to VIN selects a 1.25 MHz operating frequency. If FSLCT is left floating, the switching frequency defaults to 600 kHz. FB(Pin 18): Feedback pin. Set the output voltage by selecting values of R1 and R2 using: Vs+(Pin 5): Supply pin for the Vcom buffer and the four Gamma buffers. Bypass this pin with a capacitor as close to the device as possible. The capacitor should connect between Vs+ and GND. Vcom-in(Pin 6): Vcom Buffer input pin. Connect the ground of the feedback network to the AGND plane, which can be tied directly to the GND pin. AGND(Pin 19): Analog ground pin. Ground connection for the Vcom buffer, Gamma buffers and the boost switching regulator. AGND must be tied directly to GND at the pins. GND(Pin 20): Power ground pin. Ground connection for the NMOS power device of the boost switching regulator. GND must be tied directly to AGND at the pins. GMA1-in(Pin 7): Gamma Buffer input pin. GMA2-in(Pin 8): Gamma Buffer input pin. GMA3-in(Pin 9): Gamma Buffer input pin. GMA4-in(Pin 10): Gamma Buffer input pin. GMA4-out(Pin 11): Gamma Buffer output pin. Ordering Information Order Number Package Type NSC Package Drawing Supplied As LM2710MT-ADJ TSSOP-20 MTC20 73 Units, Rail LM2710MTX-ADJ TSSOP-20 MTC20 2500 Units, Tape and Reel 3 www.national.com LM2710 Block Diagrams 20043403 20043451 www.national.com 4 ESD Ratings (Note 3) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. VIN -0.3V to 7.5V VSW Voltage -0.3V to 18V FB Voltage -0.3V to 7V VC Voltage 0.965V to 1.565V SHDN Voltage Human Body Model -0.3V to 12V Buffer Input Voltage Rail-to-Rail Buffer Output Voltage 200V Operating Conditions Operating Temperature −40˚C to +125˚C Storage Temperature −65˚C to +150˚C Supply Voltage, VIN AGND to VIN Supply Voltage, Vs+ 2kV Machine Model -0.3V to VIN FSLCT Voltage LM2710 Absolute Maximum Ratings (Note 2) 2.2V to 7.5V VSW Voltage Rail-to-Rail 17V Supply Vcom Buffer, Vs+ 4V to 12V Supply Gamma Buffer, Vs+ 4V to 12V Electrical Characteristics Specifications in standard type face are for TJ = 25˚C and those with boldface type apply over the full Operating Temperature Range ( TJ = −40˚C to +125˚C). Unless otherwise specified, VIN =2.2V and Vs+ = 8V, Rox = 50Ω, Cox = 1nF. Switching Regulator Symbol IQ Parameter Quiescent Current Conditions Min (Note 4) 1.6 2 1.65 2.2 Switching, FSCLT = 0V 2.5 3 Switching, FSCLT = VIN 3.4 4 6 15 µA 1.265 1.291 V 0.03 0.05 %/V Feedback Voltage %VFB/∆VIN Feedback Voltage Line Regulation ICL Switch Current Limit (Note 6) VIN = 2.5V, VOUT = 8V VIN = 2.7V Switch RDSON (Note 7) FB Pin Bias Current(Note 8) Units Not Switching, FSCLT = VIN VFB RDSON Max (Note 4) Not Switching, FSCLT = 0V Shutdown mode IB Typ (Note 5) 1.239 1.4 VIN Input Voltage Range ISS Soft Start Current TSS Internal Soft Start Ramp Time gm Error Amp Transconductance ∆I = 5µA A 170 30 2.2 5 FSLCT = 0V 60 mA mΩ 90 nA 7.5 V 11 15 µA 6.7 10 mS 135 250 µmho AV Error Amp Voltage Gain DMAX Maximum Duty Cycle fS Switching Frequency IL Switch Leakage Current VSW = 17V SHDN SHDN Threshold Output High Output Low 0.6 0.3 V I SHDN Shutdown Pin Current 0V ≤ SHDN ≤ VIN 0.5 1 µA UVP On Threshold 1.8 1.9 2 V Off Threshold 1.7 1.8 1.9 V 135 V/V 78 85 FSLCT = 0V 500 600 700 kHz FSLCT = VIN 0.9 1.25 1.5 MHz 0.185 20 µA 0.85 Hysteresis 0.6 100 5 % V mV www.national.com LM2710 Electrical Characteristics Specifications in standard type face are for TJ = 25˚C and those with boldface type apply over the full Operating Temperature Range ( TJ = −40˚C to +125˚C). Unless otherwise specified, VIN =2.2V and Vs+ = 8V, Rox = 50Ω, Cox = 1nF. BUFFERS Symbol Parameter Conditions Min (Note 4) Typ (Note 5) Max (Note 4) 10 VOS Input offset voltage 2.5 ∆Vos/∆T Offset Voltage Drift 8 IB Input Bias Current 170 CMVR Input Common-mode Voltage Range ZIN Input Impedance CIN Input Capacitance IOUT Continuous Output Current VOUT Swing 0.05 mV µV/˚C 800 nA Vs+-0.05 V 400 kΩ 1 pF Vs+=8V, Source 41 59 71 Vs+=8V, Sink −65 −53 −36 Vs+=12V, Source 50 71 85 Vs+=12V, Sink −75 −61 RL=10k, Vo min. Units mA −42 0.075 RL=10k, Vo max. 7.88 RL=2k, Vo min. 0.075 RL=2k, Vo max. 7.865 AVCL Voltage Gain RL =2 kΩ RL=10 kΩ 0.995 0.9985 NL Gain Linearity RL =2 kΩ, Buffer input=0.5 to (Vs+-0.5V) Vs+ Supply Voltage PSRR Power Supply Rejection Ratio Vs+ = 4 to 12V Is+ Supply Current/Amplifier Vo = Vs+/2, No Load SR Slew Rate BW Bandwidth φ0 Phase Margin 0.998 0.9999 V/V 0.01 % 4 -3dB,RL =10 kΩ, CL =10pf V 12 V 90 316 µV/V 1 2 mA 10 V/µs 6 MHz 50 Deg˚ Note 1: The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-to-ambient thermal resistance, θJA, and the ambient temperature, TA. See the Electrical Characteristics table for the thermal resistance of various layouts. The maximum allowable power dissipation at any ambient temperature is calculated using: PD (MAX) = (TJ(MAX) − TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Note 2: Absolute maximum ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the device is intended to be functional, but device parameter specifications may not be guaranteed. For guaranteed specifications and test conditions, see the Electrical Characteristics. Note 3: The human body model is a 100 pF capacitor discharged through a 1.5kΩ resistor into each pin. The machine model is a 200pF capacitor discharged directly into each pin. Note 4: All limits guaranteed at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are 100% production tested or guaranteed through statistical analysis. All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL). Note 5: Typical numbers are at 25˚C and represent the most likely norm. Note 6: Duty cycle affects current limit due to ramp generator. See Switch Current Limit vs. VIN and Switch Current Limit vs. Temperature graphs in the Typical Performance Characteristics section. Note 7: See Typical Performance Characteristics section for Tri-Temperature data for RDSON vs. VIN. Note 8: Bias current flows into FB pin. www.national.com 6 LM2710 Typical Performance Characteristics Efficiency vs. Load Current (VOUT = 8V, fS = 1.25 MHz) Efficiency vs. Load Current (VOUT = 8V, fS = 600 kHz) 20043426 20043425 Switch Current Limit vs. Temperature (VOUT = 8V) Efficiency vs. Load Current (VOUT = 10V, fS = 1.25 MHz) 20043420 20043460 RDSON vs. VIN (ISW = 1A) Switch Current Limit vs. VIN 20043422 20043427 7 www.national.com LM2710 Typical Performance Characteristics (Continued) IQ vs. VIN (600 kHz, not switching) IQ vs. VIN (600 kHz, switching) 20043421 20043429 IQ vs. VIN (1.25 MHz, switching) IQ vs. VIN (1.25 MHz, not switching) 20043419 20043421 Frequency vs. VIN (600 kHz) IQ vs. VIN (In shutdown) 20043418 www.national.com 20043423 8 LM2710 Typical Performance Characteristics (Continued) Frequency vs. VIN (1.25 MHz) Feedback Pin Current vs. Temperature 20043457 20043424 CSS Pin Current vs. VIN Load Transient Response 20043476 VOUT = 8V, VIN = 3V, F = 1.25MHz 1) Load, 80mA to 260mA to 80mA 2) IL, 500mA/div, DC 20043458 3) VOUT, 100mV/div, AC T = 100µs/div Load Transient Response Load Transient Response 20043483 20043475 VOUT = 8V, VIN = 3V, F = 600kHz VOUT = 10V, VIN = 5V, F = 1.25MHz 1) Load, 80mA to 260mA to 80mA 1) Load, 195mA to 385mA to 195mA 2) IL, 500mA/div, DC 2) IL, 500mA/div, DC 3) VOUT, 200mV/div, AC 3) VOUT, 500mV/div, AC T = 100µs/div T = 100µs/div 9 www.national.com LM2710 Typical Performance Characteristics (Continued) Internal Soft Start Internal Soft Start 20043479 20043477 VOUT = 8V, VIN = 3V, RLOAD = 27Ω, CSS = none, F = 600kHz VOUT = 8V, VIN = 3V, RLOAD = 27Ω, CSS = none, F = 1.25MHz 1) SHDN, 1V/div, DC 1) SHDN, 1V/div, DC 2) IL, 500mA/div, DC 2) IL, 500mA/div, DC 3) VOUT, 5V/div, DC T = 1ms/div 3) VOUT, 5V/div, DC T = 1ms/div Input Offset Voltage vs. Common Mode Voltage (3 units) External Soft Start 20043478 VOUT = 8V, VIN = 3V, RLOAD = 27Ω, CSS = 330nF, F = 1.25MHz 1) SHDN, 1V/div, DC 2) IL, 500mA/div, DC 20043461 3) VOUT, 5V/div, DC T = 4ms/div Input Offset Voltage vs. Common Mode Voltage (Over Temperature) Input Bias Current vs. Common Mode Voltage 20043463 20043462 www.national.com 10 LM2710 Typical Performance Characteristics (Continued) Output Voltage vs. Output Current (sinking) Output Voltage vs. Output Current (sourcing) 20043464 20043465 Large Signal Step Response (50Ω, 1nF ext. compensation) Supply Current vs. Common Mode Voltage 20043467 20043466 Large Signal Step Response (no ext. compensation) Positive Slew Rate vs. Capacitive Load 20043468 20043469 11 www.national.com LM2710 Typical Performance Characteristics (Continued) Negative Slew Rate vs. Capacitive Load Phase Margin vs. Capacitive Load 20043470 20043471 Unity Gain Frequency vs. Capacitive Load CMRR vs. Frequency 20043473 20043472 PSRR vs. Frequency 20043474 www.national.com 12 LM2710 Operation 20043402 FIGURE 1. Simplified Boost Converter Diagram (a) First Cycle of Operation (b) Second Cycle Of Operation CONTINUOUS CONDUCTION MODE The LM2710 is a current-mode, PWM boost regulator. A boost regulator steps the input voltage up to a higher output voltage. In continuous conduction mode (when the inductor current never reaches zero at steady state), the boost regulator operates in two cycles. In the first cycle of operation, shown in Figure 1 (a), the transistor is closed and the diode is reverse biased. Energy is collected in the inductor and the load current is supplied by COUT. The second cycle is shown in Figure 1 (b). During this cycle, the transistor is open and the diode is forward biased. The energy stored in the inductor is transferred to the load and output capacitor. The ratio of these two cycles determines the output voltage. The output voltage is defined approximately as: SOFT-START CAPACITOR The LM2710 has patented internal circuitry that is used to limit the inductor inrush current on start-up. This inrush current limiting circuitry serves as a soft-start. However, many applications may require much more soft-start than what is available with the internal circuitry. The external SS pin is used to tailor the soft-start for a specific application. A 11µA current charges the external soft-start capacitor, Css. The soft-start time can be estimated as: Tss = Css*0.6V/11µA The minimum soft-start time is set by the internal soft-start circuitry, typically 7ms for 600kHz operation and approximately half that for 1.25MHz operation. Only longer soft-start times may be implemented using the SS pin and a capacitor CSS. If a shorter time is designed for using the above equation, the internal soft-start circuitry will override it. Due to the unique nature of the dual internal/external softstart, care was taken in the design to ensure temperature stable operation. As you can see with the Iss data in the Electrical Characterisitcs table and the graph "Soft-Start Current vs. VIN" in the Typical Performance Characterisitcs section, the soft start curent has a temperature coefficient and would lead one to believe there would be significant variation with temperature. Though the current has a temperature coefficient the actual programmed external soft start time does not show this extreme of a temperature variation. As you can see in the following transient plots: where D is the duty cycle of the switch, D and D' will be required for design calculations SETTING THE OUTPUT VOLTAGE The output voltage is set using the feedback pin and a resistor divider connected to the output as shown in the typical operating circuit. The feedback pin voltage is 1.265V, so the ratio of the feedback resistors sets the output voltage according to the following equation: 13 www.national.com LM2710 Operation INTRODUCTION TO COMPENSATION (Continued) VOUT = 8V, VIN = 2.5V, RL = 27Ω, CSS = 330nF, T = 4ms/div, F = 1.25MHz. Trace: 1) SHDN, 1V/div, DC Coupled 2) IL, 0.5A/div, DC Coupled 3) VOUT, 5V/div, DC Coupled 20043480 TA = −20˚C 20043405 FIGURE 2. (a) Inductor current. (b) Diode current. The LM2710 is a current mode PWM boost converter. The signal flow of this control scheme has two feedback loops, one that senses switch current and one that senses output voltage. To keep a current programmed control converter stable above duty cycles of 50%, the inductor must meet certain criteria. The inductor, along with input and output voltage, will determine the slope of the current through the inductor (see Figure 2 (a)). If the slope of the inductor current is too great, the circuit will be unstable above duty cycles of 50%. A 10µH inductor is recommended for most 600 kHz applications, while a 4.7µH inductor may be used for most 1.25 MHz applications. If the duty cycle is approaching the maximum of 85%, it may be necessary to increase the inductance by as much as 2X. See Inductor and Diode Selection for more detailed inductor sizing. The LM2710 provides a compensation pin (VC) to customize the voltage loop feedback. It is recommended that a series combination of RC and CC be used for the compensation network, as shown in the typical application circuit. For any given application, there exists a unique combination of RC and CC that will optimize the performance of the LM2710 circuit in terms of its transient response. The series combination of RC and CC introduces a pole-zero pair according to the following equations: 20043481 TA = 27˚C 20043482 TA = 85˚C When programming the softstart time externally, simply use the equation given in the Soft-Start Capacitor section above. This equation uses the typical room temperature value of the soft start current, 11µA, to set the soft start time. www.national.com where RO is the output impedance of the error amplifier, approximately 1MΩ. For most applications, performance can be optimized by choosing values within the range 5kΩ ≤ RC ≤ 60kΩ (RC can be up to 200kΩ if CC2 is used, see High Output Capacitor ESR Compensation) and 680pF ≤ CC ≤ 14 tions are possible in the application, the diode current rating must exceed the switch current limit. Using Schottky diodes with lower forward voltage drop will decrease power dissipation and increase efficiency. (Continued) 4.7nF. Refer to the Applications Information section for recommended values for specific circuits and conditions. Refer to the Compensation section for other design requirement. DC GAIN AND OPEN-LOOP GAIN Since the control stage of the converter forms a complete feedback loop with the power components, it forms a closedloop system that must be stabilized to avoid positive feedback and instability. A value for open-loop DC gain will be required, from which you can calculate, or place, poles and zeros to determine the crossover frequency and the phase margin. A high phase margin (greater than 45˚) is desired for the best stability and transient response. For the purpose of stabilizing the LM2710, choosing a crossover point well below where the right half plane zero is located will ensure sufficient phase margin. A discussion of the right half plane zero and checking the crossover using the DC gain will follow. COMPENSATION FOR BOOST DC/DC This section will present a general design procedure to help insure a stable and operational circuit. The designs in this datasheet are optimized for particular requirements. If different conversions are required, some of the components may need to be changed to ensure stability. Below is a set of general guidelines in designing a stable circuit for continuous conduction operation, in most all cases this will provide for stability during discontinuous operation as well. The power components and their effects will be determined first, then the compensation components will be chosen to produce stability. INDUCTOR AND DIODE SELECTION Although the inductor sizes mentioned earlier are fine for most applications, a more exact value can be calculated. To ensure stability at duty cycles above 50%, the inductor must have some minimum value determined by the minimum input voltage and the maximum output voltage. This equation is: INPUT AND OUTPUT CAPACITOR SELECTION The switching action of a boost regulator causes a triangular voltage waveform at the input. A capacitor is required to reduce the input ripple and noise for proper operation of the regulator. The size used is dependant on the application and board layout. If the regulator will be loaded uniformly, with very little load changes, and at lower current outputs, the input capacitor size can often be reduced. The size can also be reduced if the input of the regulator is very close to the source output. The size will generally need to be larger for applications where the regulator is supplying nearly the maximum rated output or if large load steps are expected. A minimum value of 10µF should be used for the less stressful conditions while a 22µF to 47µF capacitor may be required for higher power and dynamic loads. Larger values and/or lower ESR may be needed if the application requires very low ripple on the input source voltage. where fs is the switching frequency, D is the duty cycle, and RDSON is the ON resistance of the internal switch taken from the graph "RDSON vs. VIN" in the Typical Performance Characteristics section. This equation is only good for duty cycles greater than 50% (D > 0.5), for duty cycles less than 50% the recommended values may be used. The corresponding inductor current ripple as shown in Figure 2 (a) is given by: The choice of output capacitors is also somewhat arbitrary and depends on the design requirements for output voltage ripple. It is recommended that low ESR (Equivalent Series Resistance, denoted RESR) capacitors be used such as ceramic, polymer electrolytic, or low ESR tantalum. Higher ESR capacitors may be used but will require more compensation which will be explained later on in the section. The ESR is also important because it determines the peak to peak output voltage ripple according to the approximate equation: ∆VOUT ) 2∆iLRESR (in Volts) A minimum value of 10µF is recommended and may be increased to a larger value. After choosing the output capacitor you can determine a pole-zero pair introduced into the control loop by the following equations: The inductor ripple current is important for a few reasons. One reason is because the peak switch current will be the average inductor current (input current or ILOAD/D’) plus ∆iL. As a side note, discontinuous operation occurs when the inductor current falls to zero during a switching cycle, or ∆iL is greater than the average inductor current. Therefore, continuous conduction mode occurs when ∆iL is less than the average inductor current. Care must be taken to make sure that the switch will not reach its current limit during normal operation. The inductor must also be sized accordingly. It should have a saturation current rating higher than the peak inductor current expected. The output voltage ripple is also affected by the total ripple current. The output diode for a boost regulator must be chosen correctly depending on the output voltage and the output current. The typical current waveform for the diode in continuous conduction mode is shown in Figure 2 (b). The diode must be rated for a reverse voltage equal to or greater than the output voltage used. The average current rating must be greater than the maximum load current expected, and the peak current rating must be greater than the peak inductor current. During short circuit testing, or if short circuit condi- Where RL is the minimum load resistance corresponding to the maximum load current. The zero created by the ESR of the output capacitor is generally very high frequency if the ESR is small. If low ESR capacitors are used it can be neglected. If higher ESR capacitors are used see the High Output Capacitor ESR Compensation section. 15 www.national.com LM2710 Operation LM2710 Operation HIGH OUTPUT CAPACITOR ESR COMPENSATION When using an output capacitor with a high ESR value, or just to improve the overall phase margin of the control loop, another pole may be introduced to cancel the zero created by the ESR. This is accomplished by adding another capacitor, CC2, directly from the compensation pin VC to ground, in parallel with the series combination of RC and CC. The pole should be placed at the same frequency as fZ1, the ESR zero. The equation for this pole follows: (Continued) RIGHT HALF PLANE ZERO A current mode control boost regulator has an inherent right half plane zero (RHP zero). This zero has the effect of a zero in the gain plot, causing an imposed +20dB/decade on the rolloff, but has the effect of a pole in the phase, subtracting another 90˚ in the phase plot. This can cause undesirable effects if the control loop is influenced by this zero. To ensure the RHP zero does not cause instability issues, the control loop should be designed to have a bandwidth of less than 1⁄2 the frequency of the RHP zero. This zero occurs at a frequency of: To ensure this equation is valid, and that CC2 can be used without negatively impacting the effects of RC and CC, fPC2 must be greater than 10fZC. CHECKING THE DESIGN where ILOAD is the maximum load current. The final step is to check the design. This is to ensure a bandwidth of 1⁄2 or less of the frequency of the RHP zero. This is done by calculating the open-loop DC gain, ADC. After this value is known, you can calculate the crossover visually by placing a −20dB/decade slope at each pole, and a +20dB/ decade slope for each zero. The point at which the gain plot crosses unity gain, or 0dB, is the crossover frequency. If the crossover frequency is less than 1⁄2 the RHP zero, the phase margin should be high enough for stability. The phase margin can also be improved by adding CC2 as discussed earlier in the section. The equation for ADC is given below with additional equations required for the calculation: SELECTING THE COMPENSATION COMPONENTS The first step in selecting the compensation components RC and CC is to set a dominant low frequency pole in the control loop. Simply choose values for RC and CC within the ranges given in the Introduction to Compensation section to set this pole in the area of 10Hz to 500Hz. The frequency of the pole created is determined by the equation: where RO is the output impedance of the error amplifier, approximately 1MΩ. Since RC is generally much less than RO, it does not have much effect on the above equation and can be neglected until a value is chosen to set the zero fZC. fZC is created to cancel out the pole created by the output capacitor, fP1. The output capacitor pole will shift with different load currents as shown by the equation, so setting the zero is not exact. Determine the range of fP1 over the expected loads and then set the zero fZC to a point approximately in the middle. The frequency of this zero is determined by: mc ) 0.072fs (in V/s) Now RC can be chosen with the selected value for CC. Check to make sure that the pole fPC is still in the 10Hz to 500Hz range, change each value slightly if needed to ensure both component values are in the recommended range. After checking the design at the end of this section, these values can be changed a little more to optimize performance if desired. This is best done in the lab on a bench, checking the load step response with different values until the ringing and overshoot on the output voltage at the edge of the load steps is minimal. This should produce a stable, high performance circuit. For improved transient response, higher values of RC should be chosen. This will improve the overall bandwidth which makes the regulator respond more quickly to transients. If more detail is required, or the most optimal performance is desired, refer to a more in depth discussion of compensating current mode DC/DC switching regulators. www.national.com where RL is the minimum load resistance, VIN is the maximum input voltage, gm is the error amplifier transconductance found in the Electrical Characteristics table, and RDSON is the value chosen from the graph "RDSON vs. VIN " in the Typical Performance Characteristics section. BUFFER (Vcom and GMAx) COMPENSATION The architecture used for the buffers in the LM2710 requires external compensation on the output. Depending on the equivalent capacitive load of the TFT-LCD panel, external components at the buffer outputs may or may not be necessary. If the capacitance presented by the load is equal to or greater than 5nF no external components are needed as the TFT-LCD panel will act as compensation itself. Distributed resistive and capacitive loads enhance stability and increase 16 package, see Figure 3 and Figure 4. The feedback, softstart, and compensation networks should be connected directly to a dedicated analog ground plane and this ground plane must connect to the AGND pin, as in Figure 3. If no analog ground plane is available then the ground connections of the feedback, softstart, and compensation networks must tie directly to the AGND pin, as show in Figure 4. Connecting these networks to the GND pin can inject noise into the system and effect performance. For 600kHz operation the FSLCT pin should be tied to an analog ground plane or directly to the AGND pin. For 1.25MHz operation the FSLCT pin should be tied to the VIN pin. The input bypass capacitor CIN must be placed close to the IC. This will reduce copper trace resistance which effects input voltage ripple of the IC. For additional input voltage filtering, a 100nF bypass capacitor can be placed in parallel with CIN, close to the VIN pin, to shunt any high frequency noise to ground. The output capacitor, COUT, should also be placed close to the IC. Any copper trace connections for the COUT capacitor can increase the series resistance, which directly effects output voltage ripple and efficiency. The feedback network, resistors R1 and R2, should be kept close to the FB pin, and away from the inductor, to minimize copper trace connections that can inject noise into the system. Trace connections made to the inductor and schottky diode should be minimized to reduce power dissipation and increase overall efficiency. (Continued) performance of the buffers. If the capacitance presented by the load is less than 5nF external components will be required as the load itself will not ensure stability. No external compensation in this case will lead to oscillation of the buffer and an increase in power consumption. A single 5nF or greater capacitor on the output will ensure a stable buffer with no oscillations. For applications requiring a higher slew rate, a good choice for compensation is to add a 50Ω (Rox) in series with a 1nF (Cox) capacitor from the output of the buffer to ground. This allows for driving zero to infinite capacitance loads with no oscillations, minimal overshoot, and a higher slew rate than using a large capacitor. The high phase margin created by the external compensation will guarantee stability and good performance for all conditions. For noise sensitive applications greater output capacitance may be desired. When the power supply for the buffers (Vs+) is connected to the output of the switching regulator, the output ripple of the regulator will produce ripple at the output of the buffers. LAYOUT CONSIDERATIONS The LM2710 uses two separate ground connections, GND for the driver and NMOS power device of the boost regulator and AGND for the sensitive analog control circuitry of the boost regulator and the VCOM and Gamma buffers. The AGND and GND pins should be tied directly together at the 20043452 FIGURE 3. Multi-Layer Layout 20043453 FIGURE 4. Single Layer Layout 17 www.national.com LM2710 Operation LM2710 Application Information 20043459 FIGURE 5. 600kHz, 8V Application 20043484 FIGURE 6. 1.25MHz, 5V Application www.national.com 18 LM2710 Application Information (Continued) 20043485 FIGURE 7. 1.25MHz, 10V Application 20043486 FIGURE 8. 1.25MHz, 12V Application 19 www.national.com LM2710 TFT Step-up PWM DC/DC Converter Integrated with 5 Buffers Physical Dimensions inches (millimeters) unless otherwise noted TSSOP-20 Pin Package (MTC) For Ordering, Refer to Ordering Information Table NS Package Number MTC20 LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. 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