DS75160A/DS75161A IEEE-488 GPIB Transceivers General Description Features This family of high-speed-Schottky 8-channel bi-directional transceivers is designed to interface TTL/MOS logic to the IEEE Standard 488-1978 General Purpose Interface Bus (GPIB). PNP inputs are used at all driver inputs for minimum loading, and hysteresis is provided at all receiver inputs for added noise margin. The IEEE-488 required bus termination is provided internally with an active turn-off feature which disconnects the termination from the bus when VCC is removed. The General Purpose Interface Bus is comprised of 16 signal lines — 8 for data and 8 for interface management. The data lines are always implemented with DS75160A, and the management lines are either implemented with DS75161A in a single-controller system. n 8-channel bi-directional non-inverting transceivers n Bi-directional control implemented with TRI-STATE ® output design n Meets IEEE Standard 488-1978 n High-speed Schottky design n Low power consumption n High impedance PNP inputs (drivers) n 500 mV (typ) input hysteresis (receivers) n On-chip bus terminators n No bus loading when VCC is removed n Pin selectable open collector mode on DS75160A driver outputs n Accommodates multi-controller systems Connection Diagrams Dual-In-Line Package Dual-In-Line Package DS005804-16 Order Number DS75161AN or DS75161AWM See NS Package Number M20B or N20B DS005804-1 Top View Order Number DS75160AN or DS75160AWM See NS Package Number M20B or N20A TRI-STATE ® is a registered trademark of National Semiconductor Corporation. © 1999 National Semiconductor Corporation DS005804 www.national.com DS75160A/DS75161A IEEE-488 GPIB Transceivers May 1999 Absolute Maximum Ratings (Note 2) Molded Package If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. VCC, Supply Voltage TA, Ambient Temperature IOL, Output Low Current Bus Terminal Supply Voltage, VCC 7.0V Input Voltage 5.5V Storage Temperature Range −65˚C to +150˚C Lead Temperature (Soldering, 4 sec.) 260˚C Maximum Power Dissipation (Note 1) at 25˚C 1897 mW Min 4.75 0 Max 5.25 70 Units V ˚C 48 16 mA mA Note 1: Derate molded package 15.2 mW/˚C above 25˚C. Electrical Characteristics (Notes 3, 4) Symbol Parameter VIH High-Level Input Voltage VIL Low-Level Input Voltage VIK Input Clamp Voltage VHYS Input Hysteresis Bus VOH High-Level Terminal Output Voltage Bus (Note 4) VOL IIH IIL Conditions Min II = −18 mA Low-Level Terminal Output Voltage Bus High-Level Terminal and Input Current TE, PE, DC, Low-Level SC Inputs Typ Max 2 V −0.8 IOH = −800 µA IOH = −5.2 mA IOL = 16 mA Units 0.8 V −1.5 V 400 500 mV 2.7 3.5 V 2.5 3.4 0.3 0.5 IOH = 48 mA VI = 5.5V 0.4 0.5 V 0.2 100 VI = 2.7V VI = 0.5V 0.1 20 −10 −100 µA 3.0 3.7 V µA Input Current VBIAS ILOAD Terminator Bias Driver Voltage at Bus Port Disabled II(bus) = 0 (No Load) VI(bus) = −1.5V to 0.4V VI(bus) = 0.4V to 2.5V VI(bus) = 2.5V to 3.7V Terminator Bus Loading Current Bus Driver 2.5 −1.3 0 −3.2 2.5 Disabled IOS ICC Short-Circuit Terminal Output Current Bus (Note 6) Supply Current DS75160A DS75161A CIN Bus-Port Bus Capacitance mA −3.2 VI(bus) = 3.7V to 5V VI(bus) = 5V to 5.5V VCC = 0V, VI(bus) = 0V to 2.5V VI = 2V, VO = 0V (Note 5) 0 2.5 0.7 2.5 40 µA −15 −35 −75 mA −35 −75 −150 Transmit, TE = 2V, PE = 2V, VI = 0.8V Receive, TE = 0.8V, PE = 2V, VI = 0.8V 85 125 70 100 TE = 0.8V, DC = 0.8V, VI = 0.8V VCC = 5V or 0V, VI = 0V to 2V, 84 125 20 30 mA pF f = 1 MHz Note 2: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the device should be operated at these limits. The table of “Electrical Characteristics” provides conditions for actual device operation. Note 3: Unless otherwise specified, min/max limits apply across the 0˚C to +70˚C temperature range and the 4.75V to 5.25V power supply range. All typical values are for TA = 25˚C and VCC = 5.0V. Note 4: All currents into device pins are shown as positive; all currents out of device pins are shown as negative; all voltages are referenced to ground, unless otherwise specified. All values shown as max or min are so classified on absolute value basis. Note 5: Only one output at a time should be shorted. Note 6: This characteristic does not apply to outputs on DS75161A that are open collector. www.national.com 2 Switching Characteristics (Note 7) VCC = 5.0V ± 5%, TA = 0˚C to 70˚C Symbol Parameter From To Conditions DS75160A DS75161A DS75162A Units Min Typ Max Min Typ Max Min Typ Max tPLH Propagation Delay Time, Low to High Level Output tPHL Terminal Bus Propagation Delay Time, High to Low Level Output tPLH Propagation Delay Time, Low to High Level Output tPHL Bus Propagation Delay Time, Output Enable Time tPZL tPLZ tPZH tPZL tPLZ tPZH tPHZ 10 20 10 20 ns 14 20 14 20 14 20 ns Figure 1 VL = 5.0V 14 20 14 20 14 20 ns 10 20 10 20 10 20 ns Figure 2 VI = 3.0V 19 32 23 40 23 40 ns 15 22 15 25 15 25 ns Figure 1 VI = 0V 24 35 28 48 28 48 ns 17 25 17 27 17 27 ns 17 33 18 40 18 40 ns 15 25 22 33 22 33 ns Figure 1 VI = 0V 25 39 28 52 28 52 ns 15 27 20 35 20 35 ns Output Disable Time TE, DC, From High Level or SC CL = 15 pF Output Enable Time (Note 8) to Low Level (Note 9) Bus Output Disable Time VL = 2.3V RL = 38.3Ω From Low Level CL = 15 pF Output Enable Time Figure 1 VI = 3.0V to High Level tPHZ 20 VL = 0V RL = 480Ω to High Level tPHZ 10 Terminal RL = 240Ω CL = 30 pF High to Low Level Output tPZH VL = 2.3V RL = 38.3Ω CL = 30 pF Output Disable Time TE, DC, From High Level or SC Output Enable Time (Note 8) to Low Level (Note 9) VL = 0V RL = 3 kΩ Terminal CL = 15 pF Output Disable Time VL = 5V RL = 280Ω From Low Level CL = 15 pF Output Pull-Up Enable Figure 1 VI = 3V 10 17 NA NA ns VL = 0V RL = 480Ω 10 15 NA NA ns Time (DS75160A Only) PE Output Pull-Up Disable (Note 8) Time (DS75160A Only) Bus CL = 15 pF Figure 1 Note 7: Typical values are for VCC = 5.0V and TA = 25˚C and are meant for reference only. Note 8: Refer to Functional Truth Tables for control input definition. Note 9: Test configuration should be connected to only one transceiver at a time due to the high current stress caused by the VI voltage source when the output connected to that input becomes active. 3 www.national.com Switching Load Configurations DS005804-8 VC logic high = 3.0V VC logic low = 0V *CL includes jig and probe capacitance FIGURE 1. DS005804-9 VC logic high = 3.0V VC logic low = 0V *CL includes jig and probe capacitance FIGURE 2. Connection Diagrams Dual-In-Line Package DS005804-2 Top View This device is also an 8-channel bi-directional transceiver which is specifically configured to implement the eight management signal lines of the IEEE-488 bus. This device, paired with the DS75160A, forms the complete 16-line interface between the IEEE-488 bus and a single controller instrumentation system. In compliance with the system organization of the management signal lines, the SRQ, NDAC, and NRFD bus port outputs are open collector. In contrast to the DS75160A, these open collector outputs are a fixed configuration. The direction control is divided into three groups. The DAV, NDAC, and NRFD transceiver directions are controlled by the TE input. The ATN, SRQ, REN, and IFC transceiver directions are controlled by the DC input. The EOI transceiver direction is a function of both the TE and DC inputs, as well as the logic level present on the ATN channel. The port connections to the bus lines have internal terminators identical to the DS75160A. Functional Description DS75160A This device is an 8-channel bi-directional transceiver with one common direction control input, denoted TE. When used to implement the IEEE-488 bus, this device is connected to the eight data bus lines, designated DIO1–DIO8. The port connections to the bus lines have internal terminators, in accordance with the IEEE-488 Standard, that are deactivated when the device is powered down. This feature guarantees no bus loading when VCC = 0V. The bus port outputs also have a control mode that either enables or disables the active upper stage of the totem-pole configuration. When this control input, denoted PE, is in the high state, the bus outputs operate in the high-speed totem-pole mode. When PE is in the low state, the bus outputs operate as open collector outputs which are necessary for parallel polling. DS75161A www.national.com 4 Functional Description Logic Diagrams (Continued) Table of Signal Line Abbreviations Signal Line Mne- Classi- monic Definition DS75160A Device fication DC Direction Control DS75161A Control PE Pull-Up Enable DS75160A Signals TE Talk Enable All SC System Controller Data B1–B8 Bus Side of Device I/O Ports D1–D8 Terminal Side DS75160A of Device ATN Management Signals Attention DAV Data Valid EOI End or Identify IFC Interface Clear NDAC Not Data Accepted NRFD Not Ready for Data REN Remote Enable SRQ Service Request DS75161A DS005804-4 5 www.national.com Logic Diagrams (Continued) DS75161A DS005804-5 DS005804-7 Switching Waveforms Transmit Propagation Delays DS005804-10 www.national.com 6 Switching Waveforms (Continued) Receive Propagation Delays DS005804-11 Terminal Enable/Disable Times DS005804-12 Bus Enable/Disable Times DS005804-13 *Input signal: f = 1.0 MHz, 50% duty cycle, tr = tf ≤ 5 ns Performance Characteristics Bus Port Load Characteristics DS005804-14 Refer to Electrical Characteristics table 7 www.national.com Functional Truth Tables DS75160A Control Input Data Transceivers Level TE PE Direction H H T Bus Port Configuration Totem-Pole Output H L T Open Collector Output L X R Input DS75161A Control Input Level TE DC H H H L Transceiver Signal Direction ATN* EOI REN IFC SRQ NRFD NDAC DAV R R R T R R T L T T T R R R T H R R R T T T R T T R T T R L L H X H T T L X H R X H L R X L L T H = High level input L = Low level input X = Don’t care T = Transmit, i.e., signal outputted to bus R = Receive, i.e., signal outputted to terminal *The ATN signal level is sensed for internal multiplex control of EOI transmission direction logic. www.national.com 8 Physical Dimensions inches (millimeters) unless otherwise noted Order Number DS75160AWM NS Package Number M20B 9 www.national.com DS75160A/DS75161A IEEE-488 GPIB Transceivers Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Molded Dual-In-Line Package (N) Order Number DS75160AN or DS75161AN NS Package Number N20A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation Americas Tel: 1-800-272-9959 Fax: 1-800-737-7018 Email: [email protected] www.national.com National Semiconductor Europe Fax: +49 (0) 1 80-530 85 86 Email: [email protected] Deutsch Tel: +49 (0) 1 80-530 85 85 English Tel: +49 (0) 1 80-532 78 32 Français Tel: +49 (0) 1 80-532 93 58 Italiano Tel: +49 (0) 1 80-534 16 80 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Asia Pacific Customer Response Group Tel: 65-2544466 Fax: 65-2504466 Email: [email protected] National Semiconductor Japan Ltd. Tel: 81-3-5639-7560 Fax: 81-3-5639-7507 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.