NSC MM5480

MM5480 LED Display Driver
Y
General Description
Y
The MM5480 is a monolithic MOS integrated circuit utilizing
N-channel metal gate low threshold, enhancement mode
and ion-implanted depletion mode devices. It utilizes the
MM5451 die packaged in a 28-pin package making it ideal
for a 3(/2 digit display. The MM5480 is designed to drive
common anode-separate cathode LED displays. A single
pin controls the LED display brightness by setting a reference current through a variable resistor connected either to
VDD or to a separate supply of 11V maximum.
Y
Y
Y
Applications
Y
Y
Y
Y
Features
Y
Y
Y
Continuous brightness control
Serial data input
No load signal required
Wide power supply operation
TTL compatibility
Alphanumeric capability
3(/2 digit displays
COPSTM microcontrollers or microprocessor displays
Industrial control indicator
Relay driver
Digital clock, thermometer, counter, voltmeter
Instrumentation readouts
Block Diagram
TL/F/6138 – 1
FIGURE 1
Connection Diagram
Dual-In-Line Package
Order Number MM5480N
See NS Package Number N28B
TL/F/6138 – 2
Top View
FIGURE 2
COPSTM microcontrollers is a trademark of National Semiconductor Corporation.
C1995 National Semiconductor Corporation
TL/F/6138
RRD-B30M105/Printed in U. S. A.
MM5480 LED Display Driver
February 1995
Absolute Maximum Ratings
Power Dissipation at 25§ C
Molded DIP Package, Board Mount
Molded DIP Package, Socket Mount
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Voltage at Any Pin
VSS b 0.3V to VSS a 12V
b 65§ C to a 150§ C
Storage Temperature
2.4W*
2.1W**
Junction Temperature
150§ C
Lead Temperature (Soldering, 10 sec.)
300§ C
*Molded DIP Package, Board Mount, iJA e 52§ C/W, Derate 19.2 mW/§ C
above 25§ C.
**Molded DIP Package, Socket Mount, iJA e 58§ C/W, Derate 17.2 mW/§ C
above 25§ C.
Electrical Characteristics
TA e b25§ C to a 85§ C, VDD e 4.75V to 11.0V, VSS e 0V unless otherwise specified
Symbol
Parameter
Conditions
VDD
Power Supply
IDD
Power Supply Current
Excluding Output Loads
VIL
Input Voltage
Logical ‘‘0’’ Level
g 10 mA Input Bias
VIH
Input Voltage
Logical ‘‘1’’ Level
4.75V s VDD s 5.25V
Min
b 0.3
VDD l 5.25V
Brightness Input Current
(Note 2)
IOH
Output Sink Current (Note 3)
Segment OFF
VOUT e 3.0V
IOL
Output Sink Current (Note 3)
Segment ON
VOUT e 1V
Brightness Input e 0 mA
Brightness Input e 100 mA
Brightness Input e 750 mA
Brightness Input Voltage
(Pin 13)
OM
Output Matching (Note 1)
Max
4.75
IBR
VIBR
Typ
Input Current e 750 mA
Units
11
V
7
mA
0.8
V
2.2
VDD
V
VDD b 2
VDD
V
0
0.75
mA
10.0
mA
10.0
4.0
25.0
mA
mA
mA
4.3
V
g 20
%
0
2.0
15.0
2.7
3.0
AC Electrical Characteristics TA e b25§ C to a 85§ C, VDD e 5V g 0.5V
Parameter
Conditions
Min
fC
Symbol
Clock Input Frequency
(Notes 5 and 6)
DC
Typ
Max
Units
500
th
High Time
950
kHz
ns
tl
Low Time
950
ns
tDS
Data Input Set-Up Time
300
ns
tDH
Data Input Hold Time
300
ns
Note 1: Output matching is calculated as the percent variation from (IMAX a IMIN)/2.
Note 2: With a fixed resistor on the brightness input pin some variation in brightness will occur from one device to another. Maximum brightness input current can
be 2 mA as long as Note 3 and junction temperature equation are complied with.
Note 3: Absolute maximum for each output should be limited to 40 mA.
Note 4: The VOUT voltage should be regulated by the user.
Note 5: AC input waveform specification for test purpose: tr s 20 ns, tf s 20 ns, f e 500 kHz, 50% g 10% duty cycle.
Note 6: Clock input rise and fall times must not exceed 300 ns.
2
Functional Description
There must be a complete set of 36 clocks or the shift registers will not clear.
The MM5480 is specifically designed to operate 3(/2-digit
alphanumeric displays with minimal interface with the display and the data source. Serial data transfer from the data
source to the display driver is accomplished with 2 signals,
serial data and clock. Using a format of a leading ‘‘1’’ followed by the 35 data bits allows data transfer without an
additional load signal. The 35 data bits are latched after the
36th bit is complete, thus providing non-multiplexed, direct
drive to the display. Outputs change only if the serial data
bits differ from the previous time. Display brightness is determined by control of the output current for LED displays. A
0.001 mF ceramic or mica disc capacitor should be connected to brightness control, pin 13, to prevent possible oscillations.
A block diagram is shown in Figure 1 . The output current is
typically 20 times greater than the current into pin 13, which
is set by an external variable resistor. There is an internal
limiting resistor of 400X nominal value.
When the chip first powers ON an internal power ON reset
signal is generated which resets all registers and all latches.
The START bit and the first clock return the chip to its normal operation.
Figure 5 shows the Output Data Format for the 5480. Because it uses only 23 of the possible 35 outputs, 12 of the
bits are ‘Don’t Cares’.
Figure 3 shows the timing relationships between data and
clock. A maximum clock frequency of 0.5 MHz is assumed.
For applications where a lesser number of outputs are used,
it is possible to either increase the current per output, or
operate the part at higher than 1V VOUT. The following
equation can be used for calculations.
Tj e (VOUT) (ILED) (No. of segments) (iJA) a TA
where:
Tj e junction temperature, 150§ C max.
VOUT e the voltage at the LED driver outputs
ILED e the LED current
iJA e thermal coefficient of the package
TA e ambient temperature
iJA (Socket Mount) e 58§ C/W
iJA (Board Mount) e 52§ C/W
Figure 4 shows the input data format. A start bit of logical
‘‘1’’ precedes the 35 bits of data. At the 36th clock a LOAD
signal is generated synchronously with the high state of the
clock, which loads the 35 bits of the shift registers into the
latches. At the low state of the clock a RESET signal is
generated which clears all the shift registers for the next set
of data. The shift registers are static master-slave configuration. There is no clear for the master portion of the first shift
register, thus allowing continuous operation.
TL/F/6138 – 3
FIGURE 3
TL/F/6138 – 4
FIGURE 4. Input Data Format
START 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 5451
START X 1 2 3 4 5 6 7 X X X 8 9 10 11 X X X X 12 13 14 15 16 17 X 18 X X 19 20 21 22 23 X 5480
FIGURE 5. Output Data Format
3
Functional Description (Continued)
I19 e
DV
1k
FIGURE 6. Typical Application of Constant Current Brightness Control
TL/F/6138 – 5
TL/F/6138 – 6
FIGURE 7. Brightness Control Varying the Duty Cycle
Basic 3(/2-Digit Interface
Safe Operating Area
TL/F/6138 – 7
TL/F/6138 – 8
4
5
MM5480 LED Display Driver
Physical Dimensions inches (millimeters)
Dual-In-Line Package (N)
Order Number MM5480N
NS Package Number N28B
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