NSC 5962-7802302M2A

DS26F31M
Quad High Speed Differential Line Drivers
General Description
The DS26F31 is a quad differential line driver designed for
digital data transmission over balanced lines. The DS26F31
meets all the requirements of EIA Standard RS-422 and
Federal Standard 1020. It is designed to provide unipolar differential drive to twisted-pair or parallel-wire transmission
lines.
The DS26F31 offers improved performance due to the use
of state-of-the-art L-FAST bipolar technology. The L-FAST
technology allows for higher speeds and lower currents by
utilizing extremely short gate delay times. Thus, the
DS26F31 features lower power, extended temperature
range, and improved specifications.
The circuit provides an enable and disable function common
to all four drivers. The DS26F31M features TRI-STATE ® outputs and logical OR-ed complementary enable inputs. The
inputs are all LS compatible and are all one unit load.
The DS26F31M offers optimum performance when used
with the DS26F32 Quad Differential Line Receiver.
Features
n
n
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n
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Military temperature range
Output skew — 2.0 ns typical
Input to output delay — 10 ns
Operation from single +5.0V supply
16-lead ceramic DIP Package
Outputs won’t load line when VCC = 0V
Output short circuit protection
Meets the requirements of EIA standard RS-422
High output drive capability for 100Ω terminated
transmission lines
Connection and Logic Diagrams
16-Lead Dual-In-Line Package
DS009614-2
FIGURE 1. Logic Symbol
20-Lead Ceramic Leadless Chip Carrier (E)
DS009614-1
Top View
For Complete Military Product Specifications,
refer to the appropriate SMD or MDS.
Order Number DS26F31ME/883, DS26F31MJ/883, or
DS26F31MW/883
See NS Package Numbers E20A, J16A, or W16A
DS009614-7
TRI-STATE ® is a registered trademark of National Semiconductor Corporation.
© 1999 National Semiconductor Corporation
DS009614
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DS26F31MQuad High Speed Differential Line Drivers
May 1999
Absolute Maximum Ratings (Note 2)
Supply Voltage
Input Voltage
Output Voltage
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
7.0V
7.0V
5.5V
Operating Range
Storage Temperature Range
Ceramic DIP
−65˚C to +175˚C
Lead Temperature
Ceramic DIP (Soldering, 60 sec.)
300˚C
Maximum Power (Note 1) Dissipation at 25˚C
Cavity Package
1500 mW
DS26F31M
Temperature
Supply Voltage
−55˚C to +125˚C
4.5V to 5.5V
Note 1: Derate cavity package 10 mW/˚C above 25˚C.
Electrical Characteristics (Notes 3, 4)
over operating range, unless otherwise specified
Symbol
Parameter
VOH
Output Voltage HIGH
V
CC
VOL
Output Voltage LOW
V
CC
VIH
Input Voltage HIGH
V
CC
VIL
Input Voltage LOW
V
CC
CC
Conditions
= Min, IOH = −20 mA
= Min, IOL = 20 mA
= Min
IIL
Input Current LOW
V
Input Current HIGH
V
CC
IIR
Input Reverse Current
V
CC
Off State (High Impedance)
VCC = Max
VIC
Input Clamp Voltage
V
CC
Output Short Circuit
V
CC
ICCX
Supply Current
V
CC
V
CC
ICC
tPLH
tPHL
= Min, II = −18 mA
= Max (Note 5)
= Max, All Outputs Disabled
V
0.8
V
−0.10
−0.20
mA
0.5
20
µA
0.001
0.1
mA
0.5
20
µA
0.5
−20
V
2.0
V
−1.5
V
mA
50
mA
40
mA
10
15
ns
10
15
ns
2.0
4.5
ns
= 5.0V, TA = 25˚C,
=
10 pF
L
V CC = 5.0V, TA = 25˚C,
C L = 10 pF
23
32
ns
15
25
ns
V CC = 5.0V, TA = 25˚C,
Load = (Note 6)
V CC = 5.0V, TA = 25˚C,
Load = (Note 6)
20
30
ns
23
32
ns
CC
−30
= Max, All Outputs Enabled
= 5.0V, TA = 25˚C,
Input to Output
Enable to Output
0.5
0.32
−150
Load = (Notes 6, 7)
V CC = 5.0V, TA = 25˚C,
tLZ
Units
−60
V
Output to Output
Max
−0.8
Input to Output
SKEW
3.2
VO = 2.5V
VO = 0.5V
Output Current
IOS
Typ
2.5
= Max
= Max, VI = 0.4V
= Max, VI = 2.7V
= Max, VI = 7.0V
IIH
IOZ
Min
Load = (Note 6)
V CC = 5.0V, TA = 25˚C,
Load = (Notes 6, 7)
V
CC
C
tHZ
Enable to Output
tZL
Enable to Output
tZH
Enable to Output
Note 2: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices
should be operated at these limits. The tables of “Electrical Characteristics” provide conditions for actual device operation.
Note 3: Unless otherwise specified min/max limits apply across the −55˚C to +125˚C temperature range for the DS26F31M and across the O˚C to +70˚C range for
the DS26F31C. All typicals are given for V CC = 5V and TA = 25˚C.
Note 4: All currents into the device pins are positive; all currents out of the device pins are negative. All voltages are referenced to ground unless otherwise specified.
Note 5: Only one output at a time should be shorted.
Note 6: CL = 30 pF, V I = 1.3V to VO = 1.3V, VPULSE = 0V to +3V (See AC Load Test Circuit for TRI-STATE Outputs).
Note 7: Skew is defined as the difference in propagation delays between complementary outputs at the 50% point.
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2
Test Circuit and Timing Waveforms
DS009614-3
FIGURE 2. AC Load Test Circuit for TRI-STATE Outputs
DS009614-4
FIGURE 3. Propagation Delay (Notes 2, 4)
DS009614-5
FIGURE 4. Enable and Disable Times (Notes 3, 4)
Note 8: Diagram shown for Enable Low. Switches S1 and S2 open.
Note 9: S1 and S2 of Load Circuit are closed except where shown.
Note 10: Pulse Generator for all Pulses: Rate ≤ 1.0 MHz, ZO = 50Ω, tr ≤ 6.0 ns, tf ≤ 6.0 ns.
Note 11: CL includes probe and jig capacitance.
Typical Application
DS009614-6
FIGURE 5. Typical Application
3
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Physical Dimensions
inches (millimeters) unless otherwise noted
20-Lead Ceramic Leadless Chip Carrier (E)
DS26F31ME/883
NS Package Number E20A
16-Lead Ceramic Dual-In-Line Package (J)
DS26F31MJ/883
NS Package Number J16A
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4
DS26F31MQuad High Speed Differential Line Drivers
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
16-Lead Ceramic Flatpak (W)
DS26F31MW/883
NS Package Number W16A
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