LMC555 CMOS Timer General Description Features The LMC555 is a CMOS version of the industry standard 555 series general purpose timers. In addition to the standard package (SOIC, MSOP, and MDIP) the LMC555 is also available in a chip sized package (8 Bump micro SMD) using National’s micro SMD package technology. The LMC555 offers the same capability of generating accurate time delays and frequencies as the LM555 but with much lower power dissipation and supply current spikes. When operated as a one-shot, the time delay is precisely controlled by a single external resistor and capacitor. In the stable mode the oscillation frequency and duty cycle are accurately set by two external resistors and one capacitor. The use of National Semiconductor’s LMCMOS™ process extends both the frequency range and low supply capability. n n n n n n n n n n Less than 1 mW typical power dissipation at 5V supply 3 MHz astable frequency capability 1.5V supply operating voltage guaranteed Output fully compatible with TTL and CMOS logic at 5V supply Tested to −10 mA, +50 mA output current levels Reduced supply current spikes during output transitions Extremely low reset, trigger, and threshold currents Excellent temperature stability Pin-for-pin compatible with 555 series of timers Available in 8-pin MSOP Package and 8-Bump micro SMD package Pulse Width Modulator 00866915 00866920 Ordering Information Package Temperature Range Package Marking Transport Media NSC Drawing Industrial −40˚C to +85˚C 8-Pin Small Outline (SO) LMC555CM LMC555CMX 8-Pin Mini Small Outline (MSOP) LMC555CMM LMC555CMMX 8-Pin Molded Dip (MDIP) LMC555CN 8-Bump micro SMD LMC555CBP LMC555CBPX 8-Bump micro SMD NOPB LMC555CTP LMC555CTPX LMC555CM ZC5 LMC555CN F1 F02 Rails 2.5k Units Tape and Reel 1k Units Tape and Reel 3.5k Units Tape and Reel Rails 250 Units Tape and Reel 3k Units Tape and Reel 250 Units Tape and Reel 3k Units Tape and Reel M08A MUA08A N08E BPA08EFB TPA08EFA Note: See Mil-datasheet MNLMC555-X for specifications on the military device LMC555J/883. LMCMOS™ is a trademark of National Semiconductor Corp. © 2006 National Semiconductor Corporation DS008669 www.national.com LMC555 CMOS Timer May 2006 LMC555 Connection Diagrams 8-Pin SOIC, MSOP, MDIP 00866901 Top View 8-Bump micro SMD 00866909 Top View (Bump Side Down) www.national.com 2 LMC555 Absolute Maximum Ratings (Notes 2, 3) Thermal Resistance (θJA) (Note 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. SO, 8-Pin Small Outline 169˚C/W MSOP, 8-Pin Mini Small Outline 225˚C/W MDIP, 8-Pin Molded Dip 111˚C/W 8-Bump micro SMD 220˚C/W Supply Voltage, V+ 15V Input Voltages, VTRIG, VRES, VCTRL, VTHRESH −0.3V to VS + 0.3V Output Voltages, VO, VDIS 15V Output Current IO, IDIS 100 mA Storage Temperature Range −65˚C to +150˚C Maximum Allowable Power Dissipation @25˚C Soldering Information MDIP Soldering (10 seconds) 260˚C SOIC, MSOP Vapor Phase (60 sec) 215˚C SOIC, MSOP Infrared (15 sec) 220˚C MDIP-8 Note: See AN-450 “Surface Mounting Methods and Their Effect on Product Reliability” for other methods of soldering surface mount devices. 740 mW MSOP-8 555 mW 8 Bump micro SMD Operating Ratings(Notes 2, 3) Termperature Range 1126 mW SO-8 568 mW −40˚C to +85˚C Electrical Characteristics (Notes 1, 2) Test Circuit, T = 25˚C, all switches open, RESET to VS unless otherwise noted Symbol Parameter IS Supply Current VCTRL Control Voltage Conditions Min VS = 1.5V VS = 5V VS = 12V VS = 1.5V VS = 5V VS = 12V 0.8 2.9 7.4 Typ Max Units (Limits) 50 100 150 150 250 400 µA 1.0 3.3 8.0 1.2 3.8 8.6 V VDIS Discharge Saturation Voltage VS = 1.5V, IDIS = 1 mA VS = 5V, IDIS = 10 mA 75 150 150 300 mV VOL Output Voltage (Low) 0.2 0.3 1.0 0.4 0.6 2.0 V VS = 1.5V, IO = 1 mA VS = 5V, IO = 8 mA VS = 12V, IO = 50 mA Output Voltage (High) VS = 1.5V, IO = −0.25 mA VS = 5V, IO = −2 mA VS = 12V, IO = −10 mA 1.0 4.4 10.5 1.25 4.7 11.3 VTRIG Trigger Voltage VS = 1.5V VS = 12V 0.4 3.7 0.5 4.0 ITRIG Trigger Current VS = 5V VRES Reset Voltage VS = 1.5V (Note 4) VS = 12V 0.4 0.4 0.7 0.75 IRES Reset Current VS = 5V 10 ITHRESH Threshold Current VS = 5V 10 IDIS Discharge Leakage VS = 12V 1.0 100 t Timing Accuracy SW 2, 4 Closed VS = 1.5V VS = 5V VS = 12V 1.1 1.1 1.1 1.25 1.20 1.25 VOH ∆t/∆VS Timing Shift with Supply V 0.6 4.3 10 0.9 1.0 1.0 VS = 5V ± 1V 0.3 3 V pA 1.0 1.1 V pA pA nA ms %/V www.national.com LMC555 Electrical Characteristics (Notes 1, 2) Test Circuit, T = 25˚C, all switches open, RESET to VS unless otherwise noted (Continued) Symbol Parameter Conditions Min ∆t/∆T Timing Shift with Temperature fA Astable Frequency SW 1, 3 Closed, VS = 12V fMAX Maximum Frequency Max. Freq. Test Circuit, VS = 5V 3.0 MHz t R , tF Output Rise and Fall Times Max. Freq. Test Circuit VS = 5V, CL = 10 pF 15 ns tPD Trigger Propagation Delay VS = 5V, Measure Delay from Trigger to Output 100 ns VS = 5V −40˚C ≤ T ≤ +85˚C Typ Max 75 4.0 4.8 Units (Limits) ppm/˚C 5.6 kHz Note 1: All voltages are measured with respect to the ground pin, unless otherwise specified. Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit is given, however, the typical value is a good indication of device performance. Note 3: See AN-450 for other methods of soldering surface mount devices, and also AN-1112 for micro SMD considerations. Note 4: If the RESET pin is to be used at temperatures of −20˚C and below VS is required to be 2.0V or greater. Note 5: For device pinout please refer to table 1 Test Circuit (Note 5) Maximum Frequency Test Circuit (Note 5) 00866903 00866902 TABLE 1. Package Pinout Names vs. Pin Function Pin Function www.national.com Package Pin numbers 8-Pin SO, MSOP, and MDIP 8-Bump micro SMD GND 1 A3 Trigger 2 B3 Output 3 C3 Reset 4 C2 Control Voltage 5 C1 Threshold 6 B1 Discharge 7 A1 V+ 8 A2 4 MONOSTABLE OPERATION In this mode of operation, the timer functions as a one-shot (Figure 1). The external capacitor is initially held discharged by internal circuitry. Upon application of a negative trigger pulse of less than 1/3 VS to the Trigger terminal, the flip-flop is set which both releases the short circuit across the capacitor and drives the output high. Note: In monstable operation, the trigger should be driven high before the end of timing cycle. 00866911 00866904 FIGURE 3. Time Delay FIGURE 1. Monostable (One-Shot) The voltage across the capacitor then increases exponentially for a period of tH = 1.1 RAC, which is also the time that the output stays high, at the end of which time the voltage equals 2/3 VS. The comparator then resets the flip-flop which in turn discharges the capacitor and drives the output to its low state. Figure 2 shows the waveforms generated in this mode of operation. Since the charge and the threshold level of the comparator are both directly proportional to supply voltage, the timing internal is independent of supply. ASTABLE OPERATION If the circuit is connected as shown in Figure 4 (Trigger and Threshold terminals connected together) it will trigger itself and free run as a multivibrator. The external capacitor charges through RA + RB and discharges through RB. Thus the duty cycle may be precisely set by the ratio of these two resistors. 00866910 VCC = 5V Top Trace: Input 5 V/Div. TIME = 0.1 ms/Div. RA = 9.1 kΩ 00866905 Middle Trace: Output 5 V/Div. Bottom Trace: Capacitor Voltage 2 V/Div. FIGURE 4. Astable (Variable Duty Cycle Oscillator) C = 0.01 µF In this mode of operation, the capacitor charges and discharges between 1/3 VS and 2/3 VS. As in the triggered mode, the charge and discharge times, and therefore the frequency are independent of the supply voltage. Figure 5 shows the waveform generated in this mode of operation. FIGURE 2. Monostable Waveforms Reset overrides Trigger, which can override threshold. Therefore the trigger pulse must be shorter than the desired tH. The minimum pulse width for the Trigger is 20ns, and it is 400ns for the Reset. During the timing cycle when the output is high, the further application of a trigger pulse will not effect the circuit so long as the trigger input is returned high at least 10µs before the end of the timing interval. However the circuit can be reset during this time by the application of a 5 www.national.com LMC555 negative pulse to the reset terminal. The output will then remain in the low state until a trigger pulse is again applied. When the reset function is not use, it is recommended that it be connected to V+ to avoid any possibility of false triggering. Figure 3 is a nomograph for easy determination of RC values for various time delays. Application Information LMC555 Application Information FREQUENCY DIVIDER (Continued) The monostable circuit of Figure 1 can be used as a frequency divider by adjusting the length of the timing cycle. Figure 7 shows the waveforms generated in a divide by three circuit. 00866912 VCC = 5V Top Trace: Output 5 V/Div. TIME = 20 µs/Div. Bottom Trace: Capacitor Voltage 1 V/Div. RA = 3.9 kΩ 00866914 RB = 9 kΩ VCC = 5V Top Trace: Input 4 V/Div. C = 0.01 µF TIME = 20 µs/Div. Middle Trace: Output 2 V/Div. RA = 9.1 kΩ Bottom Trace: Capacitor 2 V/Div. C = 0.01 µF FIGURE 5. Astable Waveforms The charge time (output high) is given by t1 = 0.693 (RA + RB)C And the discharge time (output low) by: t2 = 0.693 (RB)C Thus the total period is: T = t1 + t2 = 0.693 (RA + RB)C FIGURE 7. Frequency Divider Waveforms PULSE WIDTH MODULATOR When the timer is connected in the monostable mode and triggered with a continuous pulse train, the output pulse width can be modulated by a signal applied to the Control Voltage Terminal. Figure 8 shows the circuit, and in Figure 9 are some waveform examples. The frequency of oscillation is: Figure 6 may be used for quick determination of these RC Values. The duty cycle, as a fraction of total period that the output is low, is: 00866920 FIGURE 8. Pulse Width Modulator 00866913 FIGURE 6. Free Running Frequency www.national.com 6 LMC555 Application Information (Continued) 00866916 VCC = 5V TIME = 0.1 ms/Div. 00866915 VCC = 5V Top Trace: Modulation 1 V/Div. TIME = 0.2 ms/Div. Top Trace: Modulation Input 1 V/Div. Bottom Trace: Output Voltage 2 V/Div. RA = 3.9 kΩ Bottom Trace: Output Voltage 2 V/Div. RB = 3 kΩ RA = 9.1 kΩ C = 0.01 µF C = 0.01 µF FIGURE 11. Pulse Position Modulator Waveforms FIGURE 9. Pulse Width Modulator Waveforms 50% DUTY CYCLE OSCILLATOR The frequency of oscillation is f = 1/(1.4 RCC) PULSE POSITION MODULATOR This application uses the timer connected for astable operation, as in Figure 10, with a modulating signal again applied to the control voltage terminal. The pulse position varies with the modulating signal, since the threshold voltage and hence the time delay is varied. Figure 11 shows the waveforms generated for a triangle wave modulation signal. 00866906 FIGURE 12. 50% Duty Cycle Oscillator 00866921 FIGURE 10. Pulse Position Modulator micro SMD Marking Orientation Top View 00866923 Bumps are numbered counter-clockwise 7 www.national.com LMC555 Physical Dimensions inches (millimeters) unless otherwise noted Molded Small Outline (SO) Package (M) NS Package Number M08A 8-Pin (0.118” Wide) Molded Mini Small Outline Package NS Package Number MUA08A www.national.com 8 LMC555 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Molded Dual-in-line Package (N) NS Package Number N08E 9 www.national.com LMC555 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) NOTES: UNLESS OTHERWISE SPECIFIED 1. EPOXY COATING 2. 63Sn/37Pb EUTECTIC BUMP 3. RECOMMEND NON-SOLDER MASK DEFINED LANDING PAD. 4. PIN A1 IS ESTABLISHED BY LOWER LEFT CORNER WITH RESPECT TO TEXT ORIENTATION. REMAINING PINS ARE NUMBERED COUNTERCLOCKWISE. 5. XXX IN DRAWING NUMBER REPRESENTS PACKAGE SIZE VARIATION WHERE X1 IS PACKAGE WIDTH, X2 IS PACKAGE LENGTH AND X3 IS PACKAGE HEIGHT. 6. REFERENCE JEDEC REGISTRATION MO-211, VARIATION BC. 8-Bump micro SMD Package NS Package Number BPA08EFB X1 = 1.387 X2 = 1.412 X3 = 0.850 www.national.com 10 LMC555 CMOS Timer Physical Dimensions inches (millimeters) unless otherwise noted (Continued) NOTES: UNLESS OTHERWISE SPECIFIED 1. EPOXY COATING 2. FOR SOLDER BUMP COMPOSITION, SEE “SOLDER INFORMATION” IN THE PACKAGING SECTION OF THE NATIONAL SEMICONDUCTOR WEB PAGE (www.national.com). 3. RECOMMEND NON-SOLDER MASK DEFINED LANDING PAD. 4. PIN A1 IS ESTABLISHED BY LOWER LEFT CORNER WITH RESPECT TO TEXT ORIENTATION. 5. XXX IN DRAWING NUMBER REPRESENTS PACKAGE SIZE VARIATION WHERE X1 IS PACKAGE WIDTH, X2 IS PACKAGE LENGTH AND X3 IS PACKAGE HEIGHT. 6. REFERENCE JEDEC REGISTRATION MO-211, VARIATION BC. 8-Bump micro SMD Package NS Package Number TPA08EFA X1 = 1.387 X2 = 1.412 X3 = 0.500 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. For the most current product information visit us at www.national.com. LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. BANNED SUBSTANCE COMPLIANCE National Semiconductor follows the provisions of the Product Stewardship Guide for Customers (CSP-9-111C2) and Banned Substances and Materials of Interest Specification (CSP-9-111S2) for regulatory environmental compliance. Details may be found at: www.national.com/quality/green. Lead free products are RoHS compliant. National Semiconductor Americas Customer Support Center Email: [email protected] Tel: 1-800-272-9959 National Semiconductor Europe Customer Support Center Fax: +49 (0) 180-530 85 86 Email: [email protected] Deutsch Tel: +49 (0) 69 9508 6208 English Tel: +44 (0) 870 24 0 2171 Français Tel: +33 (0) 1 41 91 8790 National Semiconductor Asia Pacific Customer Support Center Email: [email protected] National Semiconductor Japan Customer Support Center Fax: 81-3-5639-7507 Email: [email protected] LMC555 CMOS Timer www.national.com Tel: 81-3-5639-7560