SM72480 SolarMagic 1.6V, LLP-6 Factory Preset Temperature Switch and Temperature Sensor General Description Features The SM72480 is a low-voltage, precision, dual-output, lowpower temperature switch and temperature sensor. The temperature trip point (TTRIP) is set at the factory to be 120°C. Built-in temperature hysteresis (THYST) keeps the output stable in an environment of temperature instability. In normal operation the SM72480 temperature switch outputs assert when the die temperature exceeds TTRIP. The temperature switch outputs will reset when the temperature falls below a temperature equal to (TTRIP − THYST). The OVERTEMP digital output, is active-high with a push-pull structure, while the OVERTEMP digital output, is active-low with an open-drain structure. The analog output, VTEMP, delivers an analog output voltage with Negative Temperature Coefficient — NTC. Driving the TRIP TEST input high: (1) causes the digital outputs to be asserted for in-situ verification and, (2) causes the threshold voltage to appear at the VTEMP output pin, which could be used to verify the temperature trip point. The SM72480's low minimum supply voltage makes it ideal for 1.8 volt system designs. Its wide operating range, low supply current , and excellent accuracy provide a temperature switch solution for a wide range of commercial and industrial applications. ■ Renewable Energy Grade ■ Low 1.6V operation ■ Latching function: device can latch the Over Temperature ■ ■ ■ ■ ■ condition Push-pull and open-drain temperature switch outputs Very linear analog VTEMP temperature sensor output VTEMP output short-circuit protected 2.2 mm by 2.5 mm (typ) LLP-6 package Excellent power supply noise rejection Key Specifications ■ Supply Voltage ■ Supply Current ■ Accuracy, Trip Point 1.6V to 5.5V 8 μA (typ) 0°C to 150°C ±2.2°C 0°C to 150°C ±2.3°C Temperature ■ Accuracy, VTEMP ■ VTEMP Output Drive ■ Operating Temperature ■ Hysteresis Temperature ±100 μA −50°C to 150°C 4.5°C to 5.5°C Applications ■ ■ ■ ■ ■ PV Power Optimizers Wireless Transceivers Battery Management Automotive Disk Drives Connection Diagram Typical Transfer Characteristic LLP-6 VTEMP Analog Voltage vs Die Temperature 30142001 Top View See NS Package Number SDB06A 30142024 © 2011 National Semiconductor Corporation 301420 www.national.com SM72480 SolarMagic 1.6V, LLP-6 Factory Preset Temperature Switch and Temperature Sensor May 11, 2011 SM72480 Block Diagram 30142003 Pin Descriptions Pin No. 1 5 3 Name TRIP TEST OVERTEMP OVERTEMP www.national.com Type Equivalent Circuit Description Digital Input TRIP TEST pin. Active High input. If TRIP TEST = 0 (Default) then: VTEMP = VTS, Temperature Sensor Output Voltage If TRIP TEST = 1 then: OVERTEMP and OVERTEMP outputs are asserted and VTEMP = VTRIP, Temperature Trip Voltage. This pin may be left open if not used. Digital Output Over Temperature Switch output Active High, Push-Pull Asserted when the measured temperature exceeds the Trip Point Temperature or if TRIP TEST = 1 This pin may be left open if not used. Digital Output Over Temperature Switch output Active Low, Open-drain (See Section 2.1 regarding required pull-up resistor.) Asserted when the measured temperature exceeds the Trip Point Temperature or if TRIP TEST = 1 This pin may be left open if not used. 2 6 Name VTEMP Type Equivalent Circuit Description Analog Output VTEMP Analog Voltage Output If TRIP TEST = 0 then VTEMP = VTS, Temperature Sensor Output Voltage If TRIP TEST = 1 then VTEMP = VTRIP, Temperature Trip Voltage This pin may be left open if not used. 4 VDD Power Positive Supply Voltage 2 GND Ground Power Supply Ground DAP Die Attach Pad SM72480 Pin No. The best thermal conductivity between the device and the PCB is achieved by soldering the DAP of the package to the thermal pad on the PCB. The thermal pad can be a floating node. However, for improved noise immunity the thermal pad should be connected to the circuit GND node, preferably directly to pin 2 (GND) of the device. Typical Application 30142002 3 www.national.com SM72480 Ordering Information Order Number Temperature Trip Point, °C Description NS Package Number Package Marking SM72480SD-125 125°C 6–pin LLP SDB06A 299 1000 Units on Tape and Reel SM72480SDE-125 125°C 6–pin LLP SDB06A 299 250 Units on Tape and Reel SM72480SDX-125 125°C 6–pin LLP SDB06A 299 4500 Units on Tape and Reel SM72480SD-120 120°C 6–pin LLP SDB06A S80 1000 Units on Tape and Reel SM72480SDE-120 120°C 6–pin LLP SDB06A S80 250 Units on Tape and Reel SM72480SDX-120 120°C 6–pin LLP SDB06A S80 4500 Units on Tape and Reel SM72480SD-105 105°C 6–pin LLP SDB06A 701 1000 Units on Tape and Reel SM72480SDE-105 105°C 6–pin LLP SDB06A 701 250 Units on Tape and Reel SM72480SDX-105 105°C 6–pin LLP SDB06A 701 4500 Units on Tape and Reel www.national.com 4 Transport Media Operating Ratings (Note 1) Specified Temperature Range: Supply Voltage −0.3V to +6.0V Voltage at OVERTEMP pin −0.3V to +6.0V Voltage at OVERTEMP and VTEMP pins −0.3V to (VDD + 0.5V) TRIP TEST Input Voltage −0.3V to (VDD + 0.5V) Output Current, any output pin ±7 mA Input Current at any pin (Note 2) 5 mA Storage Temperature −65°C to +150°C Maximum Junction Temperature TJ(MAX) +155°C ESD Susceptibility (Note 3) : Human Body Model 4500V Machine Model 300V Charged Device Model 1000V For soldering specifications: see product folder at www.national.com and www.national.com/ms/MS/MSSOLDERING.pdf TMIN ≤ TA ≤ TMAX −50°C ≤ TA ≤ +150°C SM72480 Supply Voltage Range (VDD) +1.6 V to +5.5 V Thermal Resistance (θJA) (Note 4) LLP-6 (Package SDB06A) 152 °C/W Accuracy Characteristics Trip Point Accuracy Parameter Conditions Trip Point Accuracy (Note 7) 0°C − 150°C VDD = 5.0 V Limits (Note 6) Units (Limit) ±2.2 °C (max) VTEMP Analog Temperature Sensor Output Accuracy The limits do not include DC load regulation. The stated accuracy limits are with reference to the values in the SM72480 Conversion Table. Parameter VTEMP Temperature Accuracy (Note 7) VTEMP Temperature Accuracy Limits (Note 6) Conditions Trip Point 125°C or 120°C Trip Point 105°C TA = 20°C to 40°C VDD = 2.3 to 5.5 V ±1.8 TA = 0°C to 70°C VDD = 2.5 to 5.5 V ±2.0 TA = 0°C to 90°C VDD = 2.5 to 5.5 V ±2.1 TA = 0°C to 120°C VDD = 2.5 to 5.5 V ±2.2 TA = 0°C to 150°C VDD = 2.5 to 5.5 V ±2.3 TA = –50°C to 0°C VDD = 3.0 to 5.5 V ±1.7 TA = 20°C to 40°C VDD = 1.8 to 5.5 V ±1.8 TA = 0°C to 70°C VDD = 1.9 to 5.5 V ±2.0 TA = 0°C to 90°C VDD = 1.9 to 5.5 V ±2.1 TA = 0°C to 120°C VDD = 1.9 to 5.5 V ±2.2 TA = 0°C to 150°C VDD = 1.9 to 5.5 V ±2.3 TA = −50°C to 0°C VDD = 2.3 to 5.5 V ±1.7 5 Units (Limit) °C (max) (Note 7) °C (max) www.national.com SM72480 Absolute Maximum Ratings (Note 1) SM72480 Electrical Characteristics Unless otherwise noted, these specifications apply for +VDD = +1.6V to +5.5V. Boldface limits apply for TA = TJ = TMIN to TMAX ; all other limits TA = TJ = 25°C. Symbol Typical (Note 5) Limits (Note 6) Units (Limit) Quiescent Power Supply Current 8 16 μA (max) Hysteresis 5 5.5 °C (max) 4.5 °C (Min) VDD − 0.2V V (min) VDD − 0.45V V (min) Parameter Conditions GENERAL SPECIFICATIONS IS OVERTEMP DIGITAL OUTPUT VOH Logic "1" Output Voltage ACTIVE HIGH, PUSH-PULL VDD ≥ 1.6V Source ≤ 340 μA VDD ≥ 2.0V Source ≤ 498 μA VDD ≥ 3.3V Source ≤ 780 μA VDD ≥ 1.6V Source ≤ 600 μA VDD ≥ 2.0V Source ≤ 980 μA VDD ≥ 3.3V Source ≤ 1.6 mA BOTH OVERTEMP and OVERTEMP DIGITAL OUTPUTS VOL Logic "0" Output Voltage OVERTEMP DIGITAL OUTPUT Logic "1" Output Leakage Current (Note 10) IOH VDD ≥ 1.6V Sink ≤ 385 μA VDD ≥ 2.0V Sink ≤ 500 μA VDD ≥ 3.3V Sink ≤ 730 μA VDD ≥ 1.6V Sink ≤ 690 μA VDD ≥ 2.0V Sink ≤ 1.05 mA VDD ≥ 3.3V Sink ≤ 1.62 mA 0.2 V (max) 0.45 ACTIVE LOW, OPEN DRAIN TA = 30 °C 0.001 TA = 150 °C 0.025 1 μA (max) VTEMP ANALOG TEMPERATURE SENSOR OUTPUT VTEMP Sensor Gain Trip Point = 105°C Trip Point = 125°C or 120°C Source ≤ 90 μA 1.6V ≤ VDD < 1.8V (VDD − VTEMP) ≥ 200 mV Sink ≤ 100 μA VTEMP ≥ 260 mV VTEMP Load Regulation (Note 9) Source ≤ 120 μA VDD ≥ 1.8V (VDD − VTEMP) ≥ 200 mV Sink ≤ 200 μA VTEMP ≥ 260 mV Source or Sink = 100 μA VDD Supply- to-VTEMP DC Line Regulation (Note 11) CL www.national.com VTEMP Output Load Capacitance VDD = +1.6V to +5.5V Without series resistor. See Section 4.2 6 -7.7 mV/°C −10.3 mV/°C −0.1 −1 mV (max) 0.1 1 mV (max) −0.1 −1 mV (max) 0.1 1 mV (max) 1 Ohm 0.29 mV 74 μV/V −82 dB 1100 pF (max) Unless otherwise noted, these specifications apply for +VDD = +1.6V to +5.5V. Boldface limits apply for TA = TJ = TMIN to TMAX ; all other limits TA = TJ = 25°C. Symbol Parameter Conditions Typical (Note 5) Limits (Note 6) Units (Limit) VDD− 0.5 V (min) TRIP TEST DIGITAL INPUT VIH Logic "1" Threshold Voltage VIL Logic "0" Threshold Voltage 0.5 V (max) IIH Logic "1" Input Current 1.5 2.5 μA (max) IIL Logic "0" Input Current (Note 10) 0.001 1 μA (max) 1.1 2.3 ms (max) 1.0 2.9 ms (max) TIMING tEN tVTEMP Time from Power On to Digital Output Enabled. See definition below. Time from Power On to Analog Temperature Valid. See definition below. VTEMP CL = 0 pF to 1100 pF Definitions of tEN and tVTEMP 30142051 30142050 Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. Note 2: When the input voltage (VI) at any pin exceeds power supplies (VI < GND or VI > VDD), the current at that pin should be limited to 5 mA. Note 3: The Human Body Model (HBM) is a 100 pF capacitor charged to the specified voltage then discharged through a 1.5 kΩ resistor into each pin. The Machine Model (MM) is a 200 pF capacitor charged to the specified voltage then discharged directly into each pin. The Charged Device Model (CDM) is a specified circuit characterizing an ESD event that occurs when a device acquires charge through some triboelectric (frictional) or electrostatic induction processes and then abruptly touches a grounded object or surface. Note 4: The junction to ambient temperature resistance (θJA) is specified without a heat sink in still air. Note 5: Typicals are at TJ = TA = 25°C and represent most likely parametric norm. Note 6: Limits are guaranteed to National's AOQL (Average Outgoing Quality Level). Note 7: Accuracy is defined as the error between the measured and reference output voltages, tabulated in the Conversion Table at the specified conditions of supply gain setting, voltage, and temperature (expressed in °C). Accuracy limits include line regulation within the specified conditions. Accuracy limits do not include load regulation; they assume no DC load. Note 8: Changes in output due to self heating can be computed by multiplying the internal dissipation by the temperature resistance. Note 9: Source currents are flowing out of the SM72480. Sink currents are flowing into the SM72480. Note 10: The 1 µA limit is based on a testing limitation and does not reflect the actual performance of the part. Expect to see a doubling of the current for every 15°C increase in temperature. For example, the 1 nA typical current at 25°C would increase to 16 nA at 85°C. Note 11: Line regulation (DC) is calculated by subtracting the output voltage at the highest supply voltage from the output voltage at the lowest supply voltage. The typical DC line regulation specification does not include the output voltage shift discussed in Section 4.3. Note 12: The curves shown represent typical performance under worst-case conditions. Performance improves with larger overhead (VDD − VTEMP), larger VDD, and lower temperatures. Note 13: The curves shown represent typical performance under worst-case conditions. Performance improves with larger VTEMP, larger VDD and lower temperatures. 7 www.national.com SM72480 Electrical Characteristics SM72480 Typical Performance Characteristics VTEMP Output Temperature Error vs. Temperature Minimum Operating Temperature vs. Supply Voltage 30142007 30142006 Supply Current vs. Temperature Supply Current vs. Supply Voltage 30142004 30142005 VTEMP Supply-Noise Rejection vs. Frequency Line Regulation VTEMP vs. Supply Voltage Trip Points 120°C 30142043 30142036 www.national.com 8 Die Temp., °C The SM72480 has a factory-set gain, which is dependent on the Temperature Trip Point. The VTEMP temperature sensor voltage, in millivolts, at each discrete die temperature over the complete operating range is shown in the conversion table below. VTEMP Temperature Sensor Output Voltage vs Die Temperature Conversion Table The VTEMP temperature sensor output voltage, in mV, vs Die Temperature, in °C for the gain corresponding to the temperature trip point. VDD = 5.0V. VTEMP, Analog Output Voltage, mV Die Temp., TTRIP = TTRIP = 105°C °C 125 or 120°C VTEMP, Analog Output Voltage, mV TTRIP = 125 or 120°C TTRIP = 105°C −13 2252 1690 −12 2242 1682 −11 2232 1674 −10 2222 1667 −9 2212 1659 −8 2202 1652 −7 2192 1644 −6 2182 1637 −5 2171 1629 −4 2161 1621 −3 2151 1614 −50 2623 1967 −2 2141 1606 −49 2613 1960 −1 2131 1599 −48 2603 1952 0 2121 1591 2111 1583 −47 2593 1945 1 −46 2583 1937 2 2101 1576 −45 2573 1930 3 2090 1568 2080 1561 −44 2563 1922 4 −43 2553 1915 5 2070 1553 −42 2543 1908 6 2060 1545 −41 2533 1900 7 2050 1538 −40 2523 1893 8 2040 1530 −39 2513 1885 9 2029 1522 −38 2503 1878 10 2019 1515 −37 2493 1870 11 2009 1507 −36 2483 1863 12 1999 1499 −35 2473 1855 13 1989 1492 1978 1484 −34 2463 1848 14 −33 2453 1840 15 1968 1477 −32 2443 1833 16 1958 1469 −31 2433 1825 17 1948 1461 −30 2423 1818 18 1938 1454 −29 2413 1810 19 1927 1446 −28 2403 1803 20 1917 1438 −27 2393 1795 21 1907 1431 −26 2383 1788 22 1897 1423 −25 2373 1780 23 1886 1415 1876 1407 −24 2363 1773 24 −23 2353 1765 25 1866 1400 −22 2343 1757 26 1856 1392 1845 1384 −21 2333 1750 27 −20 2323 1742 28 1835 1377 −19 2313 1735 29 1825 1369 −18 2303 1727 30 1815 1361 −17 2293 1720 31 1804 1354 −16 2283 1712 32 1794 1346 −15 2272 1705 33 1784 1338 −14 2262 1697 34 1774 1331 9 www.national.com SM72480 1.0 SM72480 VTEMP vs Die Temperature Conversion Table SM72480 Die Temp., °C VTEMP, Analog Output Voltage, mV TTRIP = 125 or 120°C TTRIP = 105°C Die Temp., °C 35 1763 1323 36 1753 1315 37 1743 38 1732 39 VTEMP, Analog Output Voltage, mV TTRIP = 125 or 120°C TTRIP = 105°C 83 1264 949 84 1254 941 1307 85 1243 933 1300 86 1233 925 1722 1292 87 1222 917 40 1712 1284 88 1212 909 41 1701 1276 89 1201 901 42 1691 1269 90 1191 894 43 1681 1261 91 1180 886 44 1670 1253 92 1170 878 45 1660 1245 93 1159 870 46 1650 1238 94 1149 862 47 1639 1230 95 1138 854 48 1629 1222 96 1128 846 49 1619 1214 97 1117 838 50 1608 1207 98 1106 830 51 1598 1199 99 1096 822 52 1588 1191 100 1085 814 53 1577 1183 101 1075 807 54 1567 1176 102 1064 799 55 1557 1168 103 1054 791 56 1546 1160 104 1043 783 57 1536 1152 105 1032 775 58 1525 1144 106 1022 767 59 1515 1137 107 1011 759 60 1505 1129 108 1001 751 61 1494 1121 109 990 743 62 1484 1113 110 979 735 63 1473 1105 111 969 727 64 1463 1098 112 958 719 65 1453 1090 113 948 711 66 1442 1082 114 937 703 67 1432 1074 115 926 695 68 1421 1066 116 916 687 69 1411 1059 117 905 679 70 1400 1051 118 894 671 71 1390 1043 119 884 663 72 1380 1035 120 873 655 73 1369 1027 121 862 647 74 1359 1019 122 852 639 75 1348 1012 123 841 631 76 1338 1004 124 831 623 77 1327 996 125 820 615 78 1317 988 126 809 607 79 1306 980 127 798 599 80 1296 972 128 788 591 81 1285 964 129 777 583 82 1275 957 130 766 575 www.national.com 10 SM72480 Die Temp., °C VTEMP, Analog Output Voltage, mV TTRIP = 125 or 120°C TTRIP = 105°C 131 756 567 132 745 559 133 734 551 134 724 543 135 713 535 136 702 527 137 691 519 138 681 511 139 670 503 140 659 495 141 649 487 142 638 479 143 627 471 144 616 463 145 606 455 146 595 447 147 584 438 148 573 430 149 562 422 150 552 414 1.1.2 The First-Order Approximation (Linear) For a quicker approximation, although less accurate than the second-order, over the full operating temperature range the linear formula below can be used. Using this formula, with the constant and slope in the following set of equations, the bestfit VTEMP vs Die Temperature performance can be calculated with an approximation error less than 18 mV. VTEMP is in mV. 1.1.3 First-Order Approximation (Linear) over Small Temperature Range For a linear approximation, a line can easily be calculated over the desired temperature range from the Conversion Table using the two-point equation: Where V is in mV, T is in °C, T1 and V1 are the coordinates of the lowest temperature, T2 and V2 are the coordinates of the highest temperature. 1.1 VTEMP vs DIE TEMPERATURE APPROXIMATIONS The SM72480's VTEMP analog temperature output is very linear. The Conversion Table above and the equation in Section 1.1.1 represent the most accurate typical performance of the VTEMP voltage output vs Temperature. Using this method of linear approximation, the transfer function can be approximated for one or more temperature ranges of interest. 1.1.1 The Second-Order Equation (Parabolic) The data from the Conversion Table, or the equation below, when plotted, has an umbrella-shaped parabolic curve. VTEMP is in mV. 11 www.national.com SM72480 (1) We see that for VOL of 0.2 V the electrical specification for OVERTEMP shows a maximim isink of 385 µA. (2) Let iL= 1 µA, then iT is about 386 µA max. If we select 35 µA as the current limit then iT for the calculation becomes 35 µA (3) We notice that VDD(Max) is 3.3V + 0.3V = 3.6V and then calculate the pull-up resistor as RPull-up = (3.6 − 0.2)/35 µA = 97k (4) Based on this calculated value, we select the closest resistor value in the tolerance family we are using. In our example, if we are using 5% resistor values, then the next closest value is 100 kΩ. 2.0 OVERTEMP and OVERTEMP Digital Outputs The OVERTEMP Active High, Push-Pull Output and the OVERTEMP Active Low, Open-Drain Output both assert at the same time whenever the Die Temperature reaches the factory preset Temperature Trip Point. They also assert simultaneously whenever the TRIP TEST pin is set high. Both outputs de-assert when the die temperature goes below the Temperature Trip Point - Hysteresis. These two types of digital outputs enable the user the flexibility to choose the type of output that is most suitable for his design. Either the OVERTEMP or the OVERTEMP Digital Output pins can be left open if not used. 2.2 NOISE IMMUNITY The SM72480 is virtually immune from false triggers on the OVERTEMP and OVERTEMP digital outputs due to noise on the power supply. Test have been conducted showing that, with the die temperature within 0.5°C of the temperature trip point, and the severe test of a 3 Vpp square wave "noise" signal injected on the VDD line, over the VDD range of 2V to 5V, there were no false triggers. 2.1 OVERTEMP OPEN-DRAIN DIGITAL OUTPUT The OVERTEMP Active Low, Open-Drain Digital Output, if used, requires a pull-up resistor between this pin and VDD. The following section shows how to determine the pull-up resistor value. Determining the Pull-up Resistor Value 3.0 TRIP TEST Digital Input The TRIP TEST pin simply provides a means to test the OVERTEMP and OVERTEMP digital outputs electronically by causing them to assert, at any operating temperature, as a result of forcing the TRIP TEST pin high. When the TRIP TEST pin is pulled high the VTEMP pin will be at the VTRIP voltage. If not used, the TRIP TEST pin may either be left open or grounded. 4.0 VTEMP Analog Temperature Sensor Output The VTEMP push-pull output provides the ability to sink and source significant current. This is beneficial when, for example, driving dynamic loads like an input stage on an analogto-digital converter (ADC). In these applications the source current is required to quickly charge the input capacitor of the ADC. See the Applications Circuits section for more discussion of this topic. The SM72480 is ideal for this and other applications which require strong source or sink current. 30142052 The Pull-up resistor value is calculated at the condition of maximum total current, iT, through the resistor. The total current is: where, iT iL VOUT VDD(Max) 4.1 NOISE CONSIDERATIONS The SM72480's supply-noise rejection (the ratio of the AC signal on VTEMP to the AC signal on VDD) was measured during bench tests. It's typical attenuation is shown in the Typical Performance Characteristics section. A load capacitor on the output can help to filter noise. For operation in very noisy environments, some bypass capacitance should be present on the supply within approximately 2 inches of the SM72480. iT is the maximum total current through the Pull-up Resistor at VOL. iL is the load current, which is very low for typical digital inputs. VOUT is the Voltage at the OVERTEMP pin. Use VOL for calculating the Pull-up resistor. VDD(Max) is the maximum power supply voltage to be used in the customer's system. The pull-up resistor maximum value can be found by using the following formula: 4.2 CAPACITIVE LOADS The VTEMP Output handles capacitive loading well. In an extremely noisy environment, or when driving a switched sampling input on an ADC, it may be necessary to add some filtering to minimize noise coupling. Without any precautions, the VTEMP can drive a capacitive load less than or equal to 1100 pF as shown in Figure 1. For capacitive loads greater than 1100 pF, a series resistor is required on the output, as shown in Figure 2, to maintain stable conditions. EXAMPLE CALCULATION Suppose we have, for our example, a V DD of 3.3 V ± 0.3V, a CMOS digital input as a load, a VOL of 0.2 V. www.national.com 12 The SM72480 can be applied easily in the same way as other integrated-circuit temperature sensors. It can be glued or cemented to a surface. The best thermal conductivity between the device and the PCB is achieved by soldering the DAP of the package to the thermal pad on the PCB. The temperatures of the lands and traces to the other leads of the SM72480 will also affect the temperature reading. Alternatively, the SM72480 can be mounted inside a sealedend metal tube, and can then be dipped into a bath or screwed into a threaded hole in a tank. As with any IC, the SM72480 and accompanying wiring and circuits must be kept insulated and dry, to avoid leakage and corrosion. This is especially true if the circuit may operate at cold temperatures where condensation can occur. If moisture creates a short circuit from the VTEMP output to ground or VDD, the VTEMP output from the SM72480 will not be correct. Printed-circuit coatings are often used to ensure that moisture cannot corrode the leads or circuit traces. The thermal resistance junction-to-ambient (θJA) is the parameter used to calculate the rise of a device junction temperature due to its power dissipation. The equation used to calculate the rise in the SM72480's die temperature is 30142015 FIGURE 1. SM72480 No Decoupling Required for Capacitive Loads Less than 1100 pF. 30142033 CLOAD Minimum RS 1.1 nF to 99 nF 3 kΩ 100 nF to 999 nF 1.5 kΩ 1 μF 800 Ω FIGURE 2. SM72480 with series resistor for capacitive loading greater than 1100 pF. where TA is the ambient temperature, IQ is the quiescent current, IL is the load current on the output, and VO is the output voltage. For example, in an application where TA = 30 °C, VDD = 5 V, IDD = 9 μA, Gain 4, VTEMP = 2231 mV, and IL = 2 μA, the junction temperature would be 30.021 °C, showing a self-heating error of only 0.021°C. Since the SM72480's junction temperature is the actual temperature being measured, care should be taken to minimize the load current that the VTEMP output is required to drive. If The OVERTEMP output is used with a 100 k pull-up resistor, and this output is asserted (low), then for this example the additional contribution is [(152° C/W)x(5V)2/100k] = 0.038°C for a total selfheating error of 0.059°C. Figure 3 shows the thermal resistance of the SM72480. 4.3 VOLTAGE SHIFT The SM72480 is very linear over temperature and supply voltage range. Due to the intrinsic behavior of an NMOS/ PMOS rail-to-rail buffer, a slight shift in the output can occur when the supply voltage is ramped over the operating range of the device. The location of the shift is determined by the relative levels of VDD and VTEMP. The shift typically occurs when VDD − VTEMP = 1.0V. This slight shift (a few millivolts) takes place over a wide change (approximately 200 mV) in VDD or VTEMP. Since the shift takes place over a wide temperature change of 5°C to 20°C, VTEMP is always monotonic. The accuracy specifications in the Electrical Characteristics table already includes this possible shift. Device Number NS Package Number Thermal Resistance (θJA) SM72480SD SDB06A 152° C/W FIGURE 3. SM72480 Thermal Resistance 13 www.national.com SM72480 5.0 Mounting and Temperature Conductivity SM72480 6.0 Applications Circuits 30142061 FIGURE 4. Temperature Switch Using Push-Pull Output 30142062 FIGURE 5. Temperature Switch Using Open-Drain Output 30142028 Most CMOS ADCs found in microcontrollers and ASICs have a sampled data comparator input structure. When the ADC charges the sampling cap, it requires instantaneous charge from the output of the analog source such as the SM72480 temperature sensor and many op amps. This requirement is easily accommodated by the addition of a capacitor (CFILTER). The size of CFILTER depends on the size of the sampling capacitor and the sampling frequency. Since not all ADCs have identical input stages, the charge requirements will vary. This general ADC application is shown as an example only. FIGURE 6. Suggested Connection to a Sampling Analog-to-Digital Converter Input Stage www.national.com 14 SM72480 30142018 FIGURE 7. Celsius Temperature Switch 30142060 FIGURE 8. TRIP TEST Digital Output Test Circuit 30142065 The TRIP TEST pin, normally used to check the operation of the OVERTEMP and OVERTEMP pins, may be used to latch the outputs whenever the temperature exceeds the programmed limit and causes the digital outputs to assert. As shown in the figure, when OVERTEMP goes high the TRIP TEST input is also pulled high and causes OVERTEMP output to latch high and the OVERTEMP output to latch low. The latch can be released by either momentarily pulling the TRIP TEST pin low (GND), or by toggling the power supply to the device. The resistor limits the current out of the OVERTEMP output pin. FIGURE 9. Latch Circuit using OVERTEMP Output 15 www.national.com SM72480 Physical Dimensions inches (millimeters) unless otherwise noted 6-Lead LLP-6 Package NS Package Number SDB06A www.national.com 16 SM72480 Notes 17 www.national.com SM72480 SolarMagic 1.6V, LLP-6 Factory Preset Temperature Switch and Temperature Sensor Notes For more National Semiconductor product information and proven design tools, visit the following Web sites at: www.national.com Products Design Support Amplifiers www.national.com/amplifiers WEBENCH® Tools www.national.com/webench Audio www.national.com/audio App Notes www.national.com/appnotes Clock and Timing www.national.com/timing Reference Designs www.national.com/refdesigns Data Converters www.national.com/adc Samples www.national.com/samples Interface www.national.com/interface Eval Boards www.national.com/evalboards LVDS www.national.com/lvds Packaging www.national.com/packaging Power Management www.national.com/power Green Compliance www.national.com/quality/green Switching Regulators www.national.com/switchers Distributors www.national.com/contacts LDOs www.national.com/ldo Quality and Reliability www.national.com/quality LED Lighting www.national.com/led Feedback/Support www.national.com/feedback Voltage References www.national.com/vref Design Made Easy www.national.com/easy www.national.com/powerwise Applications & Markets www.national.com/solutions Mil/Aero www.national.com/milaero PowerWise® Solutions Serial Digital Interface (SDI) www.national.com/sdi Temperature Sensors www.national.com/tempsensors SolarMagic™ www.national.com/solarmagic PLL/VCO www.national.com/wireless www.national.com/training PowerWise® Design University THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION (“NATIONAL”) PRODUCTS. NATIONAL MAKES NO REPRESENTATIONS OR WARRANTIES WITH RESPECT TO THE ACCURACY OR COMPLETENESS OF THE CONTENTS OF THIS PUBLICATION AND RESERVES THE RIGHT TO MAKE CHANGES TO SPECIFICATIONS AND PRODUCT DESCRIPTIONS AT ANY TIME WITHOUT NOTICE. NO LICENSE, WHETHER EXPRESS, IMPLIED, ARISING BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. TESTING AND OTHER QUALITY CONTROLS ARE USED TO THE EXTENT NATIONAL DEEMS NECESSARY TO SUPPORT NATIONAL’S PRODUCT WARRANTY. EXCEPT WHERE MANDATED BY GOVERNMENT REQUIREMENTS, TESTING OF ALL PARAMETERS OF EACH PRODUCT IS NOT NECESSARILY PERFORMED. NATIONAL ASSUMES NO LIABILITY FOR APPLICATIONS ASSISTANCE OR BUYER PRODUCT DESIGN. BUYERS ARE RESPONSIBLE FOR THEIR PRODUCTS AND APPLICATIONS USING NATIONAL COMPONENTS. PRIOR TO USING OR DISTRIBUTING ANY PRODUCTS THAT INCLUDE NATIONAL COMPONENTS, BUYERS SHOULD PROVIDE ADEQUATE DESIGN, TESTING AND OPERATING SAFEGUARDS. EXCEPT AS PROVIDED IN NATIONAL’S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, NATIONAL ASSUMES NO LIABILITY WHATSOEVER, AND NATIONAL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY RELATING TO THE SALE AND/OR USE OF NATIONAL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS PRIOR WRITTEN APPROVAL OF THE CHIEF EXECUTIVE OFFICER AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: Life support devices or systems are devices which (a) are intended for surgical implant into the body, or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness. National Semiconductor and the National Semiconductor logo are registered trademarks of National Semiconductor Corporation. All other brand or product names may be trademarks or registered trademarks of their respective holders. Copyright© 2011 National Semiconductor Corporation For the most current product information visit us at www.national.com National Semiconductor Americas Technical Support Center Email: [email protected] Tel: 1-800-272-9959 www.national.com National Semiconductor Europe Technical Support Center Email: [email protected] National Semiconductor Asia Pacific Technical Support Center Email: [email protected] National Semiconductor Japan Technical Support Center Email: [email protected]