AOZ1915 1.5A General Purpose Boost Regulator General Description Features The AOZ1915 is a high-performance, current-mode, constant frequency boost regulator with internal MOSFET and internal Schottky diode. The 600kHz / 1.2MHz switching frequency allows the use of low-profile inductor and capacitors. The current-mode control ensures easy loop compensation and fast transient response. The AOZ1915 works from a 2.7V to 5.5V input voltage range and generates an output voltage as high as 22V. Other features include input under-voltage lockout, cycle-by-cycle current limit, thermal shutdown and soft-start. ● 2.7V to 5.5V input voltage range ● Adjustable output up to 22V ● Internal Schottky diode ● 600kHz/1.2MHz constant switching frequency ● Cycle-by-cycle current limit ● Thermal overload protection ● Programmable Soft-start ● Small 4mm x 3mm DFN 12L package The AOZ1915 is available in a tiny 4mm x 3mm 12-pin DFN package and is rated over a -40°C to +85°C Applications ● LCD TV ● LCD Monitors ● Notebook Displays ● PCMCIA Cards ● Hand-Held Devices ● GPS power ● TV tuner Typical Application Circuit L1 4.7µH VIN VOUT LX OUT C1 10µF R2 IN FSEL FB AOZ1915 C2 10µF R1 SS C4 OFF ON GND COMP EN R3 C3 Figure 1. Typical Application Circuit Rev. 1.1 July 2009 www.aosmd.com Page 1 of 14 AOZ1915 Ordering Information Part Number Operating Temperature Range Package Environmental AOZ1915DI -40°C to +85°C 4x3 DFN-12 Green Product AOS Green Products use reduced levels of Halogens, and are also RoHS compliant. Please visit www.aosmd.com/web/quality/rohs_compliant.jsp for additional information. Pin Configuration LX 1 12 OUT LX 2 11 GND LX 3 10 GND IN 4 9 EN FSEL 5 8 FB SS 6 7 COMP OUT GND DFN-12 (Top View) Pin Description Pin Number Pin Name Pin Description 1, 2, 3 LX Boost Regulator Switching Node. 4 IN Input Supply Pin. 5 FSEL Frequency Select Pin. The switching frequency is 1.2MHz when FSEL is connected to IN, and 600kHz when FSEL is connected to ground. 6 SS 7 COMP 8 FB Feedback Input. Connect a resistive divider between the boost regulator output and ground with the center tap connected to FB to set output voltage. 9 EN Enable Input. Pull EN high to enable the boost regulator and pull EN low to disable the regulator. 10, 11 GND Ground. 12 OUT Boost Regulator Output Rev. 1.1 July 2009 Soft-Start Pin. Connect a capacitor from SS to GND to set the soft-start period. Compensation Pin. Connect a RC network between COMP and ground to compensate the control loop. www.aosmd.com Page 2 of 14 AOZ1915 Absolute Maximum Ratings Recommend Operating Ratings Exceeding the Absolute Maximum ratings may damage the device. The device is not guaranteed to operate beyond the Maximum Operating Ratings. Parameter Rating IN to GND Parameter -0.3V to +6V LX, OUT to GND -0.3V to +26V COMP, EN, FB, FSEL, SS to GND Storage Temperature (TS) Supply Voltage (VIN) -0.3V to +6V 2.7V to 5.5V Output Voltage (VOUT) -65°C to +150°C ESD Rating(1) Rating VIN to 22V Ambient Temperature (TA) 2kV -40°C to +85°C Package Thermal Resistance 4 x 3 DFN-10 (ΘJA) Note: 48°C/W 1. Devices are inherently ESD sensitive, handling precautions are required. Human body model rating: 1.5kΩ in series with 100pF. Functional Block Diagram 4.7µH VOUT VIN LX 10F 10µF R Bias Generator IN OUT Q S EN ILIM UVLO Comp OSC UVLO Threshold Thermal Shutdown PWM Comp Error Amp VFB Gm REF FSEL OFF ON EN SS Soft-Start COMP GND Rev. 1.1 July 2009 www.aosmd.com Page 3 of 14 AOZ1915 Electrical Characteristics TA = 25°C, VIN = 3.3V, unless otherwise specified. Specifications in BOLD indicate an ambient temperature range of -40°C to +85°C. Symbol VIN VIN_UVLO Parameter Conditions IN Supply Voltage Range IN UVLO Threshold Min. 2.7 IN rising IN UVLO Hysteresis IIN_ON IN Quiescent Current EN = IN, FB = 1.4V IN Shutdowns Current EN = GND ISS Max. Units 5.5 V 2.6 V 200 IIN_OFF VFB Typ. FB Voltage 1.143 1.17 mV 1.2 mA 1 μA 1.197 V 1 μA FB Input Bias Current VIN = 2.7V FB Line Regulation 2.7V < VIN < 5.5V 0.15 %/V FB Load Regulation Varies load so the input DC current changes from 0.2A to 1.8A, VOUT =16V 1.5 % Soft-Start Charge Current 7 10 μA 13 ERROR AMPLIFIER gm Error Amplifier Transconductance 200 μA / V AV Error Amplifier Voltage Gain 340 V/V OSCILLATOR fSW (1) DMAX Switching Frequency Maximum Duty Cycle FSEL = IN 960 1200 1440 FSEL = GND 480 600 720 FSEL = IN, FB = 0V 87 FSEL = GND, FB = 0V 90 kHz % POWER SWITCH RON_LX LX On Resistance 0.20 0.25 Ω LX Leakage Current LX = 22V, EN = GND 2 μA Diode Leakage OUT = 22V, LX = 0V 10 μA Diode forward voltage Id = 100mA DIODE Ileak 0.3 V PROTECTIONS ILIM Current Limit 1.5 2.2 2.9 A Thermal Shutdown Threshold 145 °C Thermal Shutdown Hysteresis 35 °C TSD LOGIC INPUTS EN Logic High Threshold 1.5 V EN Logic Low Threshold FSEL High 0.9Vin FSEL Low 0.1Vin EN, FSEL Input Current 0.4 V 0.1 μA Notes: 1. Guaranteed by design. Rev. 1.1 July 2009 www.aosmd.com Page 4 of 14 AOZ1915 Typical Performance Characteristics Circuit of Figure 1. TA = 25°C, VIN = 3.3V, VEN = 2V, VOUT = 8V unless otherwise specified. Switching Waveform Switching Waveform (IOUT = 400mA, fLX = 1.2MHz, L = 4.7µH) (IOUT = 400mA, fLX = 600kHz, L = 10µH) LVX 5V/div LVX 5V/div IL 0.5A/div IL 0.5A/div 400ns/div 1µs/div Load Transient Response (IOUT = 40mA to 400mA, fLX = 1.2MHz, L = 4.7µH) Load Transient Response (IOUT = 40mA to 400mA, fLX = 600kHz, L = 10µH) Vo Ripple 200mV/div Vo Ripple 200mV/div Io 0.2A/div Io 0.2A/div 200µs/div 200µs/div Startup Waveform Startup Waveform (ROUT = 200Ω, fLX = 1.2MHz, L = 4.7µH) (ROUT = 200Ω, fLX = 600kHz, L = 10µH) VEN 2V/div VEN 2V/div Vo 5V/div Vo 5V/div IL 0.5A/div IL 0.5A/div 200µs/div Rev. 1.1 July 2009 200µs/div www.aosmd.com Page 5 of 14 AOZ1915 Efficiency AOZ1915 Efficiency (VIN = 5V, VOUT = 12V) 100 95 Efficiency (%) 90 85 80 fSW = 600kHz, L = 10µH 75 fSW = 1MHz, L = 4.7µH 70 65 60 55 50 1 10 100 1,000 Load Current (mA) AOZ1915 Efficiency (VIN = 3.3V, VOUT = 12V) 100 95 Efficiency (%) 90 85 80 fSW = 600kHz, L = 10µH 75 fSW = 1MHz, L = 4.7µH 70 65 60 55 50 1 10 100 1,000 Load Current (mA) Rev. 1.1 July 2009 www.aosmd.com Page 6 of 14 AOZ1915 Detailed Description The AOZ1915 is a current-mode step up regulator (Boost Converter) with integrated NMOS switch. It operates from a 2.7V to 5.5V input voltage range and supplies up to 22V output voltage. The duty cycle can be adjusted to obtain a wide range of output voltage up to 22V. Features include enable control, cycle by cycle current limit, input under voltage lockout, adjustable soft-start and thermal shut down. The AOZ1915 is available in DFN 4x3 package Enable and Soft Start The AOZ1915 has the adjustable soft start feature to limit in-rush current and ensure the output voltage ramps up smoothly to regulation voltage. A soft start process begins when the input voltage rises to 2.7V and voltage on EN pin is HIGH. In soft start process, a 10µA internal current source charges the external capacitor at SS. As the SS capacitor is charged, the voltage at SS rises. The SS voltage clamps the reference voltage of the error amplifier, therefore output voltage rising time follows the SS pin voltage. With the slow ramping up output voltage, the inrush current can be prevented. The EN pin of the AOZ1915 is active high. Connect the EN pin to VIN if enable function is not used. Pull it to ground will disable the AOZ1915. Do not leave it open. The voltage on EN pin must be above 1.5 V to enable the AOZ1915. When voltage on EN pin falls below 0.4V, the AOZ1915 is disabled. If an application circuit requires the AOZ1915 to be disabled, an open drain or open collector circuit should be used to interface to EN pin. Steady-State Operation Under steady-state conditions, the converter operates in fixed frequency. The AOZ1915 integrates an internal N-MOSFET as the control switch. Inductor current is sensed by amplifying the voltage drop across the drain to source of the control power MOSFET. Output voltage is divided down by the external voltage divider at the FB pin. The difference of the FB pin voltage and reference is amplified by the internal transconductance error amplifier. The error voltage, which shows on the COMP pin, is compared against the current signal, which is sum of inductor current signal and ramp compensation signal, at PWM comparator input. If the current signal is less than the error voltage, the internal NMOS switch is on. The inductor current ramps up. When the current signal exceeds the error voltage, the switch is off. The inductor current is freewheeling through the internal Schottky diode to output. Rev. 1.1 July 2009 Switching Frequency The AOZ1915 switching frequency is fixed and set by an internal oscillator and FSEL. When the voltage of FSEL is high (connected to Vin) The switching frequency is 1.2MHz; when the voltage of FSEL is low (connected to GND), the switching frequency is 600 KHz. Output Voltage Programming Output voltage can be set by feeding back the output to the FB pin with a resistor divider network. In the application circuit shown in Figure 1. The resistor divider network includes R1 and R2. Usually, a design is started by picking a fixed R1 value and calculating the required R2 with equation below: R 2⎞ ⎛ V O = 1.2 × ⎜ 1 + -------⎟ R 1⎠ ⎝ Some standard value of R1, R2 for most commonly used output voltage values are listed in Table 1. Table 1. VO (V) R2 (kΩ) R1 (kΩ) 8 170 30 12 270 30 16 370 30 18 420 30 25 595 30 The combination of R1 and R2 should be large enough to avoid drawing excessive current from the output, which will cause power loss. Protection Features The AOZ1915 has multiple protection features to prevent system circuit damage under abnormal conditions. Over Current Protection (OCP) The sensed inductor current signal is also used for over current protection. Since the AOZ1915 employs peak current mode control, the COMP pin voltage is proportional to the peak inductor current. The peak inductor current is automatically limited cycle by cycle. When the current of control NMOS reaches the current limit threshold, the cycle by cycle current limit circuit turns off the NMOS immediately to terminate the current duty cycle. The inductor current stop rising. The cycle by cycle current limit protection directly limits inductor peak current. The average inductor current is also limited due www.aosmd.com Page 7 of 14 AOZ1915 to the limitation on peak inductor current. When cycle by cycle current limit circuit is triggered, the output voltage drops as the duty cycle decreasing. Power-On Reset (POR) A power-on reset circuit monitors the input voltage. When the input voltage exceeds 2.7V, the converter starts operation. When input voltage falls below 2.2V, the converter will stop switching. Thermal Protection An internal temperature sensor monitors the junction temperature. It shuts down the internal control circuit and NMOS switch if the junction temperature exceeds 145°C. Application Information The basic AOZ1915 application circuit is shown in Figure 1. Component selection is explained below. Input Capacitor The input capacitor (C1 in Figure 1) must be connected to the VIN pin and GND pin of the AOZ1915 to maintain steady input voltage. The voltage rating of input capacitor must be greater than maximum input voltage + ripple voltage. The RMS current rating should be greater than the the inductor ripple current: V IN⎞ V IN ⎛ ΔI L = ----------- × ⎜ 1 – ---------⎟ f×L ⎝ VO ⎠ The input capacitor value should be greater than 4.7µF for normal operation. The capacitor can be electrolytic, tantalum or ceramic. The input capacitor should be place as close as possible to the IC; if not possible, please put 0.1µF decoupling ceramics capacitor between IN pin and GND nearby. Inductor The inductor is used to supply higher output voltage when the NMOS switch is off. For given input and output voltage, inductance and switching frequency together decide the inductor ripple current, which is: V IN⎞ V IN ⎛ ΔI L = ----------- × ⎜ 1 – ---------⎟ f×L ⎝ VO ⎠ The peak inductor current is: ΔI L I Lpeak = I IN + -------2 Rev. 1.1 July 2009 High inductance gives low inductor ripple current but requires larger size inductor to avoid saturation. Low ripple current reduces inductor core losses. It also reduces RMS current through inductor, switch and freewheeling diode, which results in less conduction loss. Usually, peak to peak ripple current on inductor is designed to be 30% to 50% of input current. When selecting the inductor, make sure it is able to handle the peak current without saturation even at the highest operating temperature. The inductor takes the highest current in a boost circuit. The conduction loss on inductor needs to be checked for thermal and efficiency requirements. Surface mount inductors in different shape and styles are available from Coilcraft, Elytone and Murata. Shielded inductors are small and radiate less EMI noise. But they cost more than unshielded inductors. The choice depends on EMI requirement, price and size. Output Capacitor The output capacitor is selected based on the DC output voltage rating, output ripple voltage specification and ripple current rating. The selected output capacitor must have a higher rated voltage specification than the maximum desired output voltage including ripple. De-rating needs to be considered for long term reliability. Output ripple voltage specification is another important factor for selecting the output capacitor. In a boost converter circuit, output ripple voltage is determined by load current, input voltage, output voltage, switching frequency, output capacitor value and ESR. It can be calculated by the equation below:: V IN ⎞ ⎞ ⎛ ⎛ ⎜ ⎜ 1 – ---------------⎟ ⎟ V OUT⎠ ⎟ ⎜ VO ⎝ -⎟ ΔV O = I LOAD × ⎜ --------- × ESR CO + ----------------------------f × CO ⎟ ⎜ V IN ⎜ ⎟ ⎝ ⎠ where; ILOAD is the load current, CO is the output capacitor value, and ESRCO is the Equivalent Series Resistor of output capacitor. When low ESR ceramic capacitor is used as output capacitor, the impedance of the capacitor at the switching frequency dominates. Output ripple is mainly caused by capacitor value and load current with the fixed www.aosmd.com Page 8 of 14 AOZ1915 frequency, input and output voltage. The output ripple voltage calculation can be simplified to: V IN ⎞ ⎛ ⎜ 1 – ---------------⎟ V OUT⎠ ⎝ ΔV O = I L × ----------------------------f × CO and phase. Several different types of compensation network can be used for AOZ1915. For most cases, a series capacitor and resistor network connected to the COMP pin sets the pole-zero and is adequate for a stable high-bandwidth control loop. In the AOZ1915, FB pin and COMP pin are the inverting input and the output of internal transconductance error amplifier. A series R and C compensation network connected to COMP provides one pole and one zero. The pole is: Output capacitor with the range of 4.7µF to 22µF ceramic capacitor usually can meet most applications. Loop Compensation The AOZ1915 employs peak current mode control for easy use and fast transient response. Peak current mode control eliminates the double pole effect of the output L&C filter. It greatly simplifies the compensation loop design. With peak current mode control, the boost power stage can be simplified to be a one-pole, one left plane zero and one right half plane (RHP) system in frequency domain. The pole is dominant pole and can be calculated by: 1 f P1 = ----------------------------------2π × C O × R L G EA f P2 = ------------------------------------------2π × C C × G VEA where; GEA is the error amplifier transconductance, which is 200 x 10-6 A/V, GVEA is the error amplifier voltage gain, which is 340 V/V, and CC is compensation capacitor. The zero given by the external compensation network, capacitor CC (C3 in Figure 1) and resistor RC (R3 in Figure 1), is located at: 1 f Z2 = ----------------------------------2π × C C × R C Choosing the suitable CC and RC by trading-off stability and bandwidth. The zero is a ESR zero due to output capacitor and its ESR. It is can be calculated by: 1 f Z1 = -----------------------------------------------2π × C O × ESR CO Thermal Management and Layout Consideration ESRCO is the equivalent series resistance of output capacitor. In the AOZ1915 boost regulator circuit, high pulsing current flows through two circuit loops. The first loop starts from the input capacitors, to the filter inductor, to the LX pin, to the internal NMOS switch, to the ground and back to the input capacitor, when the switch turns on. The second loop starts from input capacitor, to the filter inductor, to the LX pin to the internal diode, to the ground and back to the input capacitor, when the switch is off. The RHP zero has the effect of a zero in the gain causing an imposed +20dB/decade on the roll off, but has the effect of a pole in the phase, subtracting 90° in the phase. The RHP zero can be calculated by In PCB layout, minimizing the two loops area reduces the noise of this circuit and improves efficiency. A ground plane is recommended to connect input capacitor, output capacitor, and GND pin of the AOZ1915. The RHP zero obviously can cause the instable issue if the bandwidth is higher. It is recommended to design the bandwidth to lower than the one half frequency of RHP zero. In the AOZ1915 boost regulator circuit, the three major power dissipating components are the AOZ1915 and output inductor. The total power dissipation of converter circuit can be measured by input power minus output power. where; CO is the output filter capacitor, RL is load resistor value, and The compensation design is actually to shape the converter close loop transfer function to get desired gain Rev. 1.1 July 2009 P total_loss = V IN × I IN – V O × I O www.aosmd.com Page 9 of 14 AOZ1915 Several layout tips are listed below for the best electric and thermal performance. The power dissipation of inductor can be approximately calculated by input current and DCR of inductor. P inductor_loss = I IN 2 × R inductor × 1.1 1. Do not use thermal relief connection to the VIN and the GND pin. Pour a maximized copper area to the GND pin and the VIN pin to help thermal dissipation. The actual AOZ1915 junction temperature can be calculated with power dissipation in the AOZ1915 and thermal impedance from junction to ambient. 2. A ground plane is preferred. 3. Make the current trace from LX pins to L to Co to the T junction = ( P total_loss – P inductor_loss – P diode_loss ) × GND as short as possible. × Θ + T ambient 4. Pour copper plane on all unused board area and The maximum junction temperature of AOZ1915 is 145°C, which limits the maximum load current capability. The thermal performance of the AOZ1915 is strongly affected by the PCB layout. Extra care should be taken by users during design process to ensure that the IC will operate under the recommended environmental conditions. connect it to stable DC nodes, like VIN, GND or VOUT. 5. Keep sensitive signal trace such as trace connected with FB pin and COMP pin far away from the LX pin. 6. The output schottky diode is integrated into AOZ1915. Proper layout should incorporate thermal via connection from top to bottom layers. COUT LX LX CIN LX 1 12 OUT AOZ1915 IN OUT GND GND R2 EN GND C4 FSEL FB SS R1 COMP 4X3 DFN-12 R3 C3 Figure 3 . AOZ1915 PCB Layout Example Rev. 1.1 July 2009 www.aosmd.com Page 10 of 14 AOZ1915 Package Dimensions, DFN 4 x 3 A D/2 Index Area (D/2 x E/2) E/2 E TOP VIEW A3 A Seating Plane A1 b SIDE VIEW Pin #1 IDA Chamfer 0.15 e L1 1 L L3 E1/2 E1 L3 D1 L2 D2 BOTTOM VIEW Rev. 1.1 July 2009 www.aosmd.com Page 11 of 14 AOZ1915 Package Dimensions, DFN 4 x 3 (Continued) RECOMMENDED LAND PATTERN 0.50 0.25 0.23 0.50 0.30 1.35 1.60 0.80 0.715 2.70 0.30 0.20 x 45° 0.315 2.065 1.035 Dimensions in millimeters Symbols A A1 A3 b D D1 D2 E E1 e L L1 L2 Min. 0.80 0.00 Nom. 0.90 0.02 0.20 REF. 0.20 0.23 4.00 BSC 0.83 0.985 1.86 2.015 Max. 1.00 0.05 0.35 1.09 2.12 Dimensions in inches Symbols A A1 A3 b D D1 D2 3.00 BSC 1.60 1.70 0.50 BSC 0.30 0.40 0.50 0.61 0.715 0.82 E E1 e L L1 0.21 L2 1.45 0.315 0.42 Unit: mm Min. Nom. Max. 0.031 0.035 0.039 0.000 0.001 0.002 0.008 REF. 0.008 0.009 0.014 0.157 BSC 0.033 0.039 0.043 0.073 0.079 0.083 0.118 BSC 0.063 0.067 0.020 BSC 0.012 0.016 0.020 0.024 0.028 0.032 0.057 0.008 0.012 0.017 L3 aaa bbb 0.30 REF. 0.15 0.10 L3 aaa bbb 0.012 REF. 0.006 0.004 ccc ddd 0.10 0.08 ccc ddd 0.004 0.003 Notes: 1. Controlling dimension is millimeter, converted inch dimensions are not necessarily exact. 2. The location of the terminal #1 identifier and terminal numbering conforms to JEDEC publication 95 SPP-002. 3. Dimension b applied to metallized terminal and is measured between 0.20mm and 0.35mm from the terminal tip. If the terminal has the optional radius on the other end of the terminal, dimension b should not be measured in that radius area. 4. Coplanarity ddd applies to the terminals and all other bottom surface metallization. Rev. 1.1 July 2009 www.aosmd.com Page 12 of 14 AOZ1915 Tape and Reel Dimensions, DFN 4 x 3 Carrier Tape P1 P2 D1 T E1 E2 E C L B0 K0 D0 P0 A0 Feeding Direction UNIT: mm Package DFN 4 x 3 (12 mm) A0 3.40 ±0.10 B0 4.40 ±0.10 K0 1.10 ±0.10 D0 1.50 Min. D1 1.50 +0.10/-0.0 E E1 1.75 ±0.10 12.0 ±0.3 Reel E2 5.50 ±0.05 P0 8.00 ±0.10 P1 4.00 ±0.10 P2 2.00 ±0.10 T 0.30 ±0.05 W1 S G N M K V R H W UNIT: mm Tape Size Reel Size 12mm ø330 M N ø330.0 ±2.0 ø79.0 ±1.0 W W1 12.4 17.0 +2.0/-0 +2.6/-0 H K S G R V ø13.0 ±0.5 10.5 ±0.2 2.0 ±0.5 — — — Leader / Trailer & Orientation Trailer Tape 300mm Min. 75 Empty Pockets Rev. 1.1 July 2009 Components Tape Orientation in Pocket www.aosmd.com Leader Tape 500mm Min. 125 Empty Pockets Page 13 of 14 AOZ1915 Package Marking AOZ1915DI (4 x 3 DFN-12) Z1915DI Part Number Code FAYWLT Assembly Lot Code Fab & Assembly Location Year & Week Code Alpha & Omega Semiconductor reserves the right to make changes at any time without notice. LIFE SUPPORT POLICY ALPHA & OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. Rev. 1.1 July 2009 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.aosmd.com Page 14 of 14