AFBR-5972Z Compact 650nm Transceiver with Compact Versatile-Link connector for Fast Ethernet over POF Data Sheet Description Features The AFBR-5972Z Transceiver provides the system designer with the ability to implement Fast Ethernet (100 Mbps) over standard bandwidth 0.5±0.05 NA POF. It features a very compact design and has a form factor similar to the UTP connector. This transceiver features a new compact Versatile-Link duplex connector AFBR-4526Z and is compatible with existing simplex Versatile-Link connectors . • Compatible to IEEE 802.3 100BASE-FX PMA using POF PMD This product is lead free and compliant with RoHS. • LVPECL signal detect output Transmitter • Temperature range -40°C to 85°C The transmitter contains a 650nm LED with an integrated driver. The LED driver operates at 3.3 V. It receives a LVPECL/LVDS electrical input, and converts it into a modulated current driving the LED. The LED is packaged in an optical subassembly, part of the transmitter section. The optical subassembly couples the output optical power efficiently into POF fiber. Applications • Link lengths up to 50m POF (NA0.5) or 70m POF (NA0.3) • Compact foot print • 3.3V operation • LVPECL input and output data connections • Industrial Ethernet and Fast Ethernet over polymer optical fiber PMD •Networking in harsh environments like factory automation or power generation and distribution • Supporting various Ethernet Fieldbus protocols Receiver The receiver utilizes a Si PIN photodiode. The PIN photodiode is packaged in an optical sub-assembly, part of the receiver section. This optical subassembly couples the optical power efficiently from POF fiber to the receiving PIN. The integrated IC operates at 3.3 V and converts the photocurrent into LVPECL electrical output. Differential Data Output Signal Detect Output Package The transceiver package consists of three basic elements; two opto-electical subassemblies and the housing as illustrated in the block diagrams in Figure 1. The package outline drawing and pin-outs are shown in Figures 2 and 5. Patent - www.avagotech.com/patents Integrated Receiver Differential Data Input Figure 1. Block diagram. PIN Photodiode LED Driver LED 7.77 4.44 3.17 1.9 0.63 0 0.64 1.91 3.18 4.45 7.77 S T ANDOF F AR E A (2 x 0.65 x 1.03) 8.89 6.35 ∅ 0. 9 +0 .1 (8 x) 4 2 1 3 5 8.66 ND LD G S H IE +0 .1 ( 2 x) ∅ 1 .6 8 6 7 0 ∅ 3.2 3) R ecommended P C B Thickness 1.57 ± 0.05 4) P in des cription 0 +0.1 MOUNT P OS T UNP LAT E D (2x) 3.73 (2x) S T ANDOF F AR E A (4 x 1.9 x 1) P IN 1 2 3 4 5 6 7 8 F UNC T D+ T DT xV cc G ND R xVcc SD R D+ R D- 5.76 6.7 7.78 2.45 0 2.45 7.78 6.7 5.76 T op V iew 1) Dimens ion: mm 2) G eneral tolerance: ±0.05 3.18 3.05 NOT E S : ▼ F ront ▼ Figure 2. PCB footprint and Pin-out diagram. The opto-electrical subassemblies utilize a high volume assembly process together with low cost lens elements which result in a cost effective building block. It consists of the active III-V devices, IC chips and various surface mounted passive components. There are eight signal pins, four EMI shield solder posts and two mounting posts, which exit the bottom of the housing. The solder posts are isolated from the internal circuit of the transceiver and are to be connected to chassis ground. The mounting posts are to provide mechanical strength to hold the transceiver to the application board. Pin Descriptions Pin 1 TData+: transmitter data in. This input is a 3.3V LVPECL/LVDS compatible differential line. Pin 2 TData-: transmitter data in negative. This input is a 3.3V LVPECL/LVDS compatible differential line. Pin 3 TX Vcc: transmitter power supply pin. Provide +3.3 V DC via a transmitter power supply filter circuit. Locate the power supply filter circuit as close as possible to the Tx Vcc pin. 2 Pin 4 GND: common ground pin. Directly connect this pin to the signal ground plane of the host board. Pin 5 RX Vcc: receiver power supply pin. Provide +3.3 V DC via a receiver power supply filter circuit. Locate the power supply filter circuit as close as possible to the Rx Vcc pin Pin 6. SD: signal detect pin. If an optical signal is present at the optical input, SD output is a logic “1”. Absence of an optical input signal results in a logic “0” output. This pin can be used to drive a LVPECL input of an upstream circuit, such as Signal Detect input or Loss of Signal–bar. Pin 7 RData+: receiver data out. This data line is a 3.3V LVPECL compatible differential line which should be properly terminated. Pin 8 RData-: receiver data out negative. This data line is a 3.3V LVPECL compatible differential line which should be properly terminated. When SD is de-asserted, RData+ will be set to logic “0” and RData- will be set to logic “1”. Shield: This is to be connected to the equipment chassis ground. Application circuit The recommended application circuit is shown in figure 3. 1µH 100nF L1 VCC 3.3V C9 1µH 100nF C7 C8 LL Tx RxVcc RD+ RD- DGND Amplifier and K quantizer A Rx DGND SD R7 Signal detect 10k A 150 100nF 10µF R5 C3 50 100nF 100 R1 RD- K TD- C4 50 RD+ LED-Driver LL 50 TD+ 100 C2 TD- TxVcc R9 50 TD+ 100nF AFBR-5972Z R12 C6 C1 C5 L2 100nF 100nF 150 Protocol IC & SERDES 10µF GND Chasis GND DGND Figure 3. Recommended application circuit. Board Layout – Decoupling Circuit and Ground Planes It is important to take care of the layout of the application circuitry to achieve optimum performance of the transceiver. A power supply decoupling circuit is recommended to filter out noise, to assure optimal product performance. It is further recommended that a contiguous signal ground plane be provided in the circuit board directly under the transceiver to provide a low inductance ground for signal return current. It is also recommended that the shield posts be connected to the chassis ground to provide optimum EMI, ESD and EMS performance. This recommendation is in keeping with good high frequency board layout practices. Regulatory compliance table Feature Test Method Performance Electrostatic discharge (ESD) to the electrical Pins JESD22-A114 Withstands up to 2000V HBM applied between the electrical pins. Immunity Variation of IEC 61000-4-3 Typically shows no measurable effect from a 15V/m field swept from 8MHz to 1GHz applied to the transceiver when mounted on a circuit board without chassis enclosure. Eye safety EN 60825-1:52007 Laser class 1 product (LED radiation only). TÜV certificate: R 72102396. Caution – Use of controls or adjustments of performance or procedures other than those specified herein may result in hazardous radiation exposure. Component recognition Underwriter Laboratories UL File #: E173874 3 Table 2. Transceiver diagnostics timing characteristics Parameter Symbol Time to initialize Hardware SD assert time Hardware SD de-assert time Min Max Unit Notes t_init 5 ms Note 1, figure 4 t_sd_on 100 µs Note 2 t_sd_off 100 µs Note 3 Notes: 1. Time from Power on to when the modulated optical output rises above 90% of nominal. 2. Time from valid optical signal to SD assertion. 3. Time from loss of optical signal to SD de-assertion. OCCURANCE OF LOSS OPTICAL SIGNAL TX, RX Vcc > 2.97V SD t_sd_on t_sd_off TRANSMITTER SIGNAL t_init t_init: t_sd_on & t_sd_off Figure 4. Transceiver timing diagrams Absolute Maximum Ratings Stresses in excess of the absolute maximum ratings can cause catastrophic damage to the device. Limits apply to each parameter in isolation. all other parameters having values within the recommended operation conditions. It should not be assumed that limiting values of more than one parameter can be applied to the products at the same time. Exposure to the absolute maximum ratings for extended periods can adversely affect device reliability. Parameter Symbol Min Max Unit Storage Temperature TS -40 +100 °C Case Operating Temperature TC -40 +85 °C Note 4, 5 Lead Soldering Temperature Tsold 260 °C Note 6 Lead Soldering Time tsold 10 s Note 6 Supply Voltage VCC -0.5 4.0 V Data Input Voltage VI -0.5 Vcc V Differential Input Voltage VD 2.0 V Output Current LVPECL IDout 45 mA -45 Notes Peak to peak Notes: 4. Operating the product outside the maximum rated case operating temperature range will compromise its reliability and may damage the product. 5. The temperature is measured using a thermocouple connected to the hottest position of the housing. 6. The transceiver is Pb-free wave solderable. 4 Recommended Operating Conditions Parameter Symbol Min Typ Case Operating Temperature TC -40 Supply Voltage VCC 3.0 3.3 Differential Input Voltage VD 0.22 0.8 Input common mode voltage VIN_CM GND+0.8 Data and Signal Detect Output Load RL 50 W Signalling rate (Fast Ethernet) BFE 125 MBd 4B/5B. Note 3 Signalling rate (general) BG MBd Note 4 10 Max Unit Notes +85 °C Note 1, 2 3.6 V 1.6 V VCC-0.8 V 125 Peak to peak Notes: 1. The temperature is measured using a thermocouple connected to the housing. 2. Electrical and optical specifications of the product are guaranteed across recommended case operating temperature range only. 3. Ethernet auto-negotiation pulses are not supported. 4. Evaluation of 10MBd was performed using a biphase code. Transceiver Electrical Characteristics Parameter Symbol Min Supply Current ICC Power Dissipation PDISS 170 Power Supply Noise Reduction PSNR 50 Typ Max Unit Notes 90 120 mA Note 5 300 436 mW Note 5 mV Peak to peak. Note 6 Notes 5. Characterized with LVPECL termination (82 Ohms to GND, 130 Ohms to VCC) 6. Fequencies from 0.1MHz to 100MHz. Transmitter Optical Characteristics Parameter Symbol Min Typ Max Unit Notes Average Launched Power (1mm POF. NA=0.5) Po -10 -6.5 -3.0 dBm Note 7 Extinction ratio EXT 10 dB Note 7 Central Wavelength lC 635 675 nm Note 7 Spectral bandwidth RMS lW 17 nm Optical Rise Time (10%-90%) tr 1.8 3.5 ns Notes 7, 8 Optical Fall Time (90%-10%) tf 1.8 3.5 ns Notes 7, 8 Duty Cycle Distortion Contributed by the Transmitter DCD 1.0 ns Note 7 Data dependent jitter DDJ 0.6 ns Note 7 Random Jitter Contributed by the Transmitter RJ 0.76 ns Peak to peak. Notes 7, 9 Overshoot Ov 25 % Note 7 650 7 Notes: 7. Measured at the end of 1 meter plastic optical fiber with a PRBS 27-1 sequence. 8. 10%...90% or 90%...10% respectively 9. Based on BER=2.5x10-10 5 Receiver Electrical Characteristics Parameter Symbol Data Output Voltage - Low VOL-VCC Data Output Voltage - High VOH-VCC Data Output Voltage Swing |VOH-VOL| Data Output Rise Time (10%-90%) tr Data Output Fall Time (90%-10%) tf Duty Cycle Distortion Data Dependent Jitter Min Typ Max Unit -1.63 V -0.99 500 Notes V 900 mV Single ended 2.8 3.0 ns Note 1 2.8 3.0 ns Note 1 DCD 1.0 ns DDJ 1.2 ns Note 2 Random Jitter RJ 2.14 ns Peak to peak. Notes 2, 3 Signal Detect Output Voltage - Low VOL-Vcc -1.83 -1.75 -1.50 V Terminations as shown in Fig. 3. Signal Detect Output Voltage - High VOH-Vcc -1.16 -1.10 -0.88 V Terminations as shown in Fig. 3. Notes: 1. Characterized with LVPECL termination (82 Ohms to GND, 130 Ohms to VCC) 2. Contributed by Rx only. 3. Based on BER=2.5x10-10 Receiver Optical Characteristics Parameter Symbol Min Typ Max Unit Notes Unstressed receiver sensitivity CSEN -26 -27 dBm Note 4 Input Optical Power Maximum PIN MAX Central Wavelength lC 635 650 -3.0 dBm Notes 4, 5 675 nm Notes 6 Spectral bandwidth RMS lW 17 nm Notes 6 Signal Detect Asserted PA -29.5 dBm Signal Detect De-asserted PD -31 dBm Signal Detect Hysteresis PA - PD 1.0 dB Notes: 4. Average power. measured with a PRBS 27-1 sequence. BER < 2.5x10-10. 5. Input Optical Power Maximum is defined as the maximum optical average input power where the receiver duty cycle distortion reaches ±1 ns. 6. Measured at the end of 1 meter plastic optical fiber with a PRBS 27-1 sequence. 6 2.54 (6x) 2.54 0 0.63 1.5 1.9 3.23 4.23 3.68 2.68 (4 x ) 6.35 5.75 7.65 0 3.4 5 21.45 R0 . 15.9 TX (0.3) 6.65 12.6 11.9 Optical Axes 3 RX 1 2.67 7.35 0.25 (2x) 3.04 n0.4 (8x) 10.8 NOTES (unless otherwise specified): 1) Dimension: mm 2) Label with Partnumber, Lotnumber and Datecode (10mm x 12mm) 2) Figure 5. Package outline drawing For product information and a complete list of distributors, please go to our web site: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright © 2005-2013 Avago Technologies. All rights reserved. AV02-2701EN - January 28, 2013 11.52