NSC DS10CP152Q

DS10CP152Q
Automotive 1.5 Gbps 2X2 LVDS Crosspoint Switch
General Description
Features
The DS10CP152Q is a 1.5 Gbps 2x2 LVDS crosspoint switch
optimized for high-speed signal routing and switching over
lossy FR-4 printed circuit board backplanes and balanced cables. Fully differential signal paths ensure exceptional signal
integrity and noise immunity. The non-blocking architecture
allows connections of any input to any output or outputs.
Wide input common mode range allows the switch to accept
signals with LVDS, CML and LVPECL levels; the output levels
are LVDS. A very small package footprint requires a minimal
space on the board while the flow-through pinout allows easy
board layout. Each differential input and output is internally
terminated with a 100Ω resistor to lower device return losses,
reduce component count and further minimize board space.
■ AECQ-100 Grade 3
■ DC - 1.5 Gbps low jitter, low skew, low power operation
■ Pin configurable, fully differential, non-blocking
architecture
■ Wide Input Common Mode Voltage Range allows DCcoupled interface to LVDS, CML and LVPECL drivers
■ On-chip 100Ω input and output termination minimizes
insertion and return losses, reduces component count and
minimizes board space
■ 8 kV ESD on LVDS I/O pins protects adjoining
components
■ Small SOIC-16 space saving package
Applications
■ Automotive display applications
■ Clock and data buffering and muxing
■ SD/HD SDI Routers
Typical Application
30063770
© 2009 National Semiconductor Corporation
300637
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DS10CP152Q Automotive 1.5 Gbps 2X2 LVDS Crosspoint Switch
March 5, 2009
DS10CP152Q
Ordering Code
NSID
Function
DS10CP152QMA
2x2 Crosspoint Switch
Block Diagram
30063701
Connection Diagram
30063752
DS10CP152Q Pin Diagram
Pin Descriptions
Pin Name
Pin
Number
I/O, Type
Pin Description
IN0+, IN0- ,
IN1+, IN1-
3, 4,
6, 7
I, LVDS
Inverting and non-inverting high speed LVDS input pins.
OUT0+, OUT0-,
OUT1+, OUT1-
14, 13,
11, 10
O, LVDS
Inverting and non-inverting high speed LVDS output pins.
SEL1, SEL0
1, 2
I, LVCMOS
Switch configuration pins.
EN0, EN1
16, 15
I, LVCMOS
Output enable pins.
NC
8, 9
NC
"NO CONNECT" pins.
VDD
5
Power
Power supply pin.
GND
12
Power
Ground pin.
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2
Package Thermal Resistance
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage
−0.3V to +4V
LVCMOS Input Voltage
−0.3V to (VCC + 0.3V)
LVDS Input Voltage
−0.3V to +4V
LVDS Differential Input Voltage
0V to 1V
LVDS Output Voltage
−0.3V to (VCC + 0.3V)
LVDS Differential Output Voltage
0V to 1V
LVDS Output Short Circuit Current
5 ms
Duration
Junction Temperature
+105°C
Storage Temperature Range
−65°C to +150°C
Lead Temperature Range
Soldering (4 sec.)
+260°C
Maximum Package Power Dissipation at 25°C
M16A Package
1.10W
Derate M16A Package
13.75 mW/°C above +25°C
θJA
+72.7°C/W
θJC
ESD Susceptibility
HBM (Note 1)
+41.2°C/W
≥8 kV
≥250V
≥1250V
MM (Note 2)
CDM (Note 3)
Note 1: Human Body Model, applicable std. JESD22-A114C
Note 2: Machine Model, applicable std. JESD22-A115-A
Note 3: Field Induced Charge Device Model, applicable std.
JESD22-C101-C
Recommended Operating
Conditions
Supply Voltage (VCC)
Receiver Differential Input
Voltage (VID)
Operating Free Air
Temperature (TA)
Min
3.0
0
Typ
3.3
Max
3.6
1
Units
V
V
−40
+25
+85
°C
DC Electrical Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified. (Notes 5, 6, 7)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
LVCMOS DC SPECIFICATIONS
VIH
High Level Input Voltage
2.0
VDD
V
VIL
Low Level Input Voltage
GND
0.8
V
IIH
High Level Input Current
VIN = 3.6V
VCC = 3.6V
175
250
μA
IIL
Low Level Input Current
VIN = GND
VCC = 3.6V
±1
±10
μA
VCL
Input Clamp Voltage
ICL = −18 mA, VCC = 0V
−0.9
−1.5
V
1
V
+100
mV
40
LVDS INPUT DC SPECIFICATIONS
VID
Input Differential Voltage
0
VTH
Differential Input High Threshold
VTL
Differential Input Low Threshold
VCMR
Common Mode Voltage Range
VID = 100 mV
IIN
Input Current
VIN = 3.6V or 0V
VCC = 3.6V or 0V
CIN
Input Capacitance
Any LVDS Input Pin to GND
1.7
pF
RIN
Input Termination Resistor
Between IN+ and IN-
100
Ω
VCM = +0.05V or VCC-0.05V
0
−100
3
0
0.05
±1
mV
VCC 0.05
V
±10
μA
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DS10CP152Q
Absolute Maximum Ratings (Note 4)
DS10CP152Q
Symbol
Parameter
Conditions
Min
Typ
Max
Units
250
350
450
mV
35
mV
1.375
V
35
mV
LVDS OUTPUT DC SPECIFICATIONS
VOD
Differential Output Voltage
ΔVOD
Change in Magnitude of VOD for Complimentary
Output States
VOS
Offset Voltage
ΔVOS
Change in Magnitude of VOS for Complimentary
Output States
RL = 100Ω
IOS
Output Short Circuit Current (Note 8)
OUT to GND
-23
-55
mA
OUT to VCC
8
55
mA
RL = 100Ω
-35
1.05
1.2
-35
COUT
Output Capacitance
Any LVDS Output Pin to GND
1.2
pF
ROUT
Output Termination Resistor
Between OUT+ and OUT-
100
Ω
SUPPLY CURRENT
ICC
Supply Current
EN0 = EN1 = H
58
70
mA
ICCZ
Outputs Powered Down Supply Current
EN0 = EN1 = L
25
30
mA
Note 4: “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability
and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in
the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the
device should not be operated beyond such conditions.
Note 5: The Electrical Characteristics tables list guaranteed specifications under the listed Recommended Operating Conditions except as otherwise modified
or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not guaranteed.
Note 6: Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground except VOD and
ΔVOD.
Note 7: Typical values represent most likely parametric norms for VCC = +3.3V and TA = +25°C, and at the Recommended Operation Conditions at the time of
product characterization and are not guaranteed.
Note 8: Output short circuit current (IOS) is specified as magnitude only, minus sign indicates direction only.
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4
Over recommended operating supply and temperature ranges unless otherwise specified. (Notes 9, 10, 11)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
440
650
ps
400
650
ps
LVDS OUTPUT AC SPECIFICATIONS
tPLHD
Differential Propagation Delay Low to
High
tPHLD
Differential Propagation Delay High to
Low
tSKD1
Pulse Skew |tPLHD − tPHLD|
(Note 12)
40
120
ps
tSKD2
Channel to Channel Skew
(Note 13)
25
60
ps
tSKD3
Part to Part Skew
(Note 14)
45
190
ps
tLHT
Rise Time
170
350
ps
tHLT
Fall Time
170
350
ps
tON
Output Enable Time
5
20
μs
tOFF
Output Disable Time
3
12
ns
tSEL
Select Time
3
12
ns
135 MHz
0.5
1.2
ps
311 MHz
0.5
1.2
ps
503 MHz
0.5
1.2
ps
750 MHz
0.5
1.2
ps
270 Mbps
9
38
ps
622 Mbps
7
36
ps
1.06 Gbps
7
34
ps
1.5 Gbps
9
35
ps
270 Mbps
0.01
0.03
UIP-P
622 Mbps
0.01
0.04
UIP-P
1.06 Gbps
0.01
0.05
UIP-P
1.5 Gbps
0.01
0.07
UIP-P
RL = 100Ω
RL = 100Ω
JITTER PERFORMANCE (Note 11)
tRJ1
tRJ2
tRJ3
Random Jitter (RMS Value)
VID = 350 mV
VCM = 1.2V
Clock (RZ)
tRJ4
tDJ1
tDJ2
tDJ3
Deterministic Jitter
(Peak-to-Peak Value )
VID = 350 mV
VCM = 1.2V
Clock (RZ)
tDJ4
tTJ1
tTJ2
tTJ3
Total Jitter (Peak to Peak Value)
VID = 350 mV
VCM = 1.2V
PRBS-23 (NRZ)
tTJ4
Note 9: The Electrical Characteristics tables list guaranteed specifications under the listed Recommended Operating Conditions except as otherwise modified
or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not guaranteed.
Note 10: Typical values represent most likely parametric norms for VCC = +3.3V and TA = +25°C, and at the Recommended Operation Conditions at the time of
product characterization and are not guaranteed.
Note 11: Specification is guaranteed by characterization and is not tested in production.
Note 12: tSKD1, |tPLHD − tPHLD|, Pulse Skew, is the magnitude difference in differential propagation delay time between the positive going edge and the negative
going edge of the same channel.
Note 13: tSKD2, Channel to Channel Skew, is the difference in propagation delay (tPLHD or tPHLD) among all output channels in Broadcast mode (any one input to
all outputs).
Note 14: tSKD3, Part to Part Skew, is defined as the difference between the minimum and maximum differential propagation delays. This specification applies to
devices at the same VCC and within 5°C of each other within the operating temperature range.
Note 15: Measured on a clock edge with a histogram and an acummulation of 1500 histogram hits. Input stimulus jitter is subtracted geometrically.
Note 16: Tested with a combination of the 1100000101 (K28.5+ character) and 0011111010 (K28.5- character) patterns. Input stimulus jitter is subtracted
algebraically.
Note 17: Measured on an eye diagram with a histogram and an acummulation of 3500 histogram hits. Input stimulus jitter is subtracted.
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DS10CP152Q
AC Electrical Characteristics
DS10CP152Q
DC Test Circuits
30063720
FIGURE 1. Differential Driver DC Test Circuit
AC Test Circuits and Timing Diagrams
30063721
FIGURE 2. Differential Driver AC Test Circuit
30063722
FIGURE 3. Propagation Delay Timing Diagram
30063723
FIGURE 4. LVDS Output Transition Times
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The DS10CP152Q is a 1.5 Gbps 2x2 LVDS digital crosspoint
switch optimized for high-speed signal routing and switching
over lossy FR-4 printed circuit board backplanes and balanced cables.
TABLE 1. Switch Configuration Truth Table
SEL1
SEL0
OUT1
OUT0
0
0
IN0
IN0
0
1
IN0
IN1
1
0
IN1
IN0
1
1
IN1
IN1
TABLE 2. Output Enable Truth Table
EN1
EN0
OUT1
OUT0
0
0
Disabled
Disabled
0
1
Disabled
Enabled
1
0
Enabled
Disabled
1
1
Enabled
Enabled
7
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DS10CP152Q
Functional Description
DS10CP152Q
ferential drivers (i.e. LVPECL, LVDS, CML). The following
three figures illustrate typical DC-coupled interface to common differential drivers. Note that the DS10CP152Q inputs
are internally terminated with a 100Ω resistor.
INPUT INTERFACING
The DS10CP152Q accepts differential signals and allows
simple AC or DC coupling. With a wide common mode range,
the DS10CP152Q can be DC-coupled with all common dif-
30063731
Typical LVDS Driver DC-Coupled Interface to an DS10CP152Q Input
30063732
Typical CML Driver DC-Coupled Interface to an DS10CP152Q Input
30063733
Typical LVPECL Driver DC-Coupled Interface to an DS10CP152Q Input
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30063734
Typical DS10CP152Q Output DC-Coupled Interface to an LVDS, CML or LVPECL Receiver
9
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DS10CP152Q
assumes that the receivers have high impedance inputs.
While most differential receivers have a common mode input
range that can accomodate LVDS compliant signals, it is recommended to check respective receiver's data sheet prior to
implementing the suggested interface implementation.
OUTPUT INTERFACING
The DS10CP152Q outputs signals compliant to the LVDS
standard. Its outputs can be DC-coupled to most common
differential receivers. The following figure illustrates typical
DC-coupled interface to common differential receivers and
DS10CP152Q
Typical Performance Characteristics
30063760
30063761
A 270 Mbps NRZ PRBS-7 After 2"
Differential FR-4 Stripline
V:100 mV / DIV, H:500 ps / DIV
A 622 Mbps NRZ PRBS-7 After 2"
Differential FR-4 Stripline
V:100 mV / DIV, H:200 ps / DIV
30063763
30063762
A 1.5 Gbps NRZ PRBS-7 After 2"
Differential FR-4 Stripline
V:100 mV / DIV, H:100 ps / DIV
A 1.06 Gbps NRZ PRBS-7 After 2"
Differential FR-4 Stripline
V:100 mV / DIV, H:200 ps / DIV
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DS10CP152Q
Physical Dimensions inches (millimeters) unless otherwise noted
Order Number DS10CP152QMA
NS Package Number M16A
11
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DS10CP152Q Automotive 1.5 Gbps 2X2 LVDS Crosspoint Switch
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